mirror of
https://github.com/femtofox/femtofox.git
synced 2026-10-25 18:40:20 -04:00
noon92
GitHub
commit
d1374f6242
4 changed files with 609 additions and 0 deletions
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@ -61,6 +61,7 @@ systemctl enable femto-runonce.service
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systemctl enable femto-usb-config-tool.service
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systemctl enable femto-boot-complete.service
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systemctl enable wifi-mesh-control
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systemctl enable time-monitor
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systemctl disable apt-daily.timer
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systemctl disable unattended-upgrades
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@ -0,0 +1,12 @@
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[Unit]
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Description=Monitor time changes and restart meshtasticd
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After=network.target
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[Service]
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ExecStart=/usr/local/bin/time_monitor.sh
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Restart=always
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User=root
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[Install]
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WantedBy=multi-user.target
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58
foxbuntu/sysdrv/out/rootfs_uclibc_rv1106/usr/local/bin/time_change.sh
Executable file
58
foxbuntu/sysdrv/out/rootfs_uclibc_rv1106/usr/local/bin/time_change.sh
Executable file
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@ -0,0 +1,58 @@
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#!/usr/bin/env bash
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THRESHOLD=$((7 * 24 * 60 * 60)) # 1 week in seconds
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LOGFILE="/var/log/time_change.log"
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LAST_TIME_FILE="/tmp/last_time"
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# Function to check time jump
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check_time_jump() {
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NEW_TIME=$(date +%s)
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if [ -f "$LAST_TIME_FILE" ]; then
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OLD_TIME=$(cat "$LAST_TIME_FILE")
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else
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OLD_TIME=$NEW_TIME
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fi
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TIME_DIFF=$((NEW_TIME - OLD_TIME))
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if [ "${TIME_DIFF#-}" -ge "$THRESHOLD" ]; then
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echo "$(date) - Large time change detected ($TIME_DIFF seconds), restarting meshtasticd" | tee -a "$LOGFILE"
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systemctl restart meshtasticd
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fi
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echo "$NEW_TIME" > "$LAST_TIME_FILE"
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}
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# Monitor chronyd logs for time jumps (background)
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(
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journalctl -fu chronyd --no-pager | while read -r line; do
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if echo "$line" | grep -q "Forward time jump detected"; then
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echo "$(date) - Detected time change via chronyd logs" | tee -a "$LOGFILE"
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check_time_jump
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fi
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done
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) &
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# Monitor /etc/adjtime for manual or RTC-based time changes (background)
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(
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while true; do
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if find /etc/adjtime -mmin -1 | grep -q .; then
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echo "$(date) - Time change detected via /etc/adjtime modification" | tee -a "$LOGFILE"
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check_time_jump
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fi
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sleep 5
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done
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) &
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# Fallback: Compare timestamps every 5 seconds (if other methods fail)
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(
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while true; do
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check_time_jump
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sleep 5
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done
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) &
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# Keep script running
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wait
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@ -0,0 +1,538 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2022 Rockchip Electronics Co., Ltd.
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*/
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#include "rv1106-evb.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/display/media-bus-format.h>
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/ {
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chosen {
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bootargs = "earlycon=uart8250,mmio32,0xff4c0000 console=ttyFIQ0 root=/dev/mmcblk0p7 rootwait snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=0";
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};
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backlight: backlight {
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status = "okay";
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compatible = "pwm-backlight";
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pwms = <&pwm1 0 100000 50000>;
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brightness-levels = <
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0 1 2 3 4 5 6 7
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8 9 10 11 12 13 14 15
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16 17 18 19 20 21 22 23
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24 25 26 27 28 29 30 31
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32 33 34 35 36 37 38 39
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40 41 42 43 44 45 46 47
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48 49 50 51 52 53 54 55
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56 57 58 59 60 61 62 63
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64 65 66 67 68 69 70 71
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72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87
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88 89 90 91 92 93 94 95
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96 97 98 99 100 101 102 103
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104 105 106 107 108 109 110 111
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112 113 114 115 116 117 118 119
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120 121 122 123 124 125 126 127
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128 129 130 131 132 133 134 135
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136 137 138 139 140 141 142 143
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144 145 146 147 148 149 150 151
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152 153 154 155 156 157 158 159
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160 161 162 163 164 165 166 167
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168 169 170 171 172 173 174 175
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176 177 178 179 180 181 182 183
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184 185 186 187 188 189 190 191
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192 193 194 195 196 197 198 199
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200 201 202 203 204 205 206 207
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208 209 210 211 212 213 214 215
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216 217 218 219 220 221 222 223
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224 225 226 227 228 229 230 231
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232 233 234 235 236 237 238 239
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240 241 242 243 244 245 246 247
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248 249 250 251 252 253 254 255>;
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default-brightness-level = <255>;
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};
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panel: panel {
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compatible = "simple-panel";
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backlight = <&backlight>;
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reset-gpios = <&gpio0 RK_PA1 GPIO_ACTIVE_LOW>;
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reset-delay-ms = <200>;
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status = "okay";
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bus-format = <MEDIA_BUS_FMT_RGB666_1X18>;
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width-mm = <85>;
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height-mm = <85>;
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display-timings {
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native-mode = <&timing0>;
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timing0: timing0 {
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clock-frequency = <30000000>;
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hactive = <720>;
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vactive = <720>;
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hback-porch = <44>;
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hfront-porch = <46>;
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vback-porch = <18>;
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vfront-porch = <16>;
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hsync-len = <2>;
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vsync-len = <2>;
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hsync-active = <0>;
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vsync-active = <0>;
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de-active = <0>;
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pixelclk-active = <0>;
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};
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};
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port {
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panel_in_rgb: endpoint {
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remote-endpoint = <&rgb_out_panel>;
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};
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};
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};
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reserved_memory: reserved-memory {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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drm_logo: drm-logo@00000000 {
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compatible = "rockchip,drm-logo";
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reg = <0x0 0x0>;
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};
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linux,cma {
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status = "okay";
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compatible = "shared-dma-pool";
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inactive;
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reusable;
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size = <0xA00000>; //10M
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linux,cma-default;
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};
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mmc_ecsd: mmc@3f000 {
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reg = <0x3f000 0x00001000>;
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};
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};
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acodec_sound: acodec-sound {
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compatible = "simple-audio-card";
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simple-audio-card,name = "rv1106-acodec";
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simple-audio-card,format = "i2s";
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simple-audio-card,mclk-fs = <256>;
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simple-audio-card,cpu {
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sound-dai = <&i2s0_8ch>;
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};
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simple-audio-card,codec {
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sound-dai = <&acodec>;
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};
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};
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dsm_sound: dsm-sound {
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status = "disabled";
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compatible = "simple-audio-card";
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simple-audio-card,format = "i2s";
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simple-audio-card,mclk-fs = <256>;
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simple-audio-card,name = "rockchip,dsm-sound";
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simple-audio-card,bitclock-master = <&sndcodec>;
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simple-audio-card,frame-master = <&sndcodec>;
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sndcpu: simple-audio-card,cpu {
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sound-dai = <&i2s0_8ch>;
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};
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sndcodec: simple-audio-card,codec {
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sound-dai = <&dsm>;
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};
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};
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vcc_1v8: vcc-1v8 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_1v8";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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vcc_3v3: vcc-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_3v3";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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vdd_arm: vdd-arm {
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compatible = "regulator-fixed";
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regulator-name = "vdd_arm";
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1000000>;
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regulator-init-microvolt = <900000>;
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regulator-always-on;
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regulator-boot-on;
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};
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leds: leds {
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compatible = "gpio-leds";
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work_led: work{
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gpios = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "activity";
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default-state = "on";
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};
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};
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};
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/***************************** audio ********************************/
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&i2s0_8ch {
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#sound-dai-cells = <0>;
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status = "okay";
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};
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&acodec {
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#sound-dai-cells = <0>;
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pa-ctl-gpios = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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/************************* FIQ_DUBUGGER ****************************/
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&fiq_debugger {
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rockchip,irq-mode-enable = <1>;
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status = "okay";
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};
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/***************************** USB *********************************/
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&u2phy {
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status = "okay";
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};
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&u2phy_otg {
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status = "okay";
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};
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&usbdrd {
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status = "okay";
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};
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&usbdrd_dwc3 {
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extcon = <&u2phy>;
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status = "okay";
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};
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/***************************** DSM *********************************/
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&dsm {
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status = "disabled";
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};
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&cpu0 {
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cpu-supply = <&vdd_arm>;
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};
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/*************************** CSI *********************************/
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&csi2_dphy_hw {
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status = "okay";
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};
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&csi2_dphy0 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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csi_dphy_input0: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&sc3336_out>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csi_dphy_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi_csi2_input>;
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};
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};
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};
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};
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&i2c4 {
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status = "okay";
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clock-frequency = <400000>;
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pinctrl-names = "default";
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// pinctrl-0 = <&i2c4m2_xfer>;
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sc3336: sc3336@30 {
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compatible = "smartsens,sc3336";
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status = "okay";
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reg = <0x30>;
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clocks = <&cru MCLK_REF_MIPI0>;
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clock-names = "xvclk";
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reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipi_refclk_out0>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "CMK-OT2119-PC1";
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rockchip,camera-module-lens-name = "30IRC-F16";
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port {
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sc3336_out: endpoint {
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remote-endpoint = <&csi_dphy_input0>;
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data-lanes = <1 2>;
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};
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};
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};
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};
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&mipi0_csi2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_csi2_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csi_dphy_output>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_csi2_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cif_mipi_in>;
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};
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};
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};
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};
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&rkcif {
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status = "okay";
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};
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&rkcif_mipi_lvds {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&mipi_pins>;
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port {
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/* MIPI CSI-2 endpoint */
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cif_mipi_in: endpoint {
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remote-endpoint = <&mipi_csi2_output>;
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};
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};
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};
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&rkcif_mipi_lvds_sditf {
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status = "okay";
|
||||
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port {
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/* MIPI CSI-2 endpoint */
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mipi_lvds_sditf: endpoint {
|
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remote-endpoint = <&isp_in>;
|
||||
};
|
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};
|
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};
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&rkisp {
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status = "okay";
|
||||
};
|
||||
|
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&rkisp_vir0 {
|
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status = "okay";
|
||||
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port@0 {
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||||
isp_in: endpoint {
|
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remote-endpoint = <&mipi_lvds_sditf>;
|
||||
};
|
||||
};
|
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};
|
||||
|
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/***************************** ADC ********************************/
|
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&saradc {
|
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status = "okay";
|
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vref-supply = <&vcc_1v8>;
|
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};
|
||||
|
||||
&tsadc {
|
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status = "okay";
|
||||
};
|
||||
|
||||
/**************************** LCD/TP ******************************/
|
||||
&pwm1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "active";
|
||||
pinctrl-0 = <&pwm1m2_pins>;
|
||||
};
|
||||
|
||||
&display_subsystem {
|
||||
status = "okay";
|
||||
logo-memory-region = <&drm_logo>;
|
||||
};
|
||||
|
||||
&rgb {
|
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status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&lcd_pins>;
|
||||
|
||||
ports {
|
||||
rgb_out: port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
rgb_out_panel: endpoint@0 {
|
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reg = <0>;
|
||||
remote-endpoint = <&panel_in_rgb>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
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&rgb_in_vop {
|
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status = "okay";
|
||||
};
|
||||
|
||||
&route_rgb {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&vop {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <100000>;
|
||||
GT911:touchscreen {
|
||||
compatible = "goodix,gt911";
|
||||
reg = <0x14>;
|
||||
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <RK_PA3 IRQ_TYPE_EDGE_FALLING>;
|
||||
|
||||
reset-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
|
||||
pinctrl-names = "default";
|
||||
};
|
||||
};
|
||||
|
||||
/**************************** PINCTRL ******************************/
|
||||
// SPI
|
||||
&spi0 {
|
||||
pinctrl-0 = <&spi0m0_clk &spi0m0_miso &spi0m0_mosi &spi0m0_cs0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
spidev@0 {
|
||||
compatible = "rockchip,spidev";
|
||||
spi-max-frequency = <50000000>;
|
||||
reg = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
// I2C
|
||||
&i2c1 {
|
||||
pinctrl-0 = <&i2c1m1_xfer>;
|
||||
};
|
||||
&i2c2 {
|
||||
pinctrl-0 = <&i2c2m0_xfer>;
|
||||
};
|
||||
&i2c3 {
|
||||
pinctrl-0 = <&i2c3m0_xfer &i2c3m1_xfer &i2c3m2_xfer &tp_rst &tp_irq>;
|
||||
};
|
||||
&i2c4 {
|
||||
pinctrl-0 = <&i2c4m0_xfer &i2c4m1_xfer &i2c4m2_xfer>;
|
||||
};
|
||||
|
||||
// UART
|
||||
&uart0 {
|
||||
pinctrl-0 = <&uart0m0_xfer &uart0m1_xfer>;
|
||||
};
|
||||
&uart1 {
|
||||
pinctrl-0 = <&uart1m1_xfer>;
|
||||
};
|
||||
&uart3 {
|
||||
pinctrl-0 = <&uart3m0_xfer &uart3m1_xfer>;
|
||||
};
|
||||
&uart4 {
|
||||
pinctrl-0 = <&uart4m0_xfer>;
|
||||
};
|
||||
&uart5 {
|
||||
pinctrl-0 = <&uart5m1_xfer>;
|
||||
};
|
||||
|
||||
// PWM
|
||||
&pwm0 {
|
||||
pinctrl-0 = <&pwm0m1_pins>;
|
||||
};
|
||||
&pwm2 {
|
||||
pinctrl-0 = <&pwm2m1_pins &pwm2m2_pins>;
|
||||
};
|
||||
&pwm3 {
|
||||
pinctrl-0 = <&pwm3m2_pins>;
|
||||
};
|
||||
&pwm4 {
|
||||
pinctrl-0 = <&pwm4m0_pins &pwm4m1_pins &pwm4m2_pins>;
|
||||
};
|
||||
&pwm5 {
|
||||
pinctrl-0 = <&pwm5m1_pins &pwm5m2_pins>;
|
||||
};
|
||||
&pwm6 {
|
||||
pinctrl-0 = <&pwm6m1_pins &pwm6m2_pins>;
|
||||
};
|
||||
&pwm7 {
|
||||
pinctrl-0 = <&pwm7m0_pins &pwm7m1_pins>;
|
||||
};
|
||||
&pwm8 {
|
||||
pinctrl-0 = <&pwm8m1_pins>;
|
||||
};
|
||||
&pwm9 {
|
||||
pinctrl-0 = <&pwm9m1_pins>;
|
||||
};
|
||||
&pwm10 {
|
||||
pinctrl-0 = <&pwm10m1_pins &pwm10m2_pins>;
|
||||
};
|
||||
&pwm11 {
|
||||
pinctrl-0 = <&pwm11m1_pins &pwm11m2_pins>;
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
spi0 {
|
||||
spi0m0_clk: spi0m0-clk {
|
||||
rockchip,pins = <1 RK_PC1 4 &pcfg_pull_none>;
|
||||
};
|
||||
spi0m0_mosi: spi0m0-mosi {
|
||||
rockchip,pins = <1 RK_PC2 6 &pcfg_pull_none>;
|
||||
};
|
||||
spi0m0_miso: spi0m0-miso {
|
||||
rockchip,pins = <1 RK_PC3 6 &pcfg_pull_none>;
|
||||
};
|
||||
spi0m0_cs0: spi0m0-cs0 {
|
||||
rockchip,pins = <1 RK_PC0 4 &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
|
||||
touchscreen {
|
||||
tp_rst:tp-rst {
|
||||
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
|
||||
};
|
||||
|
||||
tp_irq:tp-irq {
|
||||
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
|
||||
};
|
||||
};
|
||||
};
|
||||
Loading…
Add table
Add a link
Reference in a new issue