mirror of
https://github.com/amadvance/snapraid.git
synced 2026-10-26 19:01:57 -04:00
Merge branch 'avx2'
This commit is contained in:
Andrea Mazzoleni
commit
1b87e09588
10 changed files with 1431 additions and 20 deletions
170
cmdline/speed.c
170
cmdline/speed.c
|
|
@ -122,13 +122,12 @@ void speed(int period)
|
|||
|
||||
raid_cpu_info(vendor, &family, &model);
|
||||
|
||||
printf("CPU %s, family %u, model %u, flags%s%s%s%s%s%s%s%s%s\n", vendor, family, model,
|
||||
printf("CPU %s, family %u, model %u, flags%s%s%s%s%s%s%s%s\n", vendor, family, model,
|
||||
raid_cpu_has_mmx() ? " mmx" : "",
|
||||
raid_cpu_has_sse2() ? " sse2" : "",
|
||||
raid_cpu_has_ssse3() ? " ssse3" : "",
|
||||
raid_cpu_has_sse42() ? " sse42" : "",
|
||||
raid_cpu_has_avx() ? " avx" : "",
|
||||
raid_cpu_has_avx2() ? "avx2" : "",
|
||||
raid_cpu_has_avx2() ? " avx2" : "",
|
||||
raid_cpu_has_slowmult() ? " slowmult" : "",
|
||||
raid_cpu_has_slowpshufb() ? " slowpshufb" : "",
|
||||
raid_cpu_has_slowextendedreg() ? " slowext" : ""
|
||||
|
|
@ -157,7 +156,7 @@ void speed(int period)
|
|||
|
||||
printf("Speed test using %u data buffers of %u bytes, for a total of %u KiB.\n", nd, size, nd * size / 1024);
|
||||
printf("Memory blocks have a displacement of %u bytes to improve cache performance.\n", RAID_MALLOC_DISPLACEMENT);
|
||||
printf("The reported value is the aggregate bandwidth of all data blocks in MiB/s,\n");
|
||||
printf("The reported values are the aggregate bandwidth of all data blocks in MiB/s,\n");
|
||||
printf("not counting parity blocks.\n");
|
||||
printf("\n");
|
||||
|
||||
|
|
@ -259,6 +258,10 @@ void speed(int period)
|
|||
printf("%8s", "ssse3");
|
||||
#ifdef CONFIG_X86_64
|
||||
printf("%8s", "ssse3e");
|
||||
#endif
|
||||
printf("%8s", "avx2");
|
||||
#ifdef CONFIG_X86_64
|
||||
printf("%8s", "avx2e");
|
||||
#endif
|
||||
#endif
|
||||
printf("\n");
|
||||
|
|
@ -290,6 +293,23 @@ void speed(int period)
|
|||
raid_gen1_sse2(nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
fflush(stdout);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
printf("%8s", "");
|
||||
#endif
|
||||
printf("%8s", "");
|
||||
#ifdef CONFIG_X86_64
|
||||
printf("%8s", "");
|
||||
#endif
|
||||
|
||||
if (raid_cpu_has_avx2()) {
|
||||
SPEED_START {
|
||||
raid_gen1_avx2(nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
fflush(stdout);
|
||||
}
|
||||
|
|
@ -333,8 +353,24 @@ void speed(int period)
|
|||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
fflush(stdout);
|
||||
#else
|
||||
printf("%8s", "");
|
||||
#endif
|
||||
}
|
||||
|
||||
printf("%8s", "");
|
||||
#ifdef CONFIG_X86_64
|
||||
printf("%8s", "");
|
||||
#endif
|
||||
|
||||
if (raid_cpu_has_avx2()) {
|
||||
SPEED_START {
|
||||
raid_gen2_avx2(nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
fflush(stdout);
|
||||
}
|
||||
#endif
|
||||
printf("\n");
|
||||
|
||||
|
|
@ -377,6 +413,23 @@ void speed(int period)
|
|||
fflush(stdout);
|
||||
#endif
|
||||
}
|
||||
|
||||
printf("%8s", "");
|
||||
#ifdef CONFIG_X86_64
|
||||
printf("%8s", "");
|
||||
#endif
|
||||
printf("%8s", "");
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
if (raid_cpu_has_avx2()) {
|
||||
SPEED_START {
|
||||
raid_genz_avx2ext(nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
fflush(stdout);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
printf("\n");
|
||||
|
||||
|
|
@ -423,6 +476,19 @@ void speed(int period)
|
|||
fflush(stdout);
|
||||
#endif
|
||||
}
|
||||
|
||||
printf("%8s", "");
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
if (raid_cpu_has_avx2()) {
|
||||
SPEED_START {
|
||||
raid_gen3_avx2ext(nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
fflush(stdout);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
printf("\n");
|
||||
|
||||
|
|
@ -469,6 +535,19 @@ void speed(int period)
|
|||
fflush(stdout);
|
||||
#endif
|
||||
}
|
||||
|
||||
printf("%8s", "");
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
if (raid_cpu_has_avx2()) {
|
||||
SPEED_START {
|
||||
raid_gen4_avx2ext(nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
fflush(stdout);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
printf("\n");
|
||||
|
||||
|
|
@ -515,6 +594,19 @@ void speed(int period)
|
|||
fflush(stdout);
|
||||
#endif
|
||||
}
|
||||
|
||||
printf("%8s", "");
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
if (raid_cpu_has_avx2()) {
|
||||
SPEED_START {
|
||||
raid_gen5_avx2ext(nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
fflush(stdout);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
printf("\n");
|
||||
|
||||
|
|
@ -561,6 +653,19 @@ void speed(int period)
|
|||
fflush(stdout);
|
||||
#endif
|
||||
}
|
||||
|
||||
printf("%8s", "");
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
if (raid_cpu_has_avx2()) {
|
||||
SPEED_START {
|
||||
raid_gen6_avx2ext(nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
fflush(stdout);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
printf("\n");
|
||||
printf("\n");
|
||||
|
|
@ -572,6 +677,7 @@ void speed(int period)
|
|||
printf("%8s", "int8");
|
||||
#ifdef CONFIG_X86
|
||||
printf("%8s", "ssse3");
|
||||
printf("%8s", "avx2");
|
||||
#endif
|
||||
printf("\n");
|
||||
|
||||
|
|
@ -598,6 +704,16 @@ void speed(int period)
|
|||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
}
|
||||
|
||||
if (raid_cpu_has_avx2()) {
|
||||
SPEED_START {
|
||||
for (j = 0; j < nd; ++j)
|
||||
/* +1 to avoid GEN1 optimized case */
|
||||
raid_rec1_avx2(1, id, ip + 1, nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
}
|
||||
#endif
|
||||
printf("\n");
|
||||
|
||||
|
|
@ -624,6 +740,16 @@ void speed(int period)
|
|||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
}
|
||||
|
||||
if (raid_cpu_has_avx2()) {
|
||||
SPEED_START {
|
||||
for (j = 0; j < nd; ++j)
|
||||
/* +1 to avoid GEN1 optimized case */
|
||||
raid_rec2_avx2(2, id, ip + 1, nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
}
|
||||
#endif
|
||||
printf("\n");
|
||||
|
||||
|
|
@ -648,6 +774,15 @@ void speed(int period)
|
|||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
}
|
||||
|
||||
if (raid_cpu_has_avx2()) {
|
||||
SPEED_START {
|
||||
for (j = 0; j < nd; ++j)
|
||||
raid_recX_avx2(3, id, ip, nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
}
|
||||
#endif
|
||||
printf("\n");
|
||||
|
||||
|
|
@ -672,6 +807,15 @@ void speed(int period)
|
|||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
}
|
||||
|
||||
if (raid_cpu_has_avx2()) {
|
||||
SPEED_START {
|
||||
for (j = 0; j < nd; ++j)
|
||||
raid_recX_avx2(4, id, ip, nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
}
|
||||
#endif
|
||||
printf("\n");
|
||||
|
||||
|
|
@ -696,6 +840,15 @@ void speed(int period)
|
|||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
}
|
||||
|
||||
if (raid_cpu_has_avx2()) {
|
||||
SPEED_START {
|
||||
for (j = 0; j < nd; ++j)
|
||||
raid_recX_avx2(5, id, ip, nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
}
|
||||
#endif
|
||||
printf("\n");
|
||||
|
||||
|
|
@ -720,6 +873,15 @@ void speed(int period)
|
|||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
}
|
||||
|
||||
if (raid_cpu_has_avx2()) {
|
||||
SPEED_START {
|
||||
for (j = 0; j < nd; ++j)
|
||||
raid_recX_avx2(6, id, ip, nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
}
|
||||
#endif
|
||||
printf("\n");
|
||||
printf("\n");
|
||||
|
|
|
|||
28
raid/cpu.h
28
raid/cpu.h
|
|
@ -106,19 +106,43 @@ static inline int raid_cpu_has_sse42(void)
|
|||
return (reg[2] >> 20) & 1;
|
||||
}
|
||||
|
||||
static inline int raid_cpu_has_avx(void)
|
||||
static inline int raid_cpu_has_xsavexrstor(void)
|
||||
{
|
||||
uint32_t reg[4];
|
||||
|
||||
raid_cpuid(1, 0, reg);
|
||||
|
||||
return (reg[2] >> 28) & 1;
|
||||
return (reg[2] >> 27) & 1;
|
||||
}
|
||||
|
||||
static inline int raid_os_support_256bit_regs(void)
|
||||
{
|
||||
uint32_t reg[4];
|
||||
|
||||
/* get the value of the Extended Control Register ecx=0 */
|
||||
asm volatile(
|
||||
"xgetbv\n"
|
||||
: "=a" (reg[0]), "=d" (reg[3])
|
||||
: "c" (0)
|
||||
);
|
||||
|
||||
/* check if the OS save all the 256 bits registers */
|
||||
return (reg[0] & 0x6) == 0x6;
|
||||
}
|
||||
|
||||
static inline int raid_cpu_has_avx2(void)
|
||||
{
|
||||
uint32_t reg[4];
|
||||
|
||||
/* check if the CPU supports XSAVE and XRSTOR, and also XGETBV */
|
||||
if (!raid_cpu_has_xsavexrstor())
|
||||
return 0;
|
||||
|
||||
/* check if the OS supports AVX2 registers */
|
||||
if (!raid_os_support_256bit_regs())
|
||||
return 0;
|
||||
|
||||
/* now check for AVX2 support */
|
||||
raid_cpuid(7, 0, reg);
|
||||
|
||||
return (reg[1] >> 5) & 1;
|
||||
|
|
|
|||
|
|
@ -67,32 +67,42 @@ void raid_rec2of2_int8(int *id, int *ip, int nd, size_t size, void **vv);
|
|||
void raid_gen1_int32(int nd, size_t size, void **vv);
|
||||
void raid_gen1_int64(int nd, size_t size, void **vv);
|
||||
void raid_gen1_sse2(int nd, size_t size, void **vv);
|
||||
void raid_gen1_avx2(int nd, size_t size, void **vv);
|
||||
void raid_gen2_int32(int nd, size_t size, void **vv);
|
||||
void raid_gen2_int64(int nd, size_t size, void **vv);
|
||||
void raid_gen2_sse2(int nd, size_t size, void **vv);
|
||||
void raid_gen2_avx2(int nd, size_t size, void **vv);
|
||||
void raid_gen2_sse2ext(int nd, size_t size, void **vv);
|
||||
void raid_genz_int32(int nd, size_t size, void **vv);
|
||||
void raid_genz_int64(int nd, size_t size, void **vv);
|
||||
void raid_genz_sse2(int nd, size_t size, void **vv);
|
||||
void raid_genz_sse2ext(int nd, size_t size, void **vv);
|
||||
void raid_genz_avx2ext(int nd, size_t size, void **vv);
|
||||
void raid_gen3_int8(int nd, size_t size, void **vv);
|
||||
void raid_gen3_ssse3(int nd, size_t size, void **vv);
|
||||
void raid_gen3_ssse3ext(int nd, size_t size, void **vv);
|
||||
void raid_gen3_avx2ext(int nd, size_t size, void **vv);
|
||||
void raid_gen4_int8(int nd, size_t size, void **vv);
|
||||
void raid_gen4_ssse3(int nd, size_t size, void **vv);
|
||||
void raid_gen4_ssse3ext(int nd, size_t size, void **vv);
|
||||
void raid_gen4_avx2ext(int nd, size_t size, void **vv);
|
||||
void raid_gen5_int8(int nd, size_t size, void **vv);
|
||||
void raid_gen5_ssse3(int nd, size_t size, void **vv);
|
||||
void raid_gen5_ssse3ext(int nd, size_t size, void **vv);
|
||||
void raid_gen5_avx2ext(int nd, size_t size, void **vv);
|
||||
void raid_gen6_int8(int nd, size_t size, void **vv);
|
||||
void raid_gen6_ssse3(int nd, size_t size, void **vv);
|
||||
void raid_gen6_ssse3ext(int nd, size_t size, void **vv);
|
||||
void raid_gen6_avx2ext(int nd, size_t size, void **vv);
|
||||
void raid_rec1_int8(int nr, int *id, int *ip, int nd, size_t size, void **vv);
|
||||
void raid_rec2_int8(int nr, int *id, int *ip, int nd, size_t size, void **vv);
|
||||
void raid_recX_int8(int nr, int *id, int *ip, int nd, size_t size, void **vv);
|
||||
void raid_rec1_ssse3(int nr, int *id, int *ip, int nd, size_t size, void **vv);
|
||||
void raid_rec2_ssse3(int nr, int *id, int *ip, int nd, size_t size, void **vv);
|
||||
void raid_recX_ssse3(int nr, int *id, int *ip, int nd, size_t size, void **vv);
|
||||
void raid_rec1_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv);
|
||||
void raid_rec2_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv);
|
||||
void raid_recX_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv);
|
||||
|
||||
/*
|
||||
* Internal naming.
|
||||
|
|
|
|||
|
|
@ -79,6 +79,24 @@ void raid_init(void)
|
|||
raid_rec_ptr[4] = raid_recX_ssse3;
|
||||
raid_rec_ptr[5] = raid_recX_ssse3;
|
||||
}
|
||||
|
||||
if (raid_cpu_has_avx2()) {
|
||||
raid_gen_ptr[0] = raid_gen1_avx2;
|
||||
raid_gen_ptr[1] = raid_gen2_avx2;
|
||||
#ifdef CONFIG_X86_64
|
||||
raid_gen3_ptr = raid_gen3_avx2ext;
|
||||
raid_genz_ptr = raid_genz_avx2ext;
|
||||
raid_gen_ptr[3] = raid_gen4_avx2ext;
|
||||
raid_gen_ptr[4] = raid_gen5_avx2ext;
|
||||
raid_gen_ptr[5] = raid_gen6_avx2ext;
|
||||
#endif
|
||||
raid_rec_ptr[0] = raid_rec1_avx2;
|
||||
raid_rec_ptr[1] = raid_rec2_avx2;
|
||||
raid_rec_ptr[2] = raid_recX_avx2;
|
||||
raid_rec_ptr[3] = raid_recX_avx2;
|
||||
raid_rec_ptr[4] = raid_recX_avx2;
|
||||
raid_rec_ptr[5] = raid_recX_avx2;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* set the default mode */
|
||||
|
|
|
|||
10
raid/tag.c
10
raid/tag.c
|
|
@ -43,6 +43,11 @@ static struct raid_func {
|
|||
{ "ssse3", raid_rec1_ssse3 },
|
||||
{ "ssse3", raid_rec2_ssse3 },
|
||||
{ "ssse3", raid_recX_ssse3 },
|
||||
{ "avx2", raid_gen1_avx2 },
|
||||
{ "avx2", raid_gen2_avx2 },
|
||||
{ "avx2", raid_rec1_avx2 },
|
||||
{ "avx2", raid_rec2_avx2 },
|
||||
{ "avx2", raid_recX_avx2 },
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
|
|
@ -52,6 +57,11 @@ static struct raid_func {
|
|||
{ "ssse3e", raid_gen4_ssse3ext },
|
||||
{ "ssse3e", raid_gen5_ssse3ext },
|
||||
{ "ssse3e", raid_gen6_ssse3ext },
|
||||
{ "avx2e", raid_gen3_avx2ext },
|
||||
{ "avx2e", raid_genz_avx2ext },
|
||||
{ "avx2e", raid_gen4_avx2ext },
|
||||
{ "avx2e", raid_gen5_avx2ext },
|
||||
{ "avx2e", raid_gen6_avx2ext },
|
||||
#endif
|
||||
{ 0, 0 }
|
||||
};
|
||||
|
|
|
|||
25
raid/test.c
25
raid/test.c
|
|
@ -185,18 +185,24 @@ int raid_test_rec(int mode, int nd, size_t size)
|
|||
#ifdef CONFIG_X86
|
||||
if (raid_cpu_has_ssse3())
|
||||
f[i][nf[i]++] = raid_rec1_ssse3;
|
||||
if (raid_cpu_has_avx2())
|
||||
f[i][nf[i]++] = raid_rec1_avx2;
|
||||
#endif
|
||||
} else if (i == 1) {
|
||||
f[i][nf[i]++] = raid_rec2_int8;
|
||||
#ifdef CONFIG_X86
|
||||
if (raid_cpu_has_ssse3())
|
||||
f[i][nf[i]++] = raid_rec2_ssse3;
|
||||
if (raid_cpu_has_avx2())
|
||||
f[i][nf[i]++] = raid_rec2_avx2;
|
||||
#endif
|
||||
} else {
|
||||
f[i][nf[i]++] = raid_recX_int8;
|
||||
#ifdef CONFIG_X86
|
||||
if (raid_cpu_has_ssse3())
|
||||
f[i][nf[i]++] = raid_recX_ssse3;
|
||||
if (raid_cpu_has_avx2())
|
||||
f[i][nf[i]++] = raid_recX_avx2;
|
||||
#endif
|
||||
}
|
||||
}
|
||||
|
|
@ -309,6 +315,11 @@ int raid_test_par(int mode, int nd, size_t size)
|
|||
f[nf++] = raid_gen2_sse2ext;
|
||||
#endif
|
||||
}
|
||||
|
||||
if (raid_cpu_has_avx2()) {
|
||||
f[nf++] = raid_gen1_avx2;
|
||||
f[nf++] = raid_gen2_avx2;
|
||||
}
|
||||
#endif
|
||||
|
||||
if (mode == RAID_MODE_CAUCHY) {
|
||||
|
|
@ -330,6 +341,15 @@ int raid_test_par(int mode, int nd, size_t size)
|
|||
f[nf++] = raid_gen6_ssse3ext;
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
if (raid_cpu_has_avx2()) {
|
||||
f[nf++] = raid_gen3_avx2ext;
|
||||
f[nf++] = raid_gen4_avx2ext;
|
||||
f[nf++] = raid_gen5_avx2ext;
|
||||
f[nf++] = raid_gen6_avx2ext;
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
} else {
|
||||
f[nf++] = raid_genz_int32;
|
||||
|
|
@ -342,6 +362,11 @@ int raid_test_par(int mode, int nd, size_t size)
|
|||
f[nf++] = raid_genz_sse2ext;
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
if (raid_cpu_has_avx2())
|
||||
f[nf++] = raid_genz_avx2ext;
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -46,6 +46,8 @@ int main(void)
|
|||
printf("Including x86 SSE2 functions\n");
|
||||
if (raid_cpu_has_ssse3())
|
||||
printf("Including x86 SSSE3 functions\n");
|
||||
if (raid_cpu_has_avx2())
|
||||
printf("Including x86 AVX2 functions\n");
|
||||
#endif
|
||||
#ifdef CONFIG_X86_64
|
||||
printf("Including x64 extended SSE register set\n");
|
||||
|
|
|
|||
|
|
@ -112,7 +112,7 @@ void speed(void)
|
|||
|
||||
printf("Speed test using %u data buffers of %u bytes, for a total of %u KiB.\n", nd, size, nd * size / 1024);
|
||||
printf("Memory blocks have a displacement of %u bytes to improve cache performance.\n", RAID_MALLOC_DISPLACEMENT);
|
||||
printf("The reported value is the aggregate bandwidth of all data blocks in MiB/s,\n");
|
||||
printf("The reported values are the aggregate bandwidth of all data blocks in MiB/s,\n");
|
||||
printf("not counting parity blocks.\n");
|
||||
printf("\n");
|
||||
|
||||
|
|
@ -144,6 +144,10 @@ void speed(void)
|
|||
printf("%8s", "ssse3");
|
||||
#ifdef CONFIG_X86_64
|
||||
printf("%8s", "ssse3e");
|
||||
#endif
|
||||
printf("%8s", "avx2");
|
||||
#ifdef CONFIG_X86_64
|
||||
printf("%8s", "avx2e");
|
||||
#endif
|
||||
#endif
|
||||
printf("\n");
|
||||
|
|
@ -175,6 +179,23 @@ void speed(void)
|
|||
raid_gen1_sse2(nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
fflush(stdout);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
printf("%8s", "");
|
||||
#endif
|
||||
printf("%8s", "");
|
||||
#ifdef CONFIG_X86_64
|
||||
printf("%8s", "");
|
||||
#endif
|
||||
|
||||
if (raid_cpu_has_avx2()) {
|
||||
SPEED_START {
|
||||
raid_gen1_avx2(nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
fflush(stdout);
|
||||
}
|
||||
|
|
@ -218,8 +239,24 @@ void speed(void)
|
|||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
fflush(stdout);
|
||||
#else
|
||||
printf("%8s", "");
|
||||
#endif
|
||||
}
|
||||
|
||||
printf("%8s", "");
|
||||
#ifdef CONFIG_X86_64
|
||||
printf("%8s", "");
|
||||
#endif
|
||||
|
||||
if (raid_cpu_has_avx2()) {
|
||||
SPEED_START {
|
||||
raid_gen2_avx2(nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
fflush(stdout);
|
||||
}
|
||||
#endif
|
||||
printf("\n");
|
||||
|
||||
|
|
@ -262,6 +299,23 @@ void speed(void)
|
|||
fflush(stdout);
|
||||
#endif
|
||||
}
|
||||
|
||||
printf("%8s", "");
|
||||
#ifdef CONFIG_X86_64
|
||||
printf("%8s", "");
|
||||
#endif
|
||||
printf("%8s", "");
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
if (raid_cpu_has_avx2()) {
|
||||
SPEED_START {
|
||||
raid_genz_avx2ext(nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
fflush(stdout);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
printf("\n");
|
||||
|
||||
|
|
@ -308,6 +362,19 @@ void speed(void)
|
|||
fflush(stdout);
|
||||
#endif
|
||||
}
|
||||
|
||||
printf("%8s", "");
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
if (raid_cpu_has_avx2()) {
|
||||
SPEED_START {
|
||||
raid_gen3_avx2ext(nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
fflush(stdout);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
printf("\n");
|
||||
|
||||
|
|
@ -354,6 +421,19 @@ void speed(void)
|
|||
fflush(stdout);
|
||||
#endif
|
||||
}
|
||||
|
||||
printf("%8s", "");
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
if (raid_cpu_has_avx2()) {
|
||||
SPEED_START {
|
||||
raid_gen4_avx2ext(nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
fflush(stdout);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
printf("\n");
|
||||
|
||||
|
|
@ -400,6 +480,19 @@ void speed(void)
|
|||
fflush(stdout);
|
||||
#endif
|
||||
}
|
||||
|
||||
printf("%8s", "");
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
if (raid_cpu_has_avx2()) {
|
||||
SPEED_START {
|
||||
raid_gen5_avx2ext(nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
fflush(stdout);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
printf("\n");
|
||||
|
||||
|
|
@ -446,6 +539,19 @@ void speed(void)
|
|||
fflush(stdout);
|
||||
#endif
|
||||
}
|
||||
|
||||
printf("%8s", "");
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
if (raid_cpu_has_avx2()) {
|
||||
SPEED_START {
|
||||
raid_gen6_avx2ext(nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
fflush(stdout);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
printf("\n");
|
||||
printf("\n");
|
||||
|
|
@ -457,6 +563,7 @@ void speed(void)
|
|||
printf("%8s", "int8");
|
||||
#ifdef CONFIG_X86
|
||||
printf("%8s", "ssse3");
|
||||
printf("%8s", "avx2");
|
||||
#endif
|
||||
printf("\n");
|
||||
|
||||
|
|
@ -483,6 +590,16 @@ void speed(void)
|
|||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
}
|
||||
|
||||
if (raid_cpu_has_avx2()) {
|
||||
SPEED_START {
|
||||
for (j = 0; j < nd; ++j)
|
||||
/* +1 to avoid GEN1 optimized case */
|
||||
raid_rec1_avx2(1, id, ip + 1, nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
}
|
||||
#endif
|
||||
printf("\n");
|
||||
|
||||
|
|
@ -509,6 +626,16 @@ void speed(void)
|
|||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
}
|
||||
|
||||
if (raid_cpu_has_avx2()) {
|
||||
SPEED_START {
|
||||
for (j = 0; j < nd; ++j)
|
||||
/* +1 to avoid GEN1 optimized case */
|
||||
raid_rec2_avx2(2, id, ip + 1, nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
}
|
||||
#endif
|
||||
printf("\n");
|
||||
|
||||
|
|
@ -533,6 +660,15 @@ void speed(void)
|
|||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
}
|
||||
|
||||
if (raid_cpu_has_avx2()) {
|
||||
SPEED_START {
|
||||
for (j = 0; j < nd; ++j)
|
||||
raid_recX_avx2(3, id, ip, nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
}
|
||||
#endif
|
||||
printf("\n");
|
||||
|
||||
|
|
@ -557,6 +693,15 @@ void speed(void)
|
|||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
}
|
||||
|
||||
if (raid_cpu_has_avx2()) {
|
||||
SPEED_START {
|
||||
for (j = 0; j < nd; ++j)
|
||||
raid_recX_avx2(4, id, ip, nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
}
|
||||
#endif
|
||||
printf("\n");
|
||||
|
||||
|
|
@ -581,6 +726,15 @@ void speed(void)
|
|||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
}
|
||||
|
||||
if (raid_cpu_has_avx2()) {
|
||||
SPEED_START {
|
||||
for (j = 0; j < nd; ++j)
|
||||
raid_recX_avx2(5, id, ip, nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
}
|
||||
#endif
|
||||
printf("\n");
|
||||
|
||||
|
|
@ -605,6 +759,15 @@ void speed(void)
|
|||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
}
|
||||
|
||||
if (raid_cpu_has_avx2()) {
|
||||
SPEED_START {
|
||||
for (j = 0; j < nd; ++j)
|
||||
raid_recX_avx2(6, id, ip, nd, size, v);
|
||||
} SPEED_STOP
|
||||
|
||||
printf("%8"PRIu64, ds / dt);
|
||||
}
|
||||
#endif
|
||||
printf("\n");
|
||||
printf("\n");
|
||||
|
|
@ -624,6 +787,8 @@ int main(void)
|
|||
printf("Including x86 SSE2 functions\n");
|
||||
if (raid_cpu_has_ssse3())
|
||||
printf("Including x86 SSSE3 functions\n");
|
||||
if (raid_cpu_has_avx2())
|
||||
printf("Including x86 AVX2 functions\n");
|
||||
#endif
|
||||
#ifdef CONFIG_X86_64
|
||||
printf("Including x64 extended SSE register set\n");
|
||||
|
|
|
|||
922
raid/x86.c
922
raid/x86.c
|
|
@ -56,15 +56,56 @@ void raid_gen1_sse2(int nd, size_t size, void **vv)
|
|||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_X86
|
||||
/*
|
||||
* GEN1 (RAID5 with xor) AVX2 implementation
|
||||
*
|
||||
* Intentionally don't process more than 64 bytes because 64 is the typical
|
||||
* cache block, and processing 128 bytes doesn't increase performance, and in
|
||||
* some cases it even decreases it.
|
||||
*/
|
||||
void raid_gen1_avx2(int nd, size_t size, void **vv)
|
||||
{
|
||||
uint8_t **v = (uint8_t **)vv;
|
||||
uint8_t *p;
|
||||
int d, l;
|
||||
size_t i;
|
||||
|
||||
l = nd - 1;
|
||||
p = v[nd];
|
||||
|
||||
raid_asm_begin();
|
||||
|
||||
for (i = 0; i < size; i += 64) {
|
||||
asm volatile("vmovdqa %0,%%ymm0" : : "m" (v[l][i]));
|
||||
asm volatile("vmovdqa %0,%%ymm2" : : "m" (v[l][i+32]));
|
||||
for (d = l-1; d >= 0; --d) {
|
||||
asm volatile("vpxor %0,%%ymm0,%%ymm0" : : "m" (v[d][i]));
|
||||
asm volatile("vpxor %0,%%ymm2,%%ymm2" : : "m" (v[d][i+32]));
|
||||
}
|
||||
asm volatile("vmovntdq %%ymm0,%0" : "=m" (p[i]));
|
||||
asm volatile("vmovntdq %%ymm2,%0" : "=m" (p[i+32]));
|
||||
}
|
||||
|
||||
asm volatile("vzeroupper" : : : "memory");
|
||||
|
||||
raid_asm_end();
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_X86
|
||||
static const struct gfconst16 {
|
||||
uint8_t poly[16];
|
||||
uint8_t low4[16];
|
||||
} gfconst16 __aligned(32) = {
|
||||
{ 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d,
|
||||
0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d },
|
||||
{ 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f,
|
||||
0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f },
|
||||
} gfconst16 __aligned(32) = {
|
||||
{
|
||||
0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d,
|
||||
0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d
|
||||
},
|
||||
{
|
||||
0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f,
|
||||
0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f
|
||||
},
|
||||
};
|
||||
#endif
|
||||
|
||||
|
|
@ -122,6 +163,61 @@ void raid_gen2_sse2(int nd, size_t size, void **vv)
|
|||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_X86
|
||||
/*
|
||||
* GEN2 (RAID6 with powers of 2) AVX2 implementation
|
||||
*/
|
||||
void raid_gen2_avx2(int nd, size_t size, void **vv)
|
||||
{
|
||||
uint8_t **v = (uint8_t **)vv;
|
||||
uint8_t *p;
|
||||
uint8_t *q;
|
||||
int d, l;
|
||||
size_t i;
|
||||
|
||||
l = nd - 1;
|
||||
p = v[nd];
|
||||
q = v[nd+1];
|
||||
|
||||
raid_asm_begin();
|
||||
|
||||
asm volatile("vbroadcasti128 %0, %%ymm7" : : "m" (gfconst16.poly[0]));
|
||||
asm volatile("vpxor %ymm6,%ymm6,%ymm6");
|
||||
|
||||
for (i = 0; i < size; i += 64) {
|
||||
asm volatile("vmovdqa %0,%%ymm0" : : "m" (v[l][i]));
|
||||
asm volatile("vmovdqa %0,%%ymm1" : : "m" (v[l][i+32]));
|
||||
asm volatile("vmovdqa %ymm0,%ymm2");
|
||||
asm volatile("vmovdqa %ymm1,%ymm3");
|
||||
for (d = l-1; d >= 0; --d) {
|
||||
asm volatile("vpcmpgtb %ymm2,%ymm6,%ymm4");
|
||||
asm volatile("vpcmpgtb %ymm3,%ymm6,%ymm5");
|
||||
asm volatile("vpaddb %ymm2,%ymm2,%ymm2");
|
||||
asm volatile("vpaddb %ymm3,%ymm3,%ymm3");
|
||||
asm volatile("vpand %ymm7,%ymm4,%ymm4");
|
||||
asm volatile("vpand %ymm7,%ymm5,%ymm5");
|
||||
asm volatile("vpxor %ymm4,%ymm2,%ymm2");
|
||||
asm volatile("vpxor %ymm5,%ymm3,%ymm3");
|
||||
|
||||
asm volatile("vmovdqa %0,%%ymm4" : : "m" (v[d][i]));
|
||||
asm volatile("vmovdqa %0,%%ymm5" : : "m" (v[d][i+32]));
|
||||
asm volatile("vpxor %ymm4,%ymm0,%ymm0");
|
||||
asm volatile("vpxor %ymm5,%ymm1,%ymm1");
|
||||
asm volatile("vpxor %ymm4,%ymm2,%ymm2");
|
||||
asm volatile("vpxor %ymm5,%ymm3,%ymm3");
|
||||
}
|
||||
asm volatile("vmovntdq %%ymm0,%0" : "=m" (p[i]));
|
||||
asm volatile("vmovntdq %%ymm1,%0" : "=m" (p[i+32]));
|
||||
asm volatile("vmovntdq %%ymm2,%0" : "=m" (q[i]));
|
||||
asm volatile("vmovntdq %%ymm3,%0" : "=m" (q[i+32]));
|
||||
}
|
||||
|
||||
asm volatile("vzeroupper" : : : "memory");
|
||||
|
||||
raid_asm_end();
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
/*
|
||||
* GEN2 (RAID6 with powers of 2) SSE2 implementation
|
||||
|
|
@ -440,6 +536,141 @@ void raid_gen3_ssse3ext(int nd, size_t size, void **vv)
|
|||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
/*
|
||||
* GEN3 (triple parity with Cauchy matrix) AVX2 implementation
|
||||
*
|
||||
* Note that it uses 16 registers, meaning that x64 is required.
|
||||
*/
|
||||
void raid_gen3_avx2ext(int nd, size_t size, void **vv)
|
||||
{
|
||||
uint8_t **v = (uint8_t **)vv;
|
||||
uint8_t *p;
|
||||
uint8_t *q;
|
||||
uint8_t *r;
|
||||
int d, l;
|
||||
size_t i;
|
||||
|
||||
l = nd - 1;
|
||||
p = v[nd];
|
||||
q = v[nd+1];
|
||||
r = v[nd+2];
|
||||
|
||||
/* special case with only one data disk */
|
||||
if (l == 0) {
|
||||
for (i = 0; i < 3; ++i)
|
||||
memcpy(v[1+i], v[0], size);
|
||||
return;
|
||||
}
|
||||
|
||||
raid_asm_begin();
|
||||
|
||||
/* generic case with at least two data disks */
|
||||
asm volatile("vbroadcasti128 %0, %%ymm3" : : "m" (gfconst16.poly[0]));
|
||||
asm volatile("vbroadcasti128 %0, %%ymm11" : : "m" (gfconst16.low4[0]));
|
||||
|
||||
for (i = 0; i < size; i += 64) {
|
||||
/* last disk without the by two multiplication */
|
||||
asm volatile("vmovdqa %0,%%ymm4" : : "m" (v[l][i]));
|
||||
asm volatile("vmovdqa %0,%%ymm12" : : "m" (v[l][i+32]));
|
||||
|
||||
asm volatile("vmovdqa %ymm4,%ymm0");
|
||||
asm volatile("vmovdqa %ymm4,%ymm1");
|
||||
asm volatile("vmovdqa %ymm12,%ymm8");
|
||||
asm volatile("vmovdqa %ymm12,%ymm9");
|
||||
|
||||
asm volatile("vpsrlw $4,%ymm4,%ymm5");
|
||||
asm volatile("vpsrlw $4,%ymm12,%ymm13");
|
||||
asm volatile("vpand %ymm11,%ymm4,%ymm4");
|
||||
asm volatile("vpand %ymm11,%ymm12,%ymm12");
|
||||
asm volatile("vpand %ymm11,%ymm5,%ymm5");
|
||||
asm volatile("vpand %ymm11,%ymm13,%ymm13");
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm10" : : "m" (gfgenpshufb[l][0][0][0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm15" : : "m" (gfgenpshufb[l][0][1][0]));
|
||||
asm volatile("vpshufb %ymm4,%ymm10,%ymm2");
|
||||
asm volatile("vpshufb %ymm12,%ymm10,%ymm10");
|
||||
asm volatile("vpshufb %ymm5,%ymm15,%ymm7");
|
||||
asm volatile("vpshufb %ymm13,%ymm15,%ymm15");
|
||||
asm volatile("vpxor %ymm7,%ymm2,%ymm2");
|
||||
asm volatile("vpxor %ymm15,%ymm10,%ymm10");
|
||||
|
||||
/* intermediate disks */
|
||||
for (d = l-1; d > 0; --d) {
|
||||
asm volatile("vmovdqa %0,%%ymm4" : : "m" (v[d][i]));
|
||||
asm volatile("vmovdqa %0,%%ymm12" : : "m" (v[d][i+32]));
|
||||
|
||||
asm volatile("vpxor %ymm5,%ymm5,%ymm5");
|
||||
asm volatile("vpxor %ymm13,%ymm13,%ymm13");
|
||||
asm volatile("vpcmpgtb %ymm1,%ymm5,%ymm5");
|
||||
asm volatile("vpcmpgtb %ymm9,%ymm13,%ymm13");
|
||||
asm volatile("vpaddb %ymm1,%ymm1,%ymm1");
|
||||
asm volatile("vpaddb %ymm9,%ymm9,%ymm9");
|
||||
asm volatile("vpand %ymm3,%ymm5,%ymm5");
|
||||
asm volatile("vpand %ymm3,%ymm13,%ymm13");
|
||||
asm volatile("vpxor %ymm5,%ymm1,%ymm1");
|
||||
asm volatile("vpxor %ymm13,%ymm9,%ymm9");
|
||||
|
||||
asm volatile("vpxor %ymm4,%ymm0,%ymm0");
|
||||
asm volatile("vpxor %ymm4,%ymm1,%ymm1");
|
||||
asm volatile("vpxor %ymm12,%ymm8,%ymm8");
|
||||
asm volatile("vpxor %ymm12,%ymm9,%ymm9");
|
||||
|
||||
asm volatile("vpsrlw $4,%ymm4,%ymm5");
|
||||
asm volatile("vpsrlw $4,%ymm12,%ymm13");
|
||||
asm volatile("vpand %ymm11,%ymm4,%ymm4");
|
||||
asm volatile("vpand %ymm11,%ymm12,%ymm12");
|
||||
asm volatile("vpand %ymm11,%ymm5,%ymm5");
|
||||
asm volatile("vpand %ymm11,%ymm13,%ymm13");
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm14" : : "m" (gfgenpshufb[d][0][0][0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm15" : : "m" (gfgenpshufb[d][0][1][0]));
|
||||
asm volatile("vpshufb %ymm4,%ymm14,%ymm6");
|
||||
asm volatile("vpshufb %ymm12,%ymm14,%ymm14");
|
||||
asm volatile("vpshufb %ymm5,%ymm15,%ymm7");
|
||||
asm volatile("vpshufb %ymm13,%ymm15,%ymm15");
|
||||
asm volatile("vpxor %ymm6,%ymm2,%ymm2");
|
||||
asm volatile("vpxor %ymm14,%ymm10,%ymm10");
|
||||
asm volatile("vpxor %ymm7,%ymm2,%ymm2");
|
||||
asm volatile("vpxor %ymm15,%ymm10,%ymm10");
|
||||
}
|
||||
|
||||
/* first disk with all coefficients at 1 */
|
||||
asm volatile("vmovdqa %0,%%ymm4" : : "m" (v[0][i]));
|
||||
asm volatile("vmovdqa %0,%%ymm12" : : "m" (v[0][i+32]));
|
||||
|
||||
asm volatile("vpxor %ymm5,%ymm5,%ymm5");
|
||||
asm volatile("vpxor %ymm13,%ymm13,%ymm13");
|
||||
asm volatile("vpcmpgtb %ymm1,%ymm5,%ymm5");
|
||||
asm volatile("vpcmpgtb %ymm9,%ymm13,%ymm13");
|
||||
asm volatile("vpaddb %ymm1,%ymm1,%ymm1");
|
||||
asm volatile("vpaddb %ymm9,%ymm9,%ymm9");
|
||||
asm volatile("vpand %ymm3,%ymm5,%ymm5");
|
||||
asm volatile("vpand %ymm3,%ymm13,%ymm13");
|
||||
asm volatile("vpxor %ymm5,%ymm1,%ymm1");
|
||||
asm volatile("vpxor %ymm13,%ymm9,%ymm9");
|
||||
|
||||
asm volatile("vpxor %ymm4,%ymm0,%ymm0");
|
||||
asm volatile("vpxor %ymm4,%ymm1,%ymm1");
|
||||
asm volatile("vpxor %ymm4,%ymm2,%ymm2");
|
||||
asm volatile("vpxor %ymm12,%ymm8,%ymm8");
|
||||
asm volatile("vpxor %ymm12,%ymm9,%ymm9");
|
||||
asm volatile("vpxor %ymm12,%ymm10,%ymm10");
|
||||
|
||||
asm volatile("vmovntdq %%ymm0,%0" : "=m" (p[i]));
|
||||
asm volatile("vmovntdq %%ymm8,%0" : "=m" (p[i+32]));
|
||||
asm volatile("vmovntdq %%ymm1,%0" : "=m" (q[i]));
|
||||
asm volatile("vmovntdq %%ymm9,%0" : "=m" (q[i+32]));
|
||||
asm volatile("vmovntdq %%ymm2,%0" : "=m" (r[i]));
|
||||
asm volatile("vmovntdq %%ymm10,%0" : "=m" (r[i+32]));
|
||||
}
|
||||
|
||||
asm volatile("vzeroupper" : : : "memory");
|
||||
|
||||
raid_asm_end();
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_X86
|
||||
/*
|
||||
* GEN4 (quad parity with Cauchy matrix) SSSE3 implementation
|
||||
|
|
@ -729,6 +960,169 @@ void raid_gen4_ssse3ext(int nd, size_t size, void **vv)
|
|||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
/*
|
||||
* GEN4 (quad parity with Cauchy matrix) AVX2 implementation
|
||||
*
|
||||
* Note that it uses 16 registers, meaning that x64 is required.
|
||||
*/
|
||||
void raid_gen4_avx2ext(int nd, size_t size, void **vv)
|
||||
{
|
||||
uint8_t **v = (uint8_t **)vv;
|
||||
uint8_t *p;
|
||||
uint8_t *q;
|
||||
uint8_t *r;
|
||||
uint8_t *s;
|
||||
int d, l;
|
||||
size_t i;
|
||||
|
||||
l = nd - 1;
|
||||
p = v[nd];
|
||||
q = v[nd+1];
|
||||
r = v[nd+2];
|
||||
s = v[nd+3];
|
||||
|
||||
/* special case with only one data disk */
|
||||
if (l == 0) {
|
||||
for (i = 0; i < 4; ++i)
|
||||
memcpy(v[1+i], v[0], size);
|
||||
return;
|
||||
}
|
||||
|
||||
raid_asm_begin();
|
||||
|
||||
/* generic case with at least two data disks */
|
||||
for (i = 0; i < size; i += 64) {
|
||||
/* last disk without the by two multiplication */
|
||||
asm volatile("vbroadcasti128 %0,%%ymm15" : : "m" (gfconst16.low4[0]));
|
||||
asm volatile("vmovdqa %0,%%ymm4" : : "m" (v[l][i]));
|
||||
asm volatile("vmovdqa %0,%%ymm12" : : "m" (v[l][i+32]));
|
||||
|
||||
asm volatile("vmovdqa %ymm4,%ymm0");
|
||||
asm volatile("vmovdqa %ymm4,%ymm1");
|
||||
asm volatile("vmovdqa %ymm12,%ymm8");
|
||||
asm volatile("vmovdqa %ymm12,%ymm9");
|
||||
|
||||
asm volatile("vpsrlw $4,%ymm4,%ymm5");
|
||||
asm volatile("vpsrlw $4,%ymm12,%ymm13");
|
||||
asm volatile("vpand %ymm15,%ymm4,%ymm4");
|
||||
asm volatile("vpand %ymm15,%ymm12,%ymm12");
|
||||
asm volatile("vpand %ymm15,%ymm5,%ymm5");
|
||||
asm volatile("vpand %ymm15,%ymm13,%ymm13");
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm10" : : "m" (gfgenpshufb[l][0][0][0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm15" : : "m" (gfgenpshufb[l][0][1][0]));
|
||||
asm volatile("vpshufb %ymm4,%ymm10,%ymm2");
|
||||
asm volatile("vpshufb %ymm5,%ymm15,%ymm7");
|
||||
asm volatile("vpshufb %ymm12,%ymm10,%ymm10");
|
||||
asm volatile("vpshufb %ymm13,%ymm15,%ymm15");
|
||||
asm volatile("vpxor %ymm7,%ymm2,%ymm2");
|
||||
asm volatile("vpxor %ymm15,%ymm10,%ymm10");
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm11" : : "m" (gfgenpshufb[l][1][0][0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm15" : : "m" (gfgenpshufb[l][1][1][0]));
|
||||
asm volatile("vpshufb %ymm4,%ymm11,%ymm3");
|
||||
asm volatile("vpshufb %ymm5,%ymm15,%ymm7");
|
||||
asm volatile("vpshufb %ymm12,%ymm11,%ymm11");
|
||||
asm volatile("vpshufb %ymm13,%ymm15,%ymm15");
|
||||
asm volatile("vpxor %ymm7,%ymm3,%ymm3");
|
||||
asm volatile("vpxor %ymm15,%ymm11,%ymm11");
|
||||
|
||||
/* intermediate disks */
|
||||
for (d = l-1; d > 0; --d) {
|
||||
asm volatile("vbroadcasti128 %0,%%ymm7" : : "m" (gfconst16.poly[0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm15" : : "m" (gfconst16.low4[0]));
|
||||
asm volatile("vmovdqa %0,%%ymm4" : : "m" (v[d][i]));
|
||||
asm volatile("vmovdqa %0,%%ymm12" : : "m" (v[d][i+32]));
|
||||
|
||||
asm volatile("vpxor %ymm5,%ymm5,%ymm5");
|
||||
asm volatile("vpxor %ymm13,%ymm13,%ymm13");
|
||||
asm volatile("vpcmpgtb %ymm1,%ymm5,%ymm5");
|
||||
asm volatile("vpcmpgtb %ymm9,%ymm13,%ymm13");
|
||||
asm volatile("vpaddb %ymm1,%ymm1,%ymm1");
|
||||
asm volatile("vpaddb %ymm9,%ymm9,%ymm9");
|
||||
asm volatile("vpand %ymm7,%ymm5,%ymm5");
|
||||
asm volatile("vpand %ymm7,%ymm13,%ymm13");
|
||||
asm volatile("vpxor %ymm5,%ymm1,%ymm1");
|
||||
asm volatile("vpxor %ymm13,%ymm9,%ymm9");
|
||||
|
||||
asm volatile("vpxor %ymm4,%ymm0,%ymm0");
|
||||
asm volatile("vpxor %ymm4,%ymm1,%ymm1");
|
||||
asm volatile("vpxor %ymm12,%ymm8,%ymm8");
|
||||
asm volatile("vpxor %ymm12,%ymm9,%ymm9");
|
||||
|
||||
asm volatile("vpsrlw $4,%ymm4,%ymm5");
|
||||
asm volatile("vpsrlw $4,%ymm12,%ymm13");
|
||||
asm volatile("vpand %ymm15,%ymm4,%ymm4");
|
||||
asm volatile("vpand %ymm15,%ymm12,%ymm12");
|
||||
asm volatile("vpand %ymm15,%ymm5,%ymm5");
|
||||
asm volatile("vpand %ymm15,%ymm13,%ymm13");
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm14" : : "m" (gfgenpshufb[d][0][0][0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm15" : : "m" (gfgenpshufb[d][0][1][0]));
|
||||
asm volatile("vpshufb %ymm4,%ymm14,%ymm6");
|
||||
asm volatile("vpshufb %ymm5,%ymm15,%ymm7");
|
||||
asm volatile("vpshufb %ymm12,%ymm14,%ymm14");
|
||||
asm volatile("vpshufb %ymm13,%ymm15,%ymm15");
|
||||
asm volatile("vpxor %ymm6,%ymm2,%ymm2");
|
||||
asm volatile("vpxor %ymm14,%ymm10,%ymm10");
|
||||
asm volatile("vpxor %ymm7,%ymm2,%ymm2");
|
||||
asm volatile("vpxor %ymm15,%ymm10,%ymm10");
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm14" : : "m" (gfgenpshufb[d][1][0][0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm15" : : "m" (gfgenpshufb[d][1][1][0]));
|
||||
asm volatile("vpshufb %ymm4,%ymm14,%ymm6");
|
||||
asm volatile("vpshufb %ymm5,%ymm15,%ymm7");
|
||||
asm volatile("vpshufb %ymm12,%ymm14,%ymm14");
|
||||
asm volatile("vpshufb %ymm13,%ymm15,%ymm15");
|
||||
asm volatile("vpxor %ymm6,%ymm3,%ymm3");
|
||||
asm volatile("vpxor %ymm14,%ymm11,%ymm11");
|
||||
asm volatile("vpxor %ymm7,%ymm3,%ymm3");
|
||||
asm volatile("vpxor %ymm15,%ymm11,%ymm11");
|
||||
}
|
||||
|
||||
/* first disk with all coefficients at 1 */
|
||||
asm volatile("vbroadcasti128 %0,%%ymm7" : : "m" (gfconst16.poly[0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm15" : : "m" (gfconst16.low4[0]));
|
||||
asm volatile("vmovdqa %0,%%ymm4" : : "m" (v[0][i]));
|
||||
asm volatile("vmovdqa %0,%%ymm12" : : "m" (v[0][i+32]));
|
||||
|
||||
asm volatile("vpxor %ymm5,%ymm5,%ymm5");
|
||||
asm volatile("vpxor %ymm13,%ymm13,%ymm13");
|
||||
asm volatile("vpcmpgtb %ymm1,%ymm5,%ymm5");
|
||||
asm volatile("vpcmpgtb %ymm9,%ymm13,%ymm13");
|
||||
asm volatile("vpaddb %ymm1,%ymm1,%ymm1");
|
||||
asm volatile("vpaddb %ymm9,%ymm9,%ymm9");
|
||||
asm volatile("vpand %ymm7,%ymm5,%ymm5");
|
||||
asm volatile("vpand %ymm7,%ymm13,%ymm13");
|
||||
asm volatile("vpxor %ymm5,%ymm1,%ymm1");
|
||||
asm volatile("vpxor %ymm13,%ymm9,%ymm9");
|
||||
|
||||
asm volatile("vpxor %ymm4,%ymm0,%ymm0");
|
||||
asm volatile("vpxor %ymm4,%ymm1,%ymm1");
|
||||
asm volatile("vpxor %ymm4,%ymm2,%ymm2");
|
||||
asm volatile("vpxor %ymm4,%ymm3,%ymm3");
|
||||
asm volatile("vpxor %ymm12,%ymm8,%ymm8");
|
||||
asm volatile("vpxor %ymm12,%ymm9,%ymm9");
|
||||
asm volatile("vpxor %ymm12,%ymm10,%ymm10");
|
||||
asm volatile("vpxor %ymm12,%ymm11,%ymm11");
|
||||
|
||||
asm volatile("vmovntdq %%ymm0,%0" : "=m" (p[i]));
|
||||
asm volatile("vmovntdq %%ymm8,%0" : "=m" (p[i+32]));
|
||||
asm volatile("vmovntdq %%ymm1,%0" : "=m" (q[i]));
|
||||
asm volatile("vmovntdq %%ymm9,%0" : "=m" (q[i+32]));
|
||||
asm volatile("vmovntdq %%ymm2,%0" : "=m" (r[i]));
|
||||
asm volatile("vmovntdq %%ymm10,%0" : "=m" (r[i+32]));
|
||||
asm volatile("vmovntdq %%ymm3,%0" : "=m" (s[i]));
|
||||
asm volatile("vmovntdq %%ymm11,%0" : "=m" (s[i+32]));
|
||||
}
|
||||
|
||||
asm volatile("vzeroupper" : : : "memory");
|
||||
|
||||
raid_asm_end();
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_X86
|
||||
/*
|
||||
* GEN5 (penta parity with Cauchy matrix) SSSE3 implementation
|
||||
|
|
@ -738,7 +1132,6 @@ void raid_gen4_ssse3ext(int nd, size_t size, void **vv)
|
|||
__attribute__((force_align_arg_pointer))
|
||||
#endif
|
||||
void raid_gen5_ssse3(int nd, size_t size, void **vv)
|
||||
/* ensures that stack is aligned at 16 bytes because we allocate SSE registers in it */
|
||||
{
|
||||
uint8_t **v = (uint8_t **)vv;
|
||||
uint8_t *p;
|
||||
|
|
@ -1003,6 +1396,138 @@ void raid_gen5_ssse3ext(int nd, size_t size, void **vv)
|
|||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
/*
|
||||
* GEN5 (penta parity with Cauchy matrix) AVX2 implementation
|
||||
*
|
||||
* Note that it uses 16 registers, meaning that x64 is required.
|
||||
*/
|
||||
void raid_gen5_avx2ext(int nd, size_t size, void **vv)
|
||||
{
|
||||
uint8_t **v = (uint8_t **)vv;
|
||||
uint8_t *p;
|
||||
uint8_t *q;
|
||||
uint8_t *r;
|
||||
uint8_t *s;
|
||||
uint8_t *t;
|
||||
int d, l;
|
||||
size_t i;
|
||||
|
||||
l = nd - 1;
|
||||
p = v[nd];
|
||||
q = v[nd+1];
|
||||
r = v[nd+2];
|
||||
s = v[nd+3];
|
||||
t = v[nd+4];
|
||||
|
||||
/* special case with only one data disk */
|
||||
if (l == 0) {
|
||||
for (i = 0; i < 5; ++i)
|
||||
memcpy(v[1+i], v[0], size);
|
||||
return;
|
||||
}
|
||||
|
||||
raid_asm_begin();
|
||||
|
||||
/* generic case with at least two data disks */
|
||||
asm volatile("vpxor %ymm8,%ymm8,%ymm8");
|
||||
asm volatile("vbroadcasti128 %0,%%ymm14" : : "m" (gfconst16.poly[0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm15" : : "m" (gfconst16.low4[0]));
|
||||
|
||||
for (i = 0; i < size; i += 32) {
|
||||
/* last disk without the by two multiplication */
|
||||
asm volatile("vmovdqa %0,%%ymm10" : : "m" (v[l][i]));
|
||||
|
||||
asm volatile("vmovdqa %ymm10,%ymm0");
|
||||
asm volatile("vmovdqa %ymm10,%ymm1");
|
||||
|
||||
asm volatile("vpsrlw $4,%ymm10,%ymm11");
|
||||
asm volatile("vpand %ymm15,%ymm10,%ymm10");
|
||||
asm volatile("vpand %ymm15,%ymm11,%ymm11");
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm2" : : "m" (gfgenpshufb[l][0][0][0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[l][0][1][0]));
|
||||
asm volatile("vpshufb %ymm10,%ymm2,%ymm2");
|
||||
asm volatile("vpshufb %ymm11,%ymm13,%ymm13");
|
||||
asm volatile("vpxor %ymm13,%ymm2,%ymm2");
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm3" : : "m" (gfgenpshufb[l][1][0][0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[l][1][1][0]));
|
||||
asm volatile("vpshufb %ymm10,%ymm3,%ymm3");
|
||||
asm volatile("vpshufb %ymm11,%ymm13,%ymm13");
|
||||
asm volatile("vpxor %ymm13,%ymm3,%ymm3");
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm4" : : "m" (gfgenpshufb[l][2][0][0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[l][2][1][0]));
|
||||
asm volatile("vpshufb %ymm10,%ymm4,%ymm4");
|
||||
asm volatile("vpshufb %ymm11,%ymm13,%ymm13");
|
||||
asm volatile("vpxor %ymm13,%ymm4,%ymm4");
|
||||
|
||||
/* intermediate disks */
|
||||
for (d = l-1; d > 0; --d) {
|
||||
asm volatile("vmovdqa %0,%%ymm10" : : "m" (v[d][i]));
|
||||
|
||||
asm volatile("vpcmpgtb %ymm1,%ymm8,%ymm11");
|
||||
asm volatile("vpaddb %ymm1,%ymm1,%ymm1");
|
||||
asm volatile("vpand %ymm14,%ymm11,%ymm11");
|
||||
asm volatile("vpxor %ymm11,%ymm1,%ymm1");
|
||||
|
||||
asm volatile("vpxor %ymm10,%ymm0,%ymm0");
|
||||
asm volatile("vpxor %ymm10,%ymm1,%ymm1");
|
||||
|
||||
asm volatile("vpsrlw $4,%ymm10,%ymm11");
|
||||
asm volatile("vpand %ymm15,%ymm10,%ymm10");
|
||||
asm volatile("vpand %ymm15,%ymm11,%ymm11");
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm12" : : "m" (gfgenpshufb[d][0][0][0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[d][0][1][0]));
|
||||
asm volatile("vpshufb %ymm10,%ymm12,%ymm12");
|
||||
asm volatile("vpshufb %ymm11,%ymm13,%ymm13");
|
||||
asm volatile("vpxor %ymm12,%ymm2,%ymm2");
|
||||
asm volatile("vpxor %ymm13,%ymm2,%ymm2");
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm12" : : "m" (gfgenpshufb[d][1][0][0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[d][1][1][0]));
|
||||
asm volatile("vpshufb %ymm10,%ymm12,%ymm12");
|
||||
asm volatile("vpshufb %ymm11,%ymm13,%ymm13");
|
||||
asm volatile("vpxor %ymm12,%ymm3,%ymm3");
|
||||
asm volatile("vpxor %ymm13,%ymm3,%ymm3");
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm12" : : "m" (gfgenpshufb[d][2][0][0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[d][2][1][0]));
|
||||
asm volatile("vpshufb %ymm10,%ymm12,%ymm12");
|
||||
asm volatile("vpshufb %ymm11,%ymm13,%ymm13");
|
||||
asm volatile("vpxor %ymm12,%ymm4,%ymm4");
|
||||
asm volatile("vpxor %ymm13,%ymm4,%ymm4");
|
||||
}
|
||||
|
||||
/* first disk with all coefficients at 1 */
|
||||
asm volatile("vmovdqa %0,%%ymm10" : : "m" (v[0][i]));
|
||||
|
||||
asm volatile("vpcmpgtb %ymm1,%ymm8,%ymm11");
|
||||
asm volatile("vpaddb %ymm1,%ymm1,%ymm1");
|
||||
asm volatile("vpand %ymm14,%ymm11,%ymm11");
|
||||
asm volatile("vpxor %ymm11,%ymm1,%ymm1");
|
||||
|
||||
asm volatile("vpxor %ymm10,%ymm0,%ymm0");
|
||||
asm volatile("vpxor %ymm10,%ymm1,%ymm1");
|
||||
asm volatile("vpxor %ymm10,%ymm2,%ymm2");
|
||||
asm volatile("vpxor %ymm10,%ymm3,%ymm3");
|
||||
asm volatile("vpxor %ymm10,%ymm4,%ymm4");
|
||||
|
||||
asm volatile("vmovntdq %%ymm0,%0" : "=m" (p[i]));
|
||||
asm volatile("vmovntdq %%ymm1,%0" : "=m" (q[i]));
|
||||
asm volatile("vmovntdq %%ymm2,%0" : "=m" (r[i]));
|
||||
asm volatile("vmovntdq %%ymm3,%0" : "=m" (s[i]));
|
||||
asm volatile("vmovntdq %%ymm4,%0" : "=m" (t[i]));
|
||||
}
|
||||
|
||||
asm volatile("vzeroupper" : : : "memory");
|
||||
|
||||
raid_asm_end();
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_X86
|
||||
/*
|
||||
* GEN6 (hexa parity with Cauchy matrix) SSSE3 implementation
|
||||
|
|
@ -1315,6 +1840,155 @@ void raid_gen6_ssse3ext(int nd, size_t size, void **vv)
|
|||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
/*
|
||||
* GEN6 (hexa parity with Cauchy matrix) AVX2 implementation
|
||||
*
|
||||
* Note that it uses 16 registers, meaning that x64 is required.
|
||||
*/
|
||||
void raid_gen6_avx2ext(int nd, size_t size, void **vv)
|
||||
{
|
||||
uint8_t **v = (uint8_t **)vv;
|
||||
uint8_t *p;
|
||||
uint8_t *q;
|
||||
uint8_t *r;
|
||||
uint8_t *s;
|
||||
uint8_t *t;
|
||||
uint8_t *u;
|
||||
int d, l;
|
||||
size_t i;
|
||||
|
||||
l = nd - 1;
|
||||
p = v[nd];
|
||||
q = v[nd+1];
|
||||
r = v[nd+2];
|
||||
s = v[nd+3];
|
||||
t = v[nd+4];
|
||||
u = v[nd+5];
|
||||
|
||||
/* special case with only one data disk */
|
||||
if (l == 0) {
|
||||
for (i = 0; i < 6; ++i)
|
||||
memcpy(v[1+i], v[0], size);
|
||||
return;
|
||||
}
|
||||
|
||||
raid_asm_begin();
|
||||
|
||||
/* generic case with at least two data disks */
|
||||
asm volatile("vpxor %ymm8,%ymm8,%ymm8");
|
||||
asm volatile("vbroadcasti128 %0,%%ymm14" : : "m" (gfconst16.poly[0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm15" : : "m" (gfconst16.low4[0]));
|
||||
|
||||
for (i = 0; i < size; i += 32) {
|
||||
/* last disk without the by two multiplication */
|
||||
asm volatile("vmovdqa %0,%%ymm10" : : "m" (v[l][i]));
|
||||
|
||||
asm volatile("vmovdqa %ymm10,%ymm0");
|
||||
asm volatile("vmovdqa %ymm10,%ymm1");
|
||||
|
||||
asm volatile("vpsrlw $4,%ymm10,%ymm11");
|
||||
asm volatile("vpand %ymm15,%ymm10,%ymm10");
|
||||
asm volatile("vpand %ymm15,%ymm11,%ymm11");
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm2" : : "m" (gfgenpshufb[l][0][0][0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[l][0][1][0]));
|
||||
asm volatile("vpshufb %ymm10,%ymm2,%ymm2");
|
||||
asm volatile("vpshufb %ymm11,%ymm13,%ymm13");
|
||||
asm volatile("vpxor %ymm13,%ymm2,%ymm2");
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm3" : : "m" (gfgenpshufb[l][1][0][0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[l][1][1][0]));
|
||||
asm volatile("vpshufb %ymm10,%ymm3,%ymm3");
|
||||
asm volatile("vpshufb %ymm11,%ymm13,%ymm13");
|
||||
asm volatile("vpxor %ymm13,%ymm3,%ymm3");
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm4" : : "m" (gfgenpshufb[l][2][0][0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[l][2][1][0]));
|
||||
asm volatile("vpshufb %ymm10,%ymm4,%ymm4");
|
||||
asm volatile("vpshufb %ymm11,%ymm13,%ymm13");
|
||||
asm volatile("vpxor %ymm13,%ymm4,%ymm4");
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm5" : : "m" (gfgenpshufb[l][3][0][0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[l][3][1][0]));
|
||||
asm volatile("vpshufb %ymm10,%ymm5,%ymm5");
|
||||
asm volatile("vpshufb %ymm11,%ymm13,%ymm13");
|
||||
asm volatile("vpxor %ymm13,%ymm5,%ymm5");
|
||||
|
||||
/* intermediate disks */
|
||||
for (d = l-1; d > 0; --d) {
|
||||
asm volatile("vmovdqa %0,%%ymm10" : : "m" (v[d][i]));
|
||||
|
||||
asm volatile("vpcmpgtb %ymm1,%ymm8,%ymm11");
|
||||
asm volatile("vpaddb %ymm1,%ymm1,%ymm1");
|
||||
asm volatile("vpand %ymm14,%ymm11,%ymm11");
|
||||
asm volatile("vpxor %ymm11,%ymm1,%ymm1");
|
||||
|
||||
asm volatile("vpxor %ymm10,%ymm0,%ymm0");
|
||||
asm volatile("vpxor %ymm10,%ymm1,%ymm1");
|
||||
|
||||
asm volatile("vpsrlw $4,%ymm10,%ymm11");
|
||||
asm volatile("vpand %ymm15,%ymm10,%ymm10");
|
||||
asm volatile("vpand %ymm15,%ymm11,%ymm11");
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm12" : : "m" (gfgenpshufb[d][0][0][0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[d][0][1][0]));
|
||||
asm volatile("vpshufb %ymm10,%ymm12,%ymm12");
|
||||
asm volatile("vpshufb %ymm11,%ymm13,%ymm13");
|
||||
asm volatile("vpxor %ymm12,%ymm2,%ymm2");
|
||||
asm volatile("vpxor %ymm13,%ymm2,%ymm2");
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm12" : : "m" (gfgenpshufb[d][1][0][0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[d][1][1][0]));
|
||||
asm volatile("vpshufb %ymm10,%ymm12,%ymm12");
|
||||
asm volatile("vpshufb %ymm11,%ymm13,%ymm13");
|
||||
asm volatile("vpxor %ymm12,%ymm3,%ymm3");
|
||||
asm volatile("vpxor %ymm13,%ymm3,%ymm3");
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm12" : : "m" (gfgenpshufb[d][2][0][0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[d][2][1][0]));
|
||||
asm volatile("vpshufb %ymm10,%ymm12,%ymm12");
|
||||
asm volatile("vpshufb %ymm11,%ymm13,%ymm13");
|
||||
asm volatile("vpxor %ymm12,%ymm4,%ymm4");
|
||||
asm volatile("vpxor %ymm13,%ymm4,%ymm4");
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm12" : : "m" (gfgenpshufb[d][3][0][0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm13" : : "m" (gfgenpshufb[d][3][1][0]));
|
||||
asm volatile("vpshufb %ymm10,%ymm12,%ymm12");
|
||||
asm volatile("vpshufb %ymm11,%ymm13,%ymm13");
|
||||
asm volatile("vpxor %ymm12,%ymm5,%ymm5");
|
||||
asm volatile("vpxor %ymm13,%ymm5,%ymm5");
|
||||
}
|
||||
|
||||
/* first disk with all coefficients at 1 */
|
||||
asm volatile("vmovdqa %0,%%ymm10" : : "m" (v[0][i]));
|
||||
|
||||
asm volatile("vpcmpgtb %ymm1,%ymm8,%ymm11");
|
||||
asm volatile("vpaddb %ymm1,%ymm1,%ymm1");
|
||||
asm volatile("vpand %ymm14,%ymm11,%ymm11");
|
||||
asm volatile("vpxor %ymm11,%ymm1,%ymm1");
|
||||
|
||||
asm volatile("vpxor %ymm10,%ymm0,%ymm0");
|
||||
asm volatile("vpxor %ymm10,%ymm1,%ymm1");
|
||||
asm volatile("vpxor %ymm10,%ymm2,%ymm2");
|
||||
asm volatile("vpxor %ymm10,%ymm3,%ymm3");
|
||||
asm volatile("vpxor %ymm10,%ymm4,%ymm4");
|
||||
asm volatile("vpxor %ymm10,%ymm5,%ymm5");
|
||||
|
||||
asm volatile("vmovntdq %%ymm0,%0" : "=m" (p[i]));
|
||||
asm volatile("vmovntdq %%ymm1,%0" : "=m" (q[i]));
|
||||
asm volatile("vmovntdq %%ymm2,%0" : "=m" (r[i]));
|
||||
asm volatile("vmovntdq %%ymm3,%0" : "=m" (s[i]));
|
||||
asm volatile("vmovntdq %%ymm4,%0" : "=m" (t[i]));
|
||||
asm volatile("vmovntdq %%ymm5,%0" : "=m" (u[i]));
|
||||
}
|
||||
|
||||
asm volatile("vzeroupper" : : : "memory");
|
||||
|
||||
raid_asm_end();
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_X86
|
||||
/*
|
||||
* RAID recovering for one disk SSSE3 implementation
|
||||
|
|
@ -1556,3 +2230,239 @@ void raid_recX_ssse3(int nr, int *id, int *ip, int nd, size_t size, void **vv)
|
|||
}
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef CONFIG_X86
|
||||
/*
|
||||
* RAID recovering for one disk AVX2 implementation
|
||||
*/
|
||||
void raid_rec1_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
|
||||
{
|
||||
uint8_t **v = (uint8_t **)vv;
|
||||
uint8_t *p;
|
||||
uint8_t *pa;
|
||||
uint8_t G;
|
||||
uint8_t V;
|
||||
size_t i;
|
||||
|
||||
(void)nr; /* unused, it's always 1 */
|
||||
|
||||
/* if it's RAID5 uses the faster function */
|
||||
if (ip[0] == 0) {
|
||||
raid_rec1of1(id, nd, size, vv);
|
||||
return;
|
||||
}
|
||||
|
||||
/* setup the coefficients matrix */
|
||||
G = A(ip[0], id[0]);
|
||||
|
||||
/* invert it to solve the system of linear equations */
|
||||
V = inv(G);
|
||||
|
||||
/* compute delta parity */
|
||||
raid_delta_gen(1, id, ip, nd, size, vv);
|
||||
|
||||
p = v[nd+ip[0]];
|
||||
pa = v[id[0]];
|
||||
|
||||
raid_asm_begin();
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm7" : : "m" (gfconst16.low4[0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm4" : : "m" (gfmulpshufb[V][0][0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm5" : : "m" (gfmulpshufb[V][1][0]));
|
||||
|
||||
for (i = 0; i < size; i += 32) {
|
||||
asm volatile("vmovdqa %0,%%ymm0" : : "m" (p[i]));
|
||||
asm volatile("vmovdqa %0,%%ymm1" : : "m" (pa[i]));
|
||||
asm volatile("vpxor %ymm1,%ymm0,%ymm0");
|
||||
asm volatile("vpsrlw $4,%ymm0,%ymm1");
|
||||
asm volatile("vpand %ymm7,%ymm0,%ymm0");
|
||||
asm volatile("vpand %ymm7,%ymm1,%ymm1");
|
||||
asm volatile("vpshufb %ymm0,%ymm4,%ymm2");
|
||||
asm volatile("vpshufb %ymm1,%ymm5,%ymm3");
|
||||
asm volatile("vpxor %ymm3,%ymm2,%ymm2");
|
||||
asm volatile("vmovdqa %%ymm2,%0" : "=m" (pa[i]));
|
||||
}
|
||||
|
||||
asm volatile("vzeroupper" : : : "memory");
|
||||
|
||||
raid_asm_end();
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_X86
|
||||
/*
|
||||
* RAID recovering for two disks AVX2 implementation
|
||||
*/
|
||||
void raid_rec2_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
|
||||
{
|
||||
uint8_t **v = (uint8_t **)vv;
|
||||
const int N = 2;
|
||||
uint8_t *p[N];
|
||||
uint8_t *pa[N];
|
||||
uint8_t G[N*N];
|
||||
uint8_t V[N*N];
|
||||
size_t i;
|
||||
int j, k;
|
||||
|
||||
(void)nr; /* unused, it's always 2 */
|
||||
|
||||
/* setup the coefficients matrix */
|
||||
for (j = 0; j < N; ++j)
|
||||
for (k = 0; k < N; ++k)
|
||||
G[j*N+k] = A(ip[j], id[k]);
|
||||
|
||||
/* invert it to solve the system of linear equations */
|
||||
raid_invert(G, V, N);
|
||||
|
||||
/* compute delta parity */
|
||||
raid_delta_gen(N, id, ip, nd, size, vv);
|
||||
|
||||
for (j = 0; j < N; ++j) {
|
||||
p[j] = v[nd+ip[j]];
|
||||
pa[j] = v[id[j]];
|
||||
}
|
||||
|
||||
raid_asm_begin();
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm7" : : "m" (gfconst16.low4[0]));
|
||||
|
||||
for (i = 0; i < size; i += 32) {
|
||||
asm volatile("vmovdqa %0,%%ymm0" : : "m" (p[0][i]));
|
||||
asm volatile("vmovdqa %0,%%ymm2" : : "m" (pa[0][i]));
|
||||
asm volatile("vmovdqa %0,%%ymm1" : : "m" (p[1][i]));
|
||||
asm volatile("vmovdqa %0,%%ymm3" : : "m" (pa[1][i]));
|
||||
asm volatile("vpxor %ymm2,%ymm0,%ymm0");
|
||||
asm volatile("vpxor %ymm3,%ymm1,%ymm1");
|
||||
|
||||
asm volatile("vpxor %ymm6,%ymm6,%ymm6");
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm2" : : "m" (gfmulpshufb[V[0]][0][0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm3" : : "m" (gfmulpshufb[V[0]][1][0]));
|
||||
asm volatile("vpsrlw $4,%ymm0,%ymm5");
|
||||
asm volatile("vpand %ymm7,%ymm0,%ymm4");
|
||||
asm volatile("vpand %ymm7,%ymm5,%ymm5");
|
||||
asm volatile("vpshufb %ymm4,%ymm2,%ymm2");
|
||||
asm volatile("vpshufb %ymm5,%ymm3,%ymm3");
|
||||
asm volatile("vpxor %ymm2,%ymm6,%ymm6");
|
||||
asm volatile("vpxor %ymm3,%ymm6,%ymm6");
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm2" : : "m" (gfmulpshufb[V[1]][0][0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm3" : : "m" (gfmulpshufb[V[1]][1][0]));
|
||||
asm volatile("vpsrlw $4,%ymm1,%ymm5");
|
||||
asm volatile("vpand %ymm7,%ymm1,%ymm4");
|
||||
asm volatile("vpand %ymm7,%ymm5,%ymm5");
|
||||
asm volatile("vpshufb %ymm4,%ymm2,%ymm2");
|
||||
asm volatile("vpshufb %ymm5,%ymm3,%ymm3");
|
||||
asm volatile("vpxor %ymm2,%ymm6,%ymm6");
|
||||
asm volatile("vpxor %ymm3,%ymm6,%ymm6");
|
||||
|
||||
asm volatile("vmovdqa %%ymm6,%0" : "=m" (pa[0][i]));
|
||||
|
||||
asm volatile("vpxor %ymm6,%ymm6,%ymm6");
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm2" : : "m" (gfmulpshufb[V[2]][0][0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm3" : : "m" (gfmulpshufb[V[2]][1][0]));
|
||||
asm volatile("vpsrlw $4,%ymm0,%ymm5");
|
||||
asm volatile("vpand %ymm7,%ymm0,%ymm4");
|
||||
asm volatile("vpand %ymm7,%ymm5,%ymm5");
|
||||
asm volatile("vpshufb %ymm4,%ymm2,%ymm2");
|
||||
asm volatile("vpshufb %ymm5,%ymm3,%ymm3");
|
||||
asm volatile("vpxor %ymm2,%ymm6,%ymm6");
|
||||
asm volatile("vpxor %ymm3,%ymm6,%ymm6");
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm2" : : "m" (gfmulpshufb[V[3]][0][0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm3" : : "m" (gfmulpshufb[V[3]][1][0]));
|
||||
asm volatile("vpsrlw $4,%ymm1,%ymm5");
|
||||
asm volatile("vpand %ymm7,%ymm1,%ymm4");
|
||||
asm volatile("vpand %ymm7,%ymm5,%ymm5");
|
||||
asm volatile("vpshufb %ymm4,%ymm2,%ymm2");
|
||||
asm volatile("vpshufb %ymm5,%ymm3,%ymm3");
|
||||
asm volatile("vpxor %ymm2,%ymm6,%ymm6");
|
||||
asm volatile("vpxor %ymm3,%ymm6,%ymm6");
|
||||
|
||||
asm volatile("vmovdqa %%ymm6,%0" : "=m" (pa[1][i]));
|
||||
}
|
||||
|
||||
asm volatile("vzeroupper" : : : "memory");
|
||||
|
||||
raid_asm_end();
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_X86
|
||||
/*
|
||||
* RAID recovering AVX2 implementation
|
||||
*/
|
||||
void raid_recX_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
|
||||
{
|
||||
uint8_t **v = (uint8_t **)vv;
|
||||
int N = nr;
|
||||
uint8_t *p[RAID_PARITY_MAX];
|
||||
uint8_t *pa[RAID_PARITY_MAX];
|
||||
uint8_t G[RAID_PARITY_MAX*RAID_PARITY_MAX];
|
||||
uint8_t V[RAID_PARITY_MAX*RAID_PARITY_MAX];
|
||||
size_t i;
|
||||
int j, k;
|
||||
|
||||
/* setup the coefficients matrix */
|
||||
for (j = 0; j < N; ++j)
|
||||
for (k = 0; k < N; ++k)
|
||||
G[j*N+k] = A(ip[j], id[k]);
|
||||
|
||||
/* invert it to solve the system of linear equations */
|
||||
raid_invert(G, V, N);
|
||||
|
||||
/* compute delta parity */
|
||||
raid_delta_gen(N, id, ip, nd, size, vv);
|
||||
|
||||
for (j = 0; j < N; ++j) {
|
||||
p[j] = v[nd+ip[j]];
|
||||
pa[j] = v[id[j]];
|
||||
}
|
||||
|
||||
raid_asm_begin();
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm7" : : "m" (gfconst16.low4[0]));
|
||||
|
||||
for (i = 0; i < size; i += 32) {
|
||||
uint8_t PD[RAID_PARITY_MAX][32] __aligned(32);
|
||||
|
||||
/* delta */
|
||||
for (j = 0; j < N; ++j) {
|
||||
asm volatile("vmovdqa %0,%%ymm0" : : "m" (p[j][i]));
|
||||
asm volatile("vmovdqa %0,%%ymm1" : : "m" (pa[j][i]));
|
||||
asm volatile("vpxor %ymm1,%ymm0,%ymm0");
|
||||
asm volatile("vmovdqa %%ymm0,%0" : "=m" (PD[j][0]));
|
||||
}
|
||||
|
||||
/* reconstruct */
|
||||
for (j = 0; j < N; ++j) {
|
||||
asm volatile("vpxor %ymm0,%ymm0,%ymm0");
|
||||
asm volatile("vpxor %ymm1,%ymm1,%ymm1");
|
||||
|
||||
for (k = 0; k < N; ++k) {
|
||||
uint8_t m = V[j*N+k];
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm2" : : "m" (gfmulpshufb[m][0][0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm3" : : "m" (gfmulpshufb[m][1][0]));
|
||||
asm volatile("vmovdqa %0,%%ymm4" : : "m" (PD[k][0]));
|
||||
asm volatile("vpsrlw $4,%ymm4,%ymm5");
|
||||
asm volatile("vpand %ymm7,%ymm4,%ymm4");
|
||||
asm volatile("vpand %ymm7,%ymm5,%ymm5");
|
||||
asm volatile("vpshufb %ymm4,%ymm2,%ymm2");
|
||||
asm volatile("vpshufb %ymm5,%ymm3,%ymm3");
|
||||
asm volatile("vpxor %ymm2,%ymm0,%ymm0");
|
||||
asm volatile("vpxor %ymm3,%ymm1,%ymm1");
|
||||
}
|
||||
|
||||
asm volatile("vpxor %ymm1,%ymm0,%ymm0");
|
||||
asm volatile("vmovdqa %%ymm0,%0" : "=m" (pa[j][i]));
|
||||
}
|
||||
}
|
||||
|
||||
asm volatile("vzeroupper" : : : "memory");
|
||||
|
||||
raid_asm_end();
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
|
|||
99
raid/x86z.c
99
raid/x86z.c
|
|
@ -19,13 +19,19 @@ static const struct gfzconst16 {
|
|||
uint8_t poly[16];
|
||||
uint8_t half[16];
|
||||
uint8_t low7[16];
|
||||
} gfzconst16 __aligned(64) = {
|
||||
{ 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d,
|
||||
0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d },
|
||||
{ 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e,
|
||||
0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e },
|
||||
{ 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
|
||||
0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f }
|
||||
} gfzconst16 __aligned(64) = {
|
||||
{
|
||||
0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d,
|
||||
0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d
|
||||
},
|
||||
{
|
||||
0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e,
|
||||
0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e
|
||||
},
|
||||
{
|
||||
0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
|
||||
0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f
|
||||
}
|
||||
};
|
||||
#endif
|
||||
|
||||
|
|
@ -169,3 +175,82 @@ void raid_genz_sse2ext(int nd, size_t size, void **vv)
|
|||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
/*
|
||||
* GENz (triple parity with powers of 2^-1) AVX2 implementation
|
||||
*
|
||||
* Note that it uses 16 registers, meaning that x64 is required.
|
||||
*/
|
||||
void raid_genz_avx2ext(int nd, size_t size, void **vv)
|
||||
{
|
||||
uint8_t **v = (uint8_t **)vv;
|
||||
uint8_t *p;
|
||||
uint8_t *q;
|
||||
uint8_t *r;
|
||||
int d, l;
|
||||
size_t i;
|
||||
|
||||
l = nd - 1;
|
||||
p = v[nd];
|
||||
q = v[nd+1];
|
||||
r = v[nd+2];
|
||||
|
||||
raid_asm_begin();
|
||||
|
||||
asm volatile("vbroadcasti128 %0,%%ymm7" : : "m" (gfzconst16.poly[0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm3" : : "m" (gfzconst16.half[0]));
|
||||
asm volatile("vbroadcasti128 %0,%%ymm11" : : "m" (gfzconst16.low7[0]));
|
||||
asm volatile("vpxor %ymm15,%ymm15,%ymm15");
|
||||
|
||||
for (i = 0; i < size; i += 64) {
|
||||
asm volatile("vmovdqa %0,%%ymm0" : : "m" (v[l][i]));
|
||||
asm volatile("vmovdqa %0,%%ymm8" : : "m" (v[l][i+32]));
|
||||
asm volatile("vmovdqa %ymm0,%ymm1");
|
||||
asm volatile("vmovdqa %ymm8,%ymm9");
|
||||
asm volatile("vmovdqa %ymm0,%ymm2");
|
||||
asm volatile("vmovdqa %ymm8,%ymm10");
|
||||
for (d = l-1; d >= 0; --d) {
|
||||
asm volatile("vpsllw $7,%ymm2,%ymm6");
|
||||
asm volatile("vpsllw $7,%ymm10,%ymm14");
|
||||
asm volatile("vpsrlw $1,%ymm2,%ymm2");
|
||||
asm volatile("vpsrlw $1,%ymm10,%ymm10");
|
||||
asm volatile("vpcmpgtb %ymm1,%ymm15,%ymm4");
|
||||
asm volatile("vpcmpgtb %ymm9,%ymm15,%ymm12");
|
||||
asm volatile("vpcmpgtb %ymm6,%ymm15,%ymm5");
|
||||
asm volatile("vpcmpgtb %ymm14,%ymm15,%ymm13");
|
||||
asm volatile("vpaddb %ymm1,%ymm1,%ymm1");
|
||||
asm volatile("vpaddb %ymm9,%ymm9,%ymm9");
|
||||
asm volatile("vpand %ymm11,%ymm2,%ymm2");
|
||||
asm volatile("vpand %ymm11,%ymm10,%ymm10");
|
||||
asm volatile("vpand %ymm7,%ymm4,%ymm4");
|
||||
asm volatile("vpand %ymm7,%ymm12,%ymm12");
|
||||
asm volatile("vpand %ymm3,%ymm5,%ymm5");
|
||||
asm volatile("vpand %ymm3,%ymm13,%ymm13");
|
||||
asm volatile("vpxor %ymm4,%ymm1,%ymm1");
|
||||
asm volatile("vpxor %ymm12,%ymm9,%ymm9");
|
||||
asm volatile("vpxor %ymm5,%ymm2,%ymm2");
|
||||
asm volatile("vpxor %ymm13,%ymm10,%ymm10");
|
||||
|
||||
asm volatile("vmovdqa %0,%%ymm4" : : "m" (v[d][i]));
|
||||
asm volatile("vmovdqa %0,%%ymm12" : : "m" (v[d][i+32]));
|
||||
asm volatile("vpxor %ymm4,%ymm0,%ymm0");
|
||||
asm volatile("vpxor %ymm4,%ymm1,%ymm1");
|
||||
asm volatile("vpxor %ymm4,%ymm2,%ymm2");
|
||||
asm volatile("vpxor %ymm12,%ymm8,%ymm8");
|
||||
asm volatile("vpxor %ymm12,%ymm9,%ymm9");
|
||||
asm volatile("vpxor %ymm12,%ymm10,%ymm10");
|
||||
}
|
||||
asm volatile("vmovntdq %%ymm0,%0" : "=m" (p[i]));
|
||||
asm volatile("vmovntdq %%ymm8,%0" : "=m" (p[i+32]));
|
||||
asm volatile("vmovntdq %%ymm1,%0" : "=m" (q[i]));
|
||||
asm volatile("vmovntdq %%ymm9,%0" : "=m" (q[i+32]));
|
||||
asm volatile("vmovntdq %%ymm2,%0" : "=m" (r[i]));
|
||||
asm volatile("vmovntdq %%ymm10,%0" : "=m" (r[i+32]));
|
||||
}
|
||||
|
||||
asm volatile("vzeroupper" : : : "memory");
|
||||
|
||||
raid_asm_end();
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue