Add detection of AVX2GFNI

This commit is contained in:
Andrea Mazzoleni 2026-04-24 17:29:42 +02:00
parent 2babb5441c
commit 21e2f0455d
4 changed files with 20 additions and 3 deletions

View file

@ -119,11 +119,12 @@ void speed(int period, int nd, int size)
raid_cpu_info(vendor, &family, &model);
printf("CPU %s, family %u, model %u, flags%s%s%s%s%s%s%s%s\n", vendor, family, model,
printf("CPU %s, family %u, model %u, flags%s%s%s%s%s%s%s%s%s\n", vendor, family, model,
raid_cpu_has_sse2() ? " sse2" : "",
raid_cpu_has_ssse3() ? " ssse3" : "",
raid_cpu_has_crc32() ? " crc32" : "",
raid_cpu_has_avx2() ? " avx2" : "",
raid_cpu_has_avx2gfni() ? " avx2gfni" : "",
raid_cpu_has_avx512bw() ? " avx512bw" : "",
raid_cpu_has_avx512gfni() ? " avx512gfni" : "",
raid_cpu_has_slowmult() ? " slowmult" : "",

View file

@ -183,6 +183,22 @@ static inline int raid_cpu_has_avx2(void)
3 << 1); /* XCR0: OS saves XMM and YMM registers */
}
static inline int raid_cpu_has_avx2gfni(void)
{
/*
* Detection of AVX2 + GFNI:
* 1) Verify OSXSAVE and XGETBV (CPUID.1:ECX[27])
* 2) Verify XCR0[2:1] = '11b' (XMM and YMM state enabled)
* 3) Verify AVX2 support (CPUID.7.0:EBX[5])
* 4) Verify GFNI support (CPUID.7.0:ECX[8])
*/
return raid_cpu_match_avx(
(1 << 27) | (1 << 28), /* Leaf 1, ECX: XSAVE and AVX */
1 << 5, /* Leaf 7, EBX: AVX2 */
1 << 8, /* Leaf 7, ECX: GFNI */
3 << 1); /* XCR0: OS saves XMM and YMM registers */
}
static inline int raid_cpu_has_avx512bw(void)
{
/*

View file

@ -37,6 +37,8 @@ int main(void)
printf("Including x86 SSSE3 functions\n");
if (raid_cpu_has_avx2())
printf("Including x86 AVX2 functions\n");
if (raid_cpu_has_avx512bw())
printf("Including x86 AVX512BW functions\n");
#endif
#ifdef CONFIG_X86_64
printf("Including x64 extended SSE register set\n");

View file

@ -1020,8 +1020,6 @@ int main(void)
printf("Including x86 AVX2 functions\n");
if (raid_cpu_has_avx512bw())
printf("Including x86 AVX512bw functions\n");
if (raid_cpu_has_avx512gfni())
printf("Including x86 AVX512gfni functions\n");
#endif
#ifdef CONFIG_X86_64
printf("Including x64 extended SSE register set\n");