From 3f4d7e15fa9ba2d32ef35098086a11d35ed828de Mon Sep 17 00:00:00 2001
From: Andrea Mazzoleni <amadvance@gmail.com>
Date: Mon, 24 Aug 2026 17:20:15 +0200
Subject: [PATCH] Reduce SSSE3ext REC1 unrolling from 64 to 32 bytes for better
 performance

---
 raid/ssse3.c | 48 ++++++++++++++----------------------------------
 1 file changed, 14 insertions(+), 34 deletions(-)

diff --git a/raid/ssse3.c b/raid/ssse3.c
index c747d096..464257ca 100644
--- a/raid/ssse3.c
+++ b/raid/ssse3.c
@@ -1769,7 +1769,13 @@ static __always_inline void raid_recX_ssse3(int nr, int *id, int *ip, int nd, si
 
 #ifdef CONFIG_X86_64
 /*
- * RAID recovering for one disk SSSE3 extended implementation
+ * RAID recovering for one disk SSSE3 extended implementation.
+ *
+ * Process two 16-byte blocks per iteration, grouping equal operations across
+ * both lanes to expose instruction-level parallelism.
+ * 
+ * A four-way 64-byte unroll was tested but is slower than this two-way 32-byte
+ * implementation.
  */
 static __always_inline void raid_rec1_ssse3ext_delta(int *id, int *ip, int nd, size_t size, void **vv)
 {
@@ -1798,71 +1804,45 @@ static __always_inline void raid_rec1_ssse3ext_delta(int *id, int *ip, int nd, s
 	asm volatile ("movdqa %0,%%xmm4" : : "m" (raid_gfmulpshufb[V][0][0]));
 	asm volatile ("movdqa %0,%%xmm5" : : "m" (raid_gfmulpshufb[V][1][0]));
 
-	for (i = 0; i < size; i += 64) {
+	for (i = 0; i < size; i += 32) {
 		asm volatile ("movdqa %0,%%xmm0" : : "m" (p[i]));
 		asm volatile ("movdqa %0,%%xmm1" : : "m" (p[i + 16]));
-		asm volatile ("movdqa %0,%%xmm2" : : "m" (p[i + 32]));
-		asm volatile ("movdqa %0,%%xmm3" : : "m" (p[i + 48]));
 
 		asm volatile ("movdqa %0,%%xmm8" : : "m" (pa[i]));
 		asm volatile ("movdqa %0,%%xmm9" : : "m" (pa[i + 16]));
-		asm volatile ("movdqa %0,%%xmm10" : : "m" (pa[i + 32]));
-		asm volatile ("movdqa %0,%%xmm11" : : "m" (pa[i + 48]));
 
 		asm volatile ("pxor %xmm8,%xmm0");
 		asm volatile ("pxor %xmm9,%xmm1");
-		asm volatile ("pxor %xmm10,%xmm2");
-		asm volatile ("pxor %xmm11,%xmm3");
 
 		asm volatile ("movdqa %xmm0,%xmm8");
 		asm volatile ("movdqa %xmm1,%xmm9");
-		asm volatile ("movdqa %xmm2,%xmm10");
-		asm volatile ("movdqa %xmm3,%xmm11");
 
 		asm volatile ("psrlw $4,%xmm8");
 		asm volatile ("psrlw $4,%xmm9");
-		asm volatile ("psrlw $4,%xmm10");
-		asm volatile ("psrlw $4,%xmm11");
 
 		asm volatile ("pand %xmm7,%xmm0");
 		asm volatile ("pand %xmm7,%xmm1");
-		asm volatile ("pand %xmm7,%xmm2");
-		asm volatile ("pand %xmm7,%xmm3");
 
 		asm volatile ("pand %xmm7,%xmm8");
 		asm volatile ("pand %xmm7,%xmm9");
-		asm volatile ("pand %xmm7,%xmm10");
-		asm volatile ("pand %xmm7,%xmm11");
 
-		asm volatile ("movdqa %xmm4,%xmm12");
-		asm volatile ("movdqa %xmm4,%xmm13");
-		asm volatile ("movdqa %xmm4,%xmm14");
-		asm volatile ("movdqa %xmm4,%xmm15");
+		asm volatile ("movdqa %xmm4,%xmm10");
+		asm volatile ("movdqa %xmm4,%xmm11");
 
-		asm volatile ("pshufb %xmm0,%xmm12");
-		asm volatile ("pshufb %xmm1,%xmm13");
-		asm volatile ("pshufb %xmm2,%xmm14");
-		asm volatile ("pshufb %xmm3,%xmm15");
+		asm volatile ("pshufb %xmm0,%xmm10");
+		asm volatile ("pshufb %xmm1,%xmm11");
 
 		asm volatile ("movdqa %xmm5,%xmm0");
 		asm volatile ("movdqa %xmm5,%xmm1");
-		asm volatile ("movdqa %xmm5,%xmm2");
-		asm volatile ("movdqa %xmm5,%xmm3");
 
 		asm volatile ("pshufb %xmm8,%xmm0");
 		asm volatile ("pshufb %xmm9,%xmm1");
-		asm volatile ("pshufb %xmm10,%xmm2");
-		asm volatile ("pshufb %xmm11,%xmm3");
 
-		asm volatile ("pxor %xmm12,%xmm0");
-		asm volatile ("pxor %xmm13,%xmm1");
-		asm volatile ("pxor %xmm14,%xmm2");
-		asm volatile ("pxor %xmm15,%xmm3");
+		asm volatile ("pxor %xmm10,%xmm0");
+		asm volatile ("pxor %xmm11,%xmm1");
 
 		asm volatile ("movdqa %%xmm0,%0" : "=m" (pa[i]));
 		asm volatile ("movdqa %%xmm1,%0" : "=m" (pa[i + 16]));
-		asm volatile ("movdqa %%xmm2,%0" : "=m" (pa[i + 32]));
-		asm volatile ("movdqa %%xmm3,%0" : "=m" (pa[i + 48]));
 	}
 
 	raid_sse_end();