diff --git a/TODO b/TODO index fd7371a4..fb7e33e4 100644 --- a/TODO +++ b/TODO @@ -22,13 +22,18 @@ This will also improve the cases of a crash during sync, because we already have all the hashes when sync starts. We need to extend the NEW blocks with an hash, likely using the dummy 0 hash as marker for no hash. +And create a new block type REP (replaced) where the +hash is intented to match the new block and not the +previous one like for CHG blocks. * When renaming to .unrecoverable at now we always overwrite -losing partial, but potentially better, previous copy of the files. -Is is possible a better strategy ? +a previous copy losing partial, but potentially better, file recovery. +Is it possible a better strategy ? Maybe we can rename the unrecoverable as the real file, if the real file is missing at the first open. This should ensure to always get better results if the file is hashed. +Something like an incremental recovery, in case multiple fix commands +are attempted. - Minor diff --git a/mktables.c b/mktables.c index 4f399986..2b6e6bb5 100644 --- a/mktables.c +++ b/mktables.c @@ -156,7 +156,7 @@ void set_power(unsigned char* matrix) v = 1; for(i=0;i> 1) & 0x7f7f7f7fU; + v ^= mask & 0x8e8e8e8eU; + return v; +} + +/** + * Divide each byte of a uint64 by 2 in the GF(2^8). + */ +__attribute__((always_inline)) +static inline uint64_t d2_64(uint64_t v) +{ + uint64_t mask = v & 0x0101010101010101U; + mask = (mask << 8) - mask; + v = (v >> 1) & 0x7f7f7f7f7f7f7f7fU; + v ^= mask & 0x8e8e8e8e8e8e8e8eU; + return v; +} + /* * RAID6 32bit C implementation */ @@ -429,10 +445,14 @@ void raid6_int64(unsigned char** vbuf, unsigned data, unsigned size) #if defined(__i386__) || defined(__x86_64__) static const struct gfconst16 { unsigned char poly[16]; - unsigned char mask[16]; -} gfconst16 __attribute__((aligned(32))) = { + unsigned char low4[16]; + unsigned char half[16]; + unsigned char low7[16]; +} gfconst16 __attribute__((aligned(64))) = { { 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d }, - { 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f } + { 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f }, + { 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e, 0x8e }, + { 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f } }; /* @@ -597,10 +617,8 @@ void raidZ3_int32(unsigned char** vbuf, unsigned data, unsigned size) q0 ^= d0; q1 ^= d1; - r0 = x2_32(r0); - r1 = x2_32(r1); - r0 = x2_32(r0); - r1 = x2_32(r1); + r0 = d2_32(r0); + r1 = d2_32(r1); r0 ^= d0; r1 ^= d1; @@ -649,10 +667,8 @@ void raidZ3_int64(unsigned char** vbuf, unsigned data, unsigned size) q0 ^= d0; q1 ^= d1; - r0 = x2_64(r0); - r1 = x2_64(r1); - r0 = x2_64(r0); - r1 = x2_64(r1); + r0 = d2_64(r0); + r1 = d2_64(r1); r0 ^= d0; r1 ^= d1; @@ -684,6 +700,8 @@ void raidZ3_sse2(unsigned char** vbuf, unsigned data, unsigned size) r = vbuf[data+2]; asm volatile("movdqa %0,%%xmm7" : : "m" (gfconst16.poly[0])); + asm volatile("movdqa %0,%%xmm3" : : "m" (gfconst16.half[0])); + asm volatile("movdqa %0,%%xmm6" : : "m" (gfconst16.low7[0])); for(i=0;i=0;--d) { asm volatile("pxor %xmm4,%xmm4"); - asm volatile("pxor %xmm5,%xmm5"); - asm volatile("pxor %xmm6,%xmm6"); asm volatile("pcmpgtb %xmm1,%xmm4"); - asm volatile("pcmpgtb %xmm2,%xmm5"); asm volatile("paddb %xmm1,%xmm1"); - asm volatile("paddb %xmm2,%xmm2"); asm volatile("pand %xmm7,%xmm4"); - asm volatile("pand %xmm7,%xmm5"); asm volatile("pxor %xmm4,%xmm1"); - asm volatile("pxor %xmm5,%xmm2"); - asm volatile("pcmpgtb %xmm2,%xmm6"); - asm volatile("paddb %xmm2,%xmm2"); - asm volatile("pand %xmm7,%xmm6"); - asm volatile("pxor %xmm6,%xmm2"); - asm volatile("movdqa %0,%%xmm3" : : "m" (vbuf[d][i])); - asm volatile("pxor %xmm3,%xmm0"); - asm volatile("pxor %xmm3,%xmm1"); - asm volatile("pxor %xmm3,%xmm2"); + asm volatile("movdqa %xmm2,%xmm4"); + asm volatile("pxor %xmm5,%xmm5"); + asm volatile("psllw $7,%xmm4"); + asm volatile("psrlw $1,%xmm2"); + asm volatile("pcmpgtb %xmm4,%xmm5"); + asm volatile("pand %xmm6,%xmm2"); + asm volatile("pand %xmm3,%xmm5"); + asm volatile("pxor %xmm5,%xmm2"); + + asm volatile("movdqa %0,%%xmm4" : : "m" (vbuf[d][i])); + asm volatile("pxor %xmm4,%xmm0"); + asm volatile("pxor %xmm4,%xmm1"); + asm volatile("pxor %xmm4,%xmm2"); } asm volatile("movntdq %%xmm0,%0" : "=m" (p[i])); asm volatile("movntdq %%xmm1,%0" : "=m" (q[i])); @@ -740,6 +757,8 @@ void raidZ3_sse2ext(unsigned char** vbuf, unsigned data, unsigned size) r = vbuf[data+2]; asm volatile("movdqa %0,%%xmm7" : : "m" (gfconst16.poly[0])); + asm volatile("movdqa %0,%%xmm3" : : "m" (gfconst16.half[0])); + asm volatile("movdqa %0,%%xmm11" : : "m" (gfconst16.low7[0])); for(i=0;i=0;--d) { + asm volatile("movdqa %xmm2,%xmm6"); + asm volatile("movdqa %xmm10,%xmm14"); asm volatile("pxor %xmm4,%xmm4"); - asm volatile("pxor %xmm5,%xmm5"); - asm volatile("pxor %xmm6,%xmm6"); asm volatile("pxor %xmm12,%xmm12"); + asm volatile("pxor %xmm5,%xmm5"); asm volatile("pxor %xmm13,%xmm13"); - asm volatile("pxor %xmm14,%xmm14"); + asm volatile("psllw $7,%xmm6"); + asm volatile("psllw $7,%xmm14"); + asm volatile("psrlw $1,%xmm2"); + asm volatile("psrlw $1,%xmm10"); asm volatile("pcmpgtb %xmm1,%xmm4"); - asm volatile("pcmpgtb %xmm2,%xmm5"); asm volatile("pcmpgtb %xmm9,%xmm12"); - asm volatile("pcmpgtb %xmm10,%xmm13"); + asm volatile("pcmpgtb %xmm6,%xmm5"); + asm volatile("pcmpgtb %xmm14,%xmm13"); asm volatile("paddb %xmm1,%xmm1"); - asm volatile("paddb %xmm2,%xmm2"); asm volatile("paddb %xmm9,%xmm9"); - asm volatile("paddb %xmm10,%xmm10"); + asm volatile("pand %xmm11,%xmm2"); + asm volatile("pand %xmm11,%xmm10"); asm volatile("pand %xmm7,%xmm4"); - asm volatile("pand %xmm7,%xmm5"); asm volatile("pand %xmm7,%xmm12"); - asm volatile("pand %xmm7,%xmm13"); + asm volatile("pand %xmm3,%xmm5"); + asm volatile("pand %xmm3,%xmm13"); asm volatile("pxor %xmm4,%xmm1"); - asm volatile("pxor %xmm5,%xmm2"); asm volatile("pxor %xmm12,%xmm9"); + asm volatile("pxor %xmm5,%xmm2"); asm volatile("pxor %xmm13,%xmm10"); - asm volatile("pcmpgtb %xmm2,%xmm6"); - asm volatile("pcmpgtb %xmm10,%xmm14"); - asm volatile("paddb %xmm2,%xmm2"); - asm volatile("paddb %xmm10,%xmm10"); - asm volatile("pand %xmm7,%xmm6"); - asm volatile("pand %xmm7,%xmm14"); - asm volatile("pxor %xmm6,%xmm2"); - asm volatile("pxor %xmm14,%xmm10"); - asm volatile("movdqa %0,%%xmm3" : : "m" (vbuf[d][i])); - asm volatile("movdqa %0,%%xmm11" : : "m" (vbuf[d][i+16])); - asm volatile("pxor %xmm3,%xmm0"); - asm volatile("pxor %xmm3,%xmm1"); - asm volatile("pxor %xmm3,%xmm2"); - asm volatile("pxor %xmm11,%xmm8"); - asm volatile("pxor %xmm11,%xmm9"); - asm volatile("pxor %xmm11,%xmm10"); + asm volatile("movdqa %0,%%xmm4" : : "m" (vbuf[d][i])); + asm volatile("movdqa %0,%%xmm12" : : "m" (vbuf[d][i+16])); + asm volatile("pxor %xmm4,%xmm0"); + asm volatile("pxor %xmm4,%xmm1"); + asm volatile("pxor %xmm4,%xmm2"); + asm volatile("pxor %xmm12,%xmm8"); + asm volatile("pxor %xmm12,%xmm9"); + asm volatile("pxor %xmm12,%xmm10"); } asm volatile("movntdq %%xmm0,%0" : "=m" (p[i])); asm volatile("movntdq %%xmm8,%0" : "=m" (p[i+16])); @@ -865,7 +880,7 @@ void raidS3_ssse3(unsigned char** vbuf, unsigned data, unsigned size) r = vbuf[data+2]; asm volatile("movdqa %0,%%xmm3" : : "m" (gfconst16.poly[0])); - asm volatile("movdqa %0,%%xmm7" : : "m" (gfconst16.mask[0])); + asm volatile("movdqa %0,%%xmm7" : : "m" (gfconst16.low4[0])); for(i=0;i0;--d) { asm volatile("movdqa %0,%%xmm7" : : "m" (gfconst16.poly[0])); - asm volatile("movdqa %0,%%xmm15" : : "m" (gfconst16.mask[0])); + asm volatile("movdqa %0,%%xmm15" : : "m" (gfconst16.low4[0])); asm volatile("movdqa %0,%%xmm4" : : "m" (vbuf[d][i])); asm volatile("movdqa %0,%%xmm12" : : "m" (vbuf[d][i+16])); @@ -1343,7 +1358,7 @@ void raidS4_ssse3ext(unsigned char** vbuf, unsigned data, unsigned size) /* first disk with all coefficients at 1 */ asm volatile("movdqa %0,%%xmm7" : : "m" (gfconst16.poly[0])); - asm volatile("movdqa %0,%%xmm15" : : "m" (gfconst16.mask[0])); + asm volatile("movdqa %0,%%xmm15" : : "m" (gfconst16.low4[0])); asm volatile("movdqa %0,%%xmm4" : : "m" (vbuf[0][i])); asm volatile("movdqa %0,%%xmm12" : : "m" (vbuf[0][i+16])); @@ -1471,7 +1486,7 @@ void raidS5_ssse3(unsigned char** vbuf, unsigned data, unsigned size) asm volatile("movdqa %xmm4,%xmm0"); asm volatile("movdqa %%xmm4,%0" : "=m" (p0[0])); - asm volatile("movdqa %0,%%xmm7" : : "m" (gfconst16.mask[0])); + asm volatile("movdqa %0,%%xmm7" : : "m" (gfconst16.low4[0])); asm volatile("movdqa %xmm4,%xmm5"); asm volatile("psrlw $4,%xmm5"); asm volatile("pand %xmm7,%xmm4"); @@ -1511,7 +1526,7 @@ void raidS5_ssse3(unsigned char** vbuf, unsigned data, unsigned size) asm volatile("pxor %xmm4,%xmm6"); asm volatile("movdqa %%xmm6,%0" : "=m" (p0[0])); - asm volatile("movdqa %0,%%xmm7" : : "m" (gfconst16.mask[0])); + asm volatile("movdqa %0,%%xmm7" : : "m" (gfconst16.low4[0])); asm volatile("movdqa %xmm4,%xmm5"); asm volatile("psrlw $4,%xmm5"); asm volatile("pand %xmm7,%xmm4"); @@ -1591,7 +1606,7 @@ void raidS5_ssse3ext(unsigned char** vbuf, unsigned data, unsigned size) t = vbuf[data+4]; asm volatile("movdqa %0,%%xmm14" : : "m" (gfconst16.poly[0])); - asm volatile("movdqa %0,%%xmm15" : : "m" (gfconst16.mask[0])); + asm volatile("movdqa %0,%%xmm15" : : "m" (gfconst16.low4[0])); for(i=0;i