mirror of
https://github.com/amadvance/snapraid.git
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Removes legacy MMX support.
This commit is contained in:
Andrea Mazzoleni
parent
96796b0717
commit
7057d97999
4 changed files with 10 additions and 150 deletions
118
raid.c
118
raid.c
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@ -127,13 +127,13 @@
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* Resulting speed in x64, with 24 data disks, using a stripe of 256 KiB,
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* for a Core i7-3740QM CPU @ 2.7GHz is:
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*
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* int8 int32 int64 mmx sse2 sse2e ssse3 ssse3e
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* raid5 9042 16698 19978 26734
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* raid6 3205 5478 7911 13987 16287
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* raidTP 828 6802 7186
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* raidQP 637 5483 5843
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* raidPP 513 4325 4629
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* raidHP 428 3479 3866
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* int8 int32 int64 sse2 sse2e ssse3 ssse3e
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* raid5 9042 16698 26734
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* raid6 3205 5478 13987 16287
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* raidTP 828 6802 7186
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* raidQP 637 5483 5843
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* raidPP 513 4325 4629
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* raidHP 428 3479 3866
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*
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* Values are in MiB/s of data read and processed, not counting written parity.
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*
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@ -142,9 +142,9 @@
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* coefficient "4", and equal for RAIDQP that gets faster (10%) only using
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* AVX instructions.
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*
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* int32 int64 mmx sse2 sse2e ssse3 ssse3e avxe
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* raidTP 1406 2522 3788 7240 7886 8071 8358
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* raidQP 773 1375 2277 4573 4678 5457 5778 6468
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* int32 int64 sse2 sse2e ssse3 ssse3e avxe
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* raidTP 1406 2522 7240 7886 8071 8358
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* raidQP 773 1375 4573 4678 5457 5778 6468
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*
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* In details parity is computed as:
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*
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@ -273,42 +273,6 @@ void raid5_int64(unsigned char** vbuf, unsigned data, unsigned size)
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}
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#if defined(__i386__) || defined(__x86_64__)
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/*
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* RAID5 MMX implementation
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*/
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void raid5_mmx(unsigned char** vbuf, unsigned data, unsigned size)
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{
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unsigned char* p;
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int d, l;
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unsigned off;
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l = data - 1;
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p = vbuf[data];
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for(off=0;off<size;off+=32) {
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asm volatile("movq %0,%%mm0" : : "m" (vbuf[l][off]));
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asm volatile("movq %0,%%mm1" : : "m" (vbuf[l][off+8]));
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asm volatile("movq %0,%%mm2" : : "m" (vbuf[l][off+16]));
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asm volatile("movq %0,%%mm3" : : "m" (vbuf[l][off+24]));
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for(d=l-1;d>=0;--d) {
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asm volatile("movq %0,%%mm4" : : "m" (vbuf[d][off]));
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asm volatile("movq %0,%%mm5" : : "m" (vbuf[d][off+8]));
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asm volatile("movq %0,%%mm6" : : "m" (vbuf[d][off+16]));
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asm volatile("movq %0,%%mm7" : : "m" (vbuf[d][off+24]));
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asm volatile("pxor %mm4,%mm0");
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asm volatile("pxor %mm5,%mm1");
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asm volatile("pxor %mm6,%mm2");
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asm volatile("pxor %mm7,%mm3");
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}
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asm volatile("movq %%mm0,%0" : "=m" (p[off]));
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asm volatile("movq %%mm1,%0" : "=m" (p[off+8]));
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asm volatile("movq %%mm2,%0" : "=m" (p[off+16]));
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asm volatile("movq %%mm3,%0" : "=m" (p[off+24]));
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}
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asm volatile("emms" : : : "memory");
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}
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/*
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* RAID5 SSE2 implementation
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*
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@ -456,61 +420,6 @@ void raid6_int64(unsigned char** vbuf, unsigned data, unsigned size)
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}
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#if defined(__i386__) || defined(__x86_64__)
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static const struct raid_8_const {
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unsigned char poly[8];
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} raid_8_const __attribute__((aligned(8))) = {
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{ 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d, 0x1d }
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};
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/*
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* RAID6 MMX implementation
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*/
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void raid6_mmx(unsigned char** vbuf, unsigned data, unsigned size)
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{
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unsigned char* p;
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unsigned char* q;
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int d, l;
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unsigned off;
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l = data - 1;
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p = vbuf[data];
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q = vbuf[data+1];
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asm volatile("movq %0,%%mm7" : : "m" (raid_8_const.poly[0]));
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for(off=0;off<size;off+=16) {
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asm volatile("movq %0,%%mm0" : : "m" (vbuf[l][off]));
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asm volatile("movq %0,%%mm1" : : "m" (vbuf[l][off+8]));
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asm volatile("movq %mm0,%mm2");
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asm volatile("movq %mm1,%mm3");
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for(d=l-1;d>=0;--d) {
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asm volatile("pxor %mm4,%mm4");
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asm volatile("pxor %mm5,%mm5");
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asm volatile("pcmpgtb %mm2,%mm4");
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asm volatile("pcmpgtb %mm3,%mm5");
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asm volatile("paddb %mm2,%mm2");
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asm volatile("paddb %mm3,%mm3");
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asm volatile("pand %mm7,%mm4");
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asm volatile("pand %mm7,%mm5");
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asm volatile("pxor %mm4,%mm2");
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asm volatile("pxor %mm5,%mm3");
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asm volatile("movq %0,%%mm4" : : "m" (vbuf[d][off]));
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asm volatile("movq %0,%%mm5" : : "m" (vbuf[d][off+8]));
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asm volatile("pxor %mm4,%mm0");
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asm volatile("pxor %mm5,%mm1");
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asm volatile("pxor %mm4,%mm2");
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asm volatile("pxor %mm5,%mm3");
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}
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asm volatile("movq %%mm0,%0" : "=m" (p[off]));
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asm volatile("movq %%mm1,%0" : "=m" (p[off+8]));
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asm volatile("movq %%mm2,%0" : "=m" (q[off]));
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asm volatile("movq %%mm3,%0" : "=m" (q[off+8]));
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}
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asm volatile("emms" : : : "memory");
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}
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static const struct raid_16_const {
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unsigned char poly[16];
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unsigned char mask[16];
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@ -2935,11 +2844,6 @@ void raid_init(void)
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}
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#if defined(__i386__) || defined(__x86_64__)
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if (cpu_has_mmx()) {
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raid5_gen = raid5_mmx;
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raid6_gen = raid6_mmx;
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}
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if (cpu_has_sse2()) {
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raid5_gen = raid5_sse2;
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#if defined(__x86_64__)
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@ -2983,8 +2887,6 @@ static struct raid_func {
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{ "int64", raid6_int64 },
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#if defined(__i386__) || defined(__x86_64__)
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{ "mmx", raid5_mmx },
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{ "mmx", raid6_mmx },
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{ "sse2", raid5_sse2 },
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{ "sse2", raid6_sse2 },
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{ "ssse3", raidTP_ssse3 },
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2
raid.h
2
raid.h
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@ -72,11 +72,9 @@ const char* raidHP_tag(void);
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*/
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void raid5_int32(unsigned char** vbuf, unsigned data, unsigned size);
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void raid5_int64(unsigned char** vbuf, unsigned data, unsigned size);
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void raid5_mmx(unsigned char** vbuf, unsigned data, unsigned size);
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void raid5_sse2(unsigned char** vbuf, unsigned data, unsigned size);
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void raid6_int32(unsigned char** vbuf, unsigned data, unsigned size);
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void raid6_int64(unsigned char** vbuf, unsigned data, unsigned size);
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void raid6_mmx(unsigned char** vbuf, unsigned data, unsigned size);
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void raid6_sse2(unsigned char** vbuf, unsigned data, unsigned size);
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void raid6_sse2ext(unsigned char** vbuf, unsigned data, unsigned size);
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void raidTP_int8(unsigned char** vbuf, unsigned data, unsigned size);
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@ -364,11 +364,6 @@ static void gentest(unsigned diskmax, unsigned block_size)
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map[mac++] = raid6_int64;
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#if defined(__i386__) || defined(__x86_64__)
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if (cpu_has_mmx()) {
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map[mac++] = raid5_mmx;
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map[mac++] = raid6_mmx;
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}
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if (cpu_has_sse2()) {
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map[mac++] = raid5_sse2;
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map[mac++] = raid6_sse2;
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35
speed.c
35
speed.c
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@ -221,7 +221,6 @@ void speed(void)
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printf("%7s", "int32");
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printf("%7s", "int64");
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#if defined(__i386__) || defined(__x86_64__)
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printf("%7s", "mmx");
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printf("%7s", "sse2");
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#if defined(__x86_64__)
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printf("%7s", "sse2e");
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@ -255,15 +254,6 @@ void speed(void)
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fflush(stdout);
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#if defined(__i386__) || defined(__x86_64__)
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if (cpu_has_mmx()) {
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SPEED_START {
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raid5_mmx(buffer, diskmax, block_size);
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} SPEED_STOP
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printf("%7"PRIu64, ds / dt);
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fflush(stdout);
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}
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if (cpu_has_sse2()) {
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SPEED_START {
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raid5_sse2(buffer, diskmax, block_size);
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@ -297,15 +287,6 @@ void speed(void)
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fflush(stdout);
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#if defined(__i386__) || defined(__x86_64__)
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if (cpu_has_mmx()) {
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SPEED_START {
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raid6_mmx(buffer, diskmax, block_size);
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} SPEED_STOP
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printf("%7"PRIu64, ds / dt);
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fflush(stdout);
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}
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if (cpu_has_sse2()) {
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SPEED_START {
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raid6_sse2(buffer, diskmax, block_size);
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@ -341,10 +322,6 @@ void speed(void)
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printf("%7s", "");
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printf("%7s", "");
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if (cpu_has_mmx()) {
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printf("%7s", "");
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}
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if (cpu_has_sse2()) {
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printf("%7s", "");
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@ -389,10 +366,6 @@ void speed(void)
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printf("%7s", "");
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printf("%7s", "");
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if (cpu_has_mmx()) {
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printf("%7s", "");
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}
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if (cpu_has_sse2()) {
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printf("%7s", "");
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@ -437,10 +410,6 @@ void speed(void)
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printf("%7s", "");
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printf("%7s", "");
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if (cpu_has_mmx()) {
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printf("%7s", "");
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}
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if (cpu_has_sse2()) {
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printf("%7s", "");
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@ -485,10 +454,6 @@ void speed(void)
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printf("%7s", "");
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printf("%7s", "");
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if (cpu_has_mmx()) {
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printf("%7s", "");
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}
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if (cpu_has_sse2()) {
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printf("%7s", "");
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