mirror of
https://github.com/amadvance/snapraid.git
synced 2026-10-26 10:51:54 -04:00
Use an implicit clobber list for asm snipsets
There is no speed gain in a custom clobber list.
This commit is contained in:
Andrea Mazzoleni
parent
54df8acd06
commit
763dccaaed
3 changed files with 36 additions and 126 deletions
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@ -195,20 +195,15 @@ static __always_inline void raid_asm_begin(void)
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{
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}
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static __always_inline void raid_asm_end(void)
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#ifdef CONFIG_SSE2
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static __always_inline void raid_asm_sse_end(void)
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{
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/* SSE2 and AVX2 code uses non-temporal writes, like MOVNTDQ, */
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/* SSE and AVX code uses non-temporal writes, like MOVNTDQ, */
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/* that use a weak memory model. To ensure that other processors */
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/* see correctly the data written, we use a store-store memory */
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/* barrier at the end of the asm code */
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#ifdef CONFIG_SSE2
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asm volatile ("sfence" : : : "memory");
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#endif
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}
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#ifdef CONFIG_SSE2
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static __always_inline void raid_asm_clobber_xmm4(void)
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{
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/* clobbers registers used in the asm code */
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/* this is required because in the Windows ABI, */
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/* registers xmm6-xmm15 should be kept by the callee. */
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@ -218,60 +213,27 @@ static __always_inline void raid_asm_clobber_xmm4(void)
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/* compiler supports SSE2 registers in the clobber list */
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#ifdef __SSE2__
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asm volatile ("" : : : "%xmm0", "%xmm1", "%xmm2", "%xmm3");
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#endif
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}
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#endif
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#ifdef CONFIG_SSE2
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static __always_inline void raid_asm_clobber_xmm8(void)
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{
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raid_asm_clobber_xmm4();
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#ifdef __SSE2__
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asm volatile ("" : : : "%xmm4", "%xmm5", "%xmm6", "%xmm7");
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#ifdef CONFIG_X86_64
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asm volatile ("" : : : "%xmm8", "%xmm9", "%xmm10", "%xmm11");
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asm volatile ("" : : : "%xmm12", "%xmm13", "%xmm14", "%xmm15");
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#endif
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#endif
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}
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#endif
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#ifdef CONFIG_AVX2
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static __always_inline void raid_asm_clobber_ymm4(void)
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static __always_inline void raid_asm_avx_end(void)
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{
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raid_asm_clobber_xmm4();
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raid_asm_sse_end();
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/* reset the upper part of the ymm registers */
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/* to avoid the 70 clocks penality on the next */
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/* xmm register use */
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asm volatile ("vzeroupper" : : : "memory");
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}
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#endif
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#ifdef CONFIG_AVX2
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static __always_inline void raid_asm_clobber_ymm8(void)
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{
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raid_asm_clobber_xmm8();
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asm volatile ("vzeroupper" : : : "memory");
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}
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#endif
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#endif /* CONFIG_X86 */
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#ifdef CONFIG_X86_64
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#ifdef CONFIG_SSE2
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static __always_inline void raid_asm_clobber_xmm16(void)
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{
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raid_asm_clobber_xmm8();
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#ifdef __SSE2__
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asm volatile ("" : : : "%xmm8", "%xmm9", "%xmm10", "%xmm11");
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asm volatile ("" : : : "%xmm12", "%xmm13", "%xmm14", "%xmm15");
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#endif
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}
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#endif
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#ifdef CONFIG_AVX2
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static __always_inline void raid_asm_clobber_ymm16(void)
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{
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raid_asm_clobber_xmm16();
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asm volatile ("vzeroupper" : : : "memory");
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}
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#endif
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#endif /* CONFIG_X86_64 */
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#endif
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92
raid/x86.c
92
raid/x86.c
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@ -52,9 +52,7 @@ void raid_gen1_sse2(int nd, size_t size, void **vv)
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asm volatile ("movntdq %%xmm3,%0" : "=m" (p[i + 48]));
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}
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raid_asm_clobber_xmm4();
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raid_asm_end();
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raid_asm_sse_end();
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}
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#endif
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@ -89,9 +87,7 @@ void raid_gen1_avx2(int nd, size_t size, void **vv)
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asm volatile ("vmovntdq %%ymm1,%0" : "=m" (p[i + 32]));
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}
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raid_asm_clobber_ymm4();
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raid_asm_end();
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raid_asm_avx_end();
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}
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#endif
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@ -162,9 +158,7 @@ void raid_gen2_sse2(int nd, size_t size, void **vv)
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asm volatile ("movntdq %%xmm3,%0" : "=m" (q[i + 16]));
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}
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raid_asm_clobber_xmm8();
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raid_asm_end();
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raid_asm_sse_end();
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}
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#endif
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@ -217,9 +211,7 @@ void raid_gen2_avx2(int nd, size_t size, void **vv)
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asm volatile ("vmovntdq %%ymm3,%0" : "=m" (q[i + 32]));
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}
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raid_asm_clobber_ymm8();
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raid_asm_end();
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raid_asm_avx_end();
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}
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#endif
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@ -299,9 +291,7 @@ void raid_gen2_sse2ext(int nd, size_t size, void **vv)
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asm volatile ("movntdq %%xmm7,%0" : "=m" (q[i + 48]));
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}
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raid_asm_clobber_xmm16();
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raid_asm_end();
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raid_asm_sse_end();
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}
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#endif
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@ -398,9 +388,7 @@ void raid_gen3_ssse3(int nd, size_t size, void **vv)
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asm volatile ("movntdq %%xmm2,%0" : "=m" (r[i]));
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}
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raid_asm_clobber_xmm8();
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raid_asm_end();
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raid_asm_sse_end();
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}
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#endif
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@ -541,9 +529,7 @@ void raid_gen3_ssse3ext(int nd, size_t size, void **vv)
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asm volatile ("movntdq %%xmm10,%0" : "=m" (r[i + 16]));
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}
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raid_asm_clobber_xmm16();
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raid_asm_end();
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raid_asm_sse_end();
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}
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#endif
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@ -676,9 +662,7 @@ void raid_gen3_avx2ext(int nd, size_t size, void **vv)
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asm volatile ("vmovntdq %%ymm10,%0" : "=m" (r[i + 32]));
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}
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raid_asm_clobber_ymm16();
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raid_asm_end();
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raid_asm_avx_end();
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}
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#endif
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@ -794,9 +778,7 @@ void raid_gen4_ssse3(int nd, size_t size, void **vv)
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asm volatile ("movntdq %%xmm3,%0" : "=m" (s[i]));
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}
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raid_asm_clobber_xmm8();
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raid_asm_end();
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raid_asm_sse_end();
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}
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#endif
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@ -969,9 +951,7 @@ void raid_gen4_ssse3ext(int nd, size_t size, void **vv)
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asm volatile ("movntdq %%xmm11,%0" : "=m" (s[i + 16]));
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}
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raid_asm_clobber_xmm16();
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raid_asm_end();
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raid_asm_sse_end();
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}
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#endif
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@ -1132,9 +1112,7 @@ void raid_gen4_avx2ext(int nd, size_t size, void **vv)
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asm volatile ("vmovntdq %%ymm11,%0" : "=m" (s[i + 32]));
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}
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raid_asm_clobber_ymm16();
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raid_asm_end();
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raid_asm_avx_end();
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}
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#endif
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@ -1274,9 +1252,7 @@ void raid_gen5_ssse3(int nd, size_t size, void **vv)
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asm volatile ("movntdq %%xmm3,%0" : "=m" (t[i]));
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}
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raid_asm_clobber_xmm8();
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raid_asm_end();
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raid_asm_sse_end();
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}
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#endif
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@ -1409,9 +1385,7 @@ void raid_gen5_ssse3ext(int nd, size_t size, void **vv)
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asm volatile ("movntdq %%xmm4,%0" : "=m" (t[i]));
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}
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raid_asm_clobber_xmm16();
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raid_asm_end();
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raid_asm_sse_end();
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}
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#endif
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@ -1541,9 +1515,7 @@ void raid_gen5_avx2ext(int nd, size_t size, void **vv)
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asm volatile ("vmovntdq %%ymm4,%0" : "=m" (t[i]));
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}
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raid_asm_clobber_ymm16();
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raid_asm_end();
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raid_asm_avx_end();
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}
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#endif
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@ -1705,9 +1677,7 @@ void raid_gen6_ssse3(int nd, size_t size, void **vv)
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asm volatile ("movntdq %%xmm3,%0" : "=m" (u[i]));
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}
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raid_asm_clobber_xmm8();
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raid_asm_end();
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raid_asm_sse_end();
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}
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#endif
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@ -1857,9 +1827,7 @@ void raid_gen6_ssse3ext(int nd, size_t size, void **vv)
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asm volatile ("movntdq %%xmm5,%0" : "=m" (u[i]));
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}
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raid_asm_clobber_xmm16();
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raid_asm_end();
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raid_asm_sse_end();
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}
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#endif
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@ -2006,9 +1974,7 @@ void raid_gen6_avx2ext(int nd, size_t size, void **vv)
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asm volatile ("vmovntdq %%ymm5,%0" : "=m" (u[i]));
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}
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raid_asm_clobber_ymm16();
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raid_asm_end();
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raid_asm_avx_end();
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}
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#endif
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@ -2067,9 +2033,7 @@ void raid_rec1_ssse3(int nr, int *id, int *ip, int nd, size_t size, void **vv)
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asm volatile ("movdqa %%xmm2,%0" : "=m" (pa[i]));
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}
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raid_asm_clobber_xmm8();
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raid_asm_end();
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raid_asm_sse_end();
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}
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#endif
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@ -2175,9 +2139,7 @@ void raid_rec2_ssse3(int nr, int *id, int *ip, int nd, size_t size, void **vv)
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asm volatile ("movdqa %%xmm6,%0" : "=m" (pa[1][i]));
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}
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raid_asm_clobber_xmm8();
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raid_asm_end();
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raid_asm_sse_end();
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}
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#endif
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@ -2253,9 +2215,7 @@ void raid_recX_ssse3(int nr, int *id, int *ip, int nd, size_t size, void **vv)
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}
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}
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raid_asm_clobber_xmm8();
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raid_asm_end();
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raid_asm_sse_end();
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}
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#endif
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@ -2312,9 +2272,7 @@ void raid_rec1_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
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asm volatile ("vmovdqa %%ymm2,%0" : "=m" (pa[i]));
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}
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raid_asm_clobber_ymm8();
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raid_asm_end();
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raid_asm_avx_end();
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}
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#endif
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@ -2412,9 +2370,7 @@ void raid_rec2_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
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asm volatile ("vmovdqa %%ymm6,%0" : "=m" (pa[1][i]));
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}
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raid_asm_clobber_ymm8();
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raid_asm_end();
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raid_asm_avx_end();
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}
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#endif
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@ -2489,9 +2445,7 @@ void raid_recX_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
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}
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}
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raid_asm_clobber_ymm8();
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raid_asm_end();
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raid_asm_avx_end();
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}
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#endif
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12
raid/x86z.c
12
raid/x86z.c
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@ -90,9 +90,7 @@ void raid_genz_sse2(int nd, size_t size, void **vv)
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asm volatile ("movntdq %%xmm2,%0" : "=m" (r[i]));
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}
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raid_asm_clobber_xmm8();
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raid_asm_end();
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raid_asm_sse_end();
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}
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#endif
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@ -174,9 +172,7 @@ void raid_genz_sse2ext(int nd, size_t size, void **vv)
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asm volatile ("movntdq %%xmm10,%0" : "=m" (r[i + 16]));
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}
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raid_asm_clobber_xmm16();
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raid_asm_end();
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raid_asm_sse_end();
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}
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#endif
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@ -253,9 +249,7 @@ void raid_genz_avx2ext(int nd, size_t size, void **vv)
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asm volatile ("vmovntdq %%ymm10,%0" : "=m" (r[i + 32]));
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}
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raid_asm_clobber_ymm16();
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raid_asm_end();
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raid_asm_avx_end();
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}
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#endif
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