Uses a more precise intructions set detection.

This allows to build with old assembler programs.
This commit is contained in:
Andrea Mazzoleni 2014-11-12 19:52:35 +01:00
parent c647e75885
commit 7d6c30333f
12 changed files with 355 additions and 119 deletions

View file

@ -23,10 +23,13 @@
#include <wchar.h>
/**
* Assume to always have CRC32B if running in x86
* Always assume that the assembler supports SSE2, SSSE3, SSE42 and AVX2 instructions in x86
*/
#ifdef CONFIG_X86
#define HAVE_CRC32B 1
#define HAVE_SSE2 1
#define HAVE_SSSE3 1
#define HAVE_SSE42 1
#define HAVE_AVX2 1
#endif
/**

View file

@ -61,8 +61,8 @@ static int64_t diffgettimeofday(struct timeval *start, struct timeval *stop)
* Stop time measurement.
*/
#define SPEED_STOP \
count += delta; \
gettimeofday(&stop, 0); \
count += delta; \
gettimeofday(&stop, 0); \
} while (diffgettimeofday(&start, &stop) < period * 1000LL) ; \
ds = size * (int64_t)count * nd; \
dt = diffgettimeofday(&start, &stop);
@ -190,7 +190,7 @@ void speed(int period)
printf("%8s", "intel");
fflush(stdout);
#if HAVE_CRC32B
#if HAVE_SSE42
if (raid_cpu_has_sse42()) {
SPEED_START {
for (j = 0; j < nd; ++j)
@ -288,6 +288,7 @@ void speed(int period)
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
SPEED_START {
raid_gen1_sse2(nd, size, v);
@ -296,6 +297,7 @@ void speed(int period)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_X86_64
printf("%8s", "");
@ -304,7 +306,7 @@ void speed(int period)
#ifdef CONFIG_X86_64
printf("%8s", "");
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
raid_gen1_avx2(nd, size, v);
@ -313,6 +315,7 @@ void speed(int period)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#endif
printf("\n");
@ -338,6 +341,7 @@ void speed(int period)
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
SPEED_START {
raid_gen2_sse2(nd, size, v);
@ -355,12 +359,13 @@ void speed(int period)
fflush(stdout);
#endif
}
#endif
printf("%8s", "");
#ifdef CONFIG_X86_64
printf("%8s", "");
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
raid_gen2_avx2(nd, size, v);
@ -369,6 +374,7 @@ void speed(int period)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#endif
printf("\n");
@ -394,6 +400,7 @@ void speed(int period)
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
SPEED_START {
raid_genz_sse2(nd, size, v);
@ -411,6 +418,7 @@ void speed(int period)
fflush(stdout);
#endif
}
#endif
printf("%8s", "");
#ifdef CONFIG_X86_64
@ -419,6 +427,7 @@ void speed(int period)
printf("%8s", "");
#ifdef CONFIG_X86_64
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
raid_genz_avx2ext(nd, size, v);
@ -428,6 +437,7 @@ void speed(int period)
fflush(stdout);
}
#endif
#endif
#endif
printf("\n");
@ -457,6 +467,7 @@ void speed(int period)
#endif
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
raid_gen3_ssse3(nd, size, v);
@ -474,10 +485,12 @@ void speed(int period)
fflush(stdout);
#endif
}
#endif
printf("%8s", "");
#ifdef CONFIG_X86_64
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
raid_gen3_avx2ext(nd, size, v);
@ -487,6 +500,7 @@ void speed(int period)
fflush(stdout);
}
#endif
#endif
#endif
printf("\n");
@ -506,6 +520,7 @@ void speed(int period)
printf("%8s", "");
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
printf("%8s", "");
@ -514,8 +529,10 @@ void speed(int period)
#endif
}
#endif
#endif
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
raid_gen4_ssse3(nd, size, v);
@ -533,10 +550,12 @@ void speed(int period)
fflush(stdout);
#endif
}
#endif
printf("%8s", "");
#ifdef CONFIG_X86_64
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
raid_gen4_avx2ext(nd, size, v);
@ -546,6 +565,7 @@ void speed(int period)
fflush(stdout);
}
#endif
#endif
#endif
printf("\n");
@ -565,6 +585,7 @@ void speed(int period)
printf("%8s", "");
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
printf("%8s", "");
@ -573,8 +594,10 @@ void speed(int period)
#endif
}
#endif
#endif
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
raid_gen5_ssse3(nd, size, v);
@ -592,10 +615,12 @@ void speed(int period)
fflush(stdout);
#endif
}
#endif
printf("%8s", "");
#ifdef CONFIG_X86_64
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
raid_gen5_avx2ext(nd, size, v);
@ -605,6 +630,7 @@ void speed(int period)
fflush(stdout);
}
#endif
#endif
#endif
printf("\n");
@ -624,6 +650,7 @@ void speed(int period)
printf("%8s", "");
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
printf("%8s", "");
@ -632,8 +659,10 @@ void speed(int period)
#endif
}
#endif
#endif
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
raid_gen6_ssse3(nd, size, v);
@ -651,10 +680,12 @@ void speed(int period)
fflush(stdout);
#endif
}
#endif
printf("%8s", "");
#ifdef CONFIG_X86_64
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
raid_gen6_avx2ext(nd, size, v);
@ -664,6 +695,7 @@ void speed(int period)
fflush(stdout);
}
#endif
#endif
#endif
printf("\n");
printf("\n");
@ -693,6 +725,7 @@ void speed(int period)
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
for (j = 0; j < nd; ++j)
@ -702,7 +735,8 @@ void speed(int period)
printf("%8" PRIu64, ds / dt);
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
for (j = 0; j < nd; ++j)
@ -712,6 +746,7 @@ void speed(int period)
printf("%8" PRIu64, ds / dt);
}
#endif
#endif
printf("\n");
@ -729,6 +764,7 @@ void speed(int period)
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
for (j = 0; j < nd; ++j)
@ -738,7 +774,8 @@ void speed(int period)
printf("%8" PRIu64, ds / dt);
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
for (j = 0; j < nd; ++j)
@ -748,6 +785,7 @@ void speed(int period)
printf("%8" PRIu64, ds / dt);
}
#endif
#endif
printf("\n");
@ -764,6 +802,7 @@ void speed(int period)
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
for (j = 0; j < nd; ++j)
@ -772,7 +811,8 @@ void speed(int period)
printf("%8" PRIu64, ds / dt);
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
for (j = 0; j < nd; ++j)
@ -781,6 +821,7 @@ void speed(int period)
printf("%8" PRIu64, ds / dt);
}
#endif
#endif
printf("\n");
@ -797,6 +838,7 @@ void speed(int period)
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
for (j = 0; j < nd; ++j)
@ -805,7 +847,8 @@ void speed(int period)
printf("%8" PRIu64, ds / dt);
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
for (j = 0; j < nd; ++j)
@ -814,6 +857,7 @@ void speed(int period)
printf("%8" PRIu64, ds / dt);
}
#endif
#endif
printf("\n");
@ -830,6 +874,7 @@ void speed(int period)
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
for (j = 0; j < nd; ++j)
@ -838,7 +883,8 @@ void speed(int period)
printf("%8" PRIu64, ds / dt);
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
for (j = 0; j < nd; ++j)
@ -847,6 +893,7 @@ void speed(int period)
printf("%8" PRIu64, ds / dt);
}
#endif
#endif
printf("\n");
@ -863,6 +910,7 @@ void speed(int period)
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
for (j = 0; j < nd; ++j)
@ -871,7 +919,8 @@ void speed(int period)
printf("%8" PRIu64, ds / dt);
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
for (j = 0; j < nd; ++j)
@ -880,6 +929,7 @@ void speed(int period)
printf("%8" PRIu64, ds / dt);
}
#endif
#endif
printf("\n");
printf("\n");

View file

@ -1185,8 +1185,7 @@ uint32_t crc32c_gen(uint32_t crc, const unsigned char* ptr, unsigned size)
return crc;
}
#if HAVE_CRC32B
#if HAVE_SSE42
uint32_t crc32c_x86(uint32_t crc, const unsigned char* ptr, unsigned size)
{
#ifdef CONFIG_X86_64
@ -1228,7 +1227,7 @@ uint32_t (*crc32c)(uint32_t crc, const unsigned char* ptr, unsigned size);
void crc32c_init(void)
{
crc32c = crc32c_gen;
#if HAVE_CRC32B
#if HAVE_SSE42
if (raid_cpu_has_sse42()) {
crc32c = crc32c_x86;
}

View file

@ -88,22 +88,70 @@ dnl Checks for compiler
AC_CHECK_CC_OPT([-Wall], CFLAGS="$CFLAGS -Wall", [])
AC_CHECK_CC_OPT([-Wextra], CFLAGS="$CFLAGS -Wextra", [])
dnl Checks for AS supporting the CRC instruction. In OpenBSD 5.4 it's not.
AC_MSG_CHECKING([for crc32b])
asmcrc=no
dnl Checks for AS supporting the SSE2 instructions.
AC_MSG_CHECKING([for sse2])
asmsse2=no
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
#if defined(__i386__) || defined(__x86_64__)
void f(void)
{
asm volatile("pxor %xmm0,%xmm1");
}
#else
#error not x86
#endif
]])],
[AC_DEFINE([HAVE_SSE2], [1], [Define to 1 if sse2 is supported by the assembler.]) asmsse2=yes])
AC_MSG_RESULT([$asmsse2])
dnl Checks for AS supporting the SSSE3 instructions.
AC_MSG_CHECKING([for ssse3])
asmssse3=no
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
#if defined(__i386__) || defined(__x86_64__)
void f(void)
{
asm volatile("pshufb %xmm0,%xmm1");
}
#else
#error not x86
#endif
]])],
[AC_DEFINE([HAVE_SSSE3], [1], [Define to 1 if ssse3 is supported by the assembler.]) asmssse3=yes])
AC_MSG_RESULT([$asmssse3])
dnl Checks for AS supporting the SSE4.2 instructions.
AC_MSG_CHECKING([for sse42])
asmsse42=no
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
#if defined(__i386__) || defined(__x86_64__)
unsigned f(unsigned crc, unsigned char b)
{
asm volatile ("crc32b %1, %0\n" : "+r" (crc) : "rm" (b));
asm volatile("crc32b %1, %0" : "+r" (crc) : "rm" (b));
return crc;
}
#else
#error not x86
#endif
]])],
[AC_DEFINE([HAVE_CRC32B], [1], [Define if statvfs exists.]) asmcrc=yes])
AC_MSG_RESULT([$asmcrc])
[AC_DEFINE([HAVE_SSE42], [1], [Define to 1 if sse4.2 is supported by the assembler.]) asmsse42=yes])
AC_MSG_RESULT([$asmsse42])
dnl Checks for AS supporting the AVX2 instructions.
AC_MSG_CHECKING([for avx2])
asmavx2=no
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
#if defined(__i386__) || defined(__x86_64__)
void f(void* ptr)
{
asm volatile("vbroadcasti128 %0, %%ymm0" : : "m" (ptr));
}
#else
#error not x86
#endif
]])],
[AC_DEFINE([HAVE_AVX2], [1], [Define to 1 if avx2 is supported by the assembler.]) asmavx2=yes])
AC_MSG_RESULT([$asmavx2])
dnl Checks for test environment
AS_CASE([$host],

View file

@ -121,12 +121,15 @@ static inline int raid_os_support_256bit_regs(void)
/* get the value of the Extended Control Register ecx=0 */
asm volatile(
"xgetbv\n"
/* uses a direct encoding of the XGETBV instruction as only recent */
/* assemblers support it. */
/* the next line is equivalent at: "xgetbv\n" */
".byte 0x0f, 0x01, 0xd0\n"
: "=a" (reg[0]), "=d" (reg[3])
: "c" (0)
);
/* check if the OS save all the 256 bits registers */
/* check if the OS saves the 256 bits registers in task switch */
return (reg[0] & 0x6) == 0x6;
}
@ -134,7 +137,7 @@ static inline int raid_cpu_has_avx2(void)
{
uint32_t reg[4];
/* check if the CPU supports XSAVE and XRSTOR, and also XGETBV */
/* check if the CPU supports XSAVE and XRSTOR, and XGETBV */
if (!raid_cpu_has_xsavexrstor())
return 0;

View file

@ -17,6 +17,8 @@
/*
* Supported architecture.
*
* Detect the target architecture directly from the compiler.
*/
#if defined(__i386__)
#define CONFIG_X86 1
@ -28,6 +30,41 @@
#define CONFIG_X86_64 1
#endif
/*
* Supported instruction sets.
*
* It may happen that the assembler is too old to support
* all instructions, even if the architecture supports them.
* These defines allow to exclude from the build the not supported ones.
*
* If in your project you use a predefined assembler, you can define them
* using fixed values, instead of using the HAVE_* defines.
*/
#if HAVE_CONFIG_H
/* Includes the project configuration for HAVE_* defines */
#include "../config.h"
#if HAVE_SSE2 /* Enables SSE2 only if the assembler supports it */
#define CONFIG_SSE2 1
#endif
#if HAVE_SSSE3 /* Enables SSSE3 only if the assembler supports it */
#define CONFIG_SSSE3 1
#endif
#if HAVE_AVX2 /* Enables AVX2 only if the assembler supports it */
#define CONFIG_AVX2 1
#endif
#else
/* If no config file, assumes the assembler supports everything in x86 */
#ifdef CONFIG_X86
#define CONFIG_SSE2 1
#define CONFIG_SSSE3 1
#define CONFIG_AVX2 1
#endif
#endif
/*
* Includes anything required for compatibility.
*/
@ -160,11 +197,13 @@ static __always_inline void raid_asm_begin(void)
static __always_inline void raid_asm_end(void)
{
/* SSE2 and AVX2 code uses non-temporal writes, like movntdq, */
/* SSE2 and AVX2 code uses non-temporal writes, like MOVNTDQ, */
/* that use a weak memory model. To ensure that other processors */
/* see correctly the data written, we use a store-store memory */
/* barrier at the end of the asm code */
#ifdef CONFIG_SSE2
asm volatile("sfence" : : : "memory");
#endif
}
static __always_inline void raid_asm_clobber_xmm4(void)
@ -174,7 +213,9 @@ static __always_inline void raid_asm_clobber_xmm4(void)
/* registers xmm6-xmm15 should be kept by the callee. */
/* this clobber list force the compiler to save any */
/* register that needs to be saved */
#ifdef __SSE__
/* we check for __SSE2_ because we require that the */
/* compiler supports SSE2 registers in the clobber list */
#if defined(CONFIG_SSE2) && defined(__SSE2__)
asm volatile("" : : : "%xmm0", "%xmm1", "%xmm2", "%xmm3");
#endif
}
@ -182,7 +223,7 @@ static __always_inline void raid_asm_clobber_xmm4(void)
static __always_inline void raid_asm_clobber_xmm8(void)
{
raid_asm_clobber_xmm4();
#ifdef __SSE__
#if defined(CONFIG_SSE2) && defined(__SSE2__)
asm volatile("" : : : "%xmm4", "%xmm5", "%xmm6", "%xmm7");
#endif
}
@ -193,21 +234,25 @@ static __always_inline void raid_asm_clobber_ymm4(void)
/* reset the upper part of the ymm registers */
/* to avoid the 70 clocks penality on the next */
/* xmm register use */
#ifdef CONFIG_AVX2
asm volatile("vzeroupper" : : : "memory");
#endif
}
static __always_inline void raid_asm_clobber_ymm8(void)
{
raid_asm_clobber_xmm8();
#ifdef CONFIG_AVX2
asm volatile("vzeroupper" : : : "memory");
}
#endif
}
#endif /* CONFIG_X86 */
#ifdef CONFIG_X86_64
static __always_inline void raid_asm_clobber_xmm16(void)
{
raid_asm_clobber_xmm8();
#ifdef __SSE__
#if defined(CONFIG_SSE2) && defined(__SSE2__)
asm volatile("" : : : "%xmm8", "%xmm9", "%xmm10", "%xmm11");
asm volatile("" : : : "%xmm12", "%xmm13", "%xmm14", "%xmm15");
#endif
@ -216,9 +261,11 @@ static __always_inline void raid_asm_clobber_xmm16(void)
static __always_inline void raid_asm_clobber_ymm16(void)
{
raid_asm_clobber_xmm16();
#ifdef CONFIG_AVX2
asm volatile("vzeroupper" : : : "memory");
#endif
}
#endif
#endif /* CONFIG_X86_64 */
#endif

View file

@ -44,6 +44,7 @@ void raid_init(void)
raid_rec_ptr[5] = raid_recX_int8;
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
raid_gen_ptr[0] = raid_gen1_sse2;
#ifdef CONFIG_X86_64
@ -59,7 +60,9 @@ void raid_init(void)
raid_genz_ptr = raid_genz_sse2;
#endif
}
#endif
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
#ifdef CONFIG_X86_64
raid_gen3_ptr = raid_gen3_ssse3ext;
@ -79,7 +82,9 @@ void raid_init(void)
raid_rec_ptr[4] = raid_recX_ssse3;
raid_rec_ptr[5] = raid_recX_ssse3;
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
raid_gen_ptr[0] = raid_gen1_avx2;
raid_gen_ptr[1] = raid_gen2_avx2;
@ -98,6 +103,7 @@ void raid_init(void)
raid_rec_ptr[5] = raid_recX_avx2;
}
#endif
#endif /* CONFIG_X86 */
/* set the default mode */
raid_mode(RAID_MODE_CAUCHY);

View file

@ -33,9 +33,12 @@ static struct raid_func {
{ "int8", raid_recX_int8 },
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
{ "sse2", raid_gen1_sse2 },
{ "sse2", raid_gen2_sse2 },
{ "sse2", raid_genz_sse2 },
#endif
#ifdef CONFIG_SSSE3
{ "ssse3", raid_gen3_ssse3 },
{ "ssse3", raid_gen4_ssse3 },
{ "ssse3", raid_gen5_ssse3 },
@ -43,12 +46,15 @@ static struct raid_func {
{ "ssse3", raid_rec1_ssse3 },
{ "ssse3", raid_rec2_ssse3 },
{ "ssse3", raid_recX_ssse3 },
#endif
#ifdef CONFIG_AVX2
{ "avx2", raid_gen1_avx2 },
{ "avx2", raid_gen2_avx2 },
{ "avx2", raid_rec1_avx2 },
{ "avx2", raid_rec2_avx2 },
{ "avx2", raid_recX_avx2 },
#endif
#endif
#ifdef CONFIG_X86_64
{ "sse2e", raid_gen2_sse2ext },

View file

@ -183,26 +183,38 @@ int raid_test_rec(int mode, int nd, size_t size)
if (i == 0) {
f[i][nf[i]++] = raid_rec1_int8;
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3())
f[i][nf[i]++] = raid_rec1_ssse3;
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2())
f[i][nf[i]++] = raid_rec1_avx2;
#endif
#endif
} else if (i == 1) {
f[i][nf[i]++] = raid_rec2_int8;
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3())
f[i][nf[i]++] = raid_rec2_ssse3;
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2())
f[i][nf[i]++] = raid_rec2_avx2;
#endif
#endif
} else {
f[i][nf[i]++] = raid_recX_int8;
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3())
f[i][nf[i]++] = raid_recX_ssse3;
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2())
f[i][nf[i]++] = raid_recX_avx2;
#endif
#endif
}
}
@ -308,6 +320,7 @@ int raid_test_par(int mode, int nd, size_t size)
f[nf++] = raid_gen2_int64;
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
f[nf++] = raid_gen1_sse2;
f[nf++] = raid_gen2_sse2;
@ -315,12 +328,15 @@ int raid_test_par(int mode, int nd, size_t size)
f[nf++] = raid_gen2_sse2ext;
#endif
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
f[nf++] = raid_gen1_avx2;
f[nf++] = raid_gen2_avx2;
}
#endif
#endif /* CONFIG_X86 */
if (mode == RAID_MODE_CAUCHY) {
f[nf++] = raid_gen3_int8;
@ -329,6 +345,7 @@ int raid_test_par(int mode, int nd, size_t size)
f[nf++] = raid_gen6_int8;
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
f[nf++] = raid_gen3_ssse3;
f[nf++] = raid_gen4_ssse3;
@ -341,7 +358,9 @@ int raid_test_par(int mode, int nd, size_t size)
f[nf++] = raid_gen6_ssse3ext;
#endif
}
#endif
#ifdef CONFIG_AVX2
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx2()) {
f[nf++] = raid_gen3_avx2ext;
@ -351,23 +370,28 @@ int raid_test_par(int mode, int nd, size_t size)
}
#endif
#endif
#endif /* CONFIG_X86 */
} else {
f[nf++] = raid_genz_int32;
f[nf++] = raid_genz_int64;
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
f[nf++] = raid_genz_sse2;
#ifdef CONFIG_X86_64
f[nf++] = raid_genz_sse2ext;
#endif
}
#endif
#ifdef CONFIG_AVX2
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx2())
f[nf++] = raid_genz_avx2ext;
#endif
#endif
#endif /* CONFIG_X86 */
}
/* check all the functions */

View file

@ -25,7 +25,7 @@
/*
* Size of the blocks to test.
*/
#define TEST_SIZE (256*1024)
#define TEST_SIZE (256 * 1024)
/*
* Number of data blocks to test.
@ -101,8 +101,8 @@ void speed(void)
memset(v[i], i, size);
/* zero buffer */
memset(v[nd+RAID_PARITY_MAX], 0, size);
raid_zero(v[nd+RAID_PARITY_MAX]);
memset(v[nd + RAID_PARITY_MAX], 0, size);
raid_zero(v[nd + RAID_PARITY_MAX]);
/* basic disks and parity mapping */
for (i = 0; i < RAID_PARITY_MAX; ++i) {
@ -125,7 +125,7 @@ void speed(void)
memset(v[j], j, size);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
printf("\n");
printf("\n");
@ -163,25 +163,27 @@ void speed(void)
raid_gen1_int32(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
SPEED_START {
raid_gen1_int64(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
SPEED_START {
raid_gen1_sse2(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_X86_64
printf("%8s", "");
@ -190,15 +192,16 @@ void speed(void)
#ifdef CONFIG_X86_64
printf("%8s", "");
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
raid_gen1_avx2(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#endif
printf("\n");
@ -213,23 +216,24 @@ void speed(void)
raid_gen2_int32(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
SPEED_START {
raid_gen2_int64(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
SPEED_START {
raid_gen2_sse2(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#ifdef CONFIG_X86_64
@ -237,24 +241,26 @@ void speed(void)
raid_gen2_sse2ext(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#endif
}
#endif
printf("%8s", "");
#ifdef CONFIG_X86_64
printf("%8s", "");
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
raid_gen2_avx2(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#endif
printf("\n");
@ -269,23 +275,24 @@ void speed(void)
raid_genz_int32(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
SPEED_START {
raid_genz_int64(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
SPEED_START {
raid_genz_sse2(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#ifdef CONFIG_X86_64
@ -293,10 +300,11 @@ void speed(void)
raid_genz_sse2ext(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#endif
}
#endif
printf("%8s", "");
#ifdef CONFIG_X86_64
@ -305,15 +313,17 @@ void speed(void)
printf("%8s", "");
#ifdef CONFIG_X86_64
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
raid_genz_avx2ext(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#endif
#endif
printf("\n");
@ -326,7 +336,7 @@ void speed(void)
raid_gen3_int8(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
printf("%8s", "");
@ -343,12 +353,13 @@ void speed(void)
#endif
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
raid_gen3_ssse3(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#ifdef CONFIG_X86_64
@ -356,23 +367,26 @@ void speed(void)
raid_gen3_ssse3ext(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#endif
}
#endif
printf("%8s", "");
#ifdef CONFIG_X86_64
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
raid_gen3_avx2ext(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#endif
#endif
printf("\n");
@ -385,13 +399,14 @@ void speed(void)
raid_gen4_int8(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
printf("%8s", "");
printf("%8s", "");
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
printf("%8s", "");
@ -400,14 +415,16 @@ void speed(void)
#endif
}
#endif
#endif
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
raid_gen4_ssse3(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#ifdef CONFIG_X86_64
@ -415,23 +432,26 @@ void speed(void)
raid_gen4_ssse3ext(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#endif
}
#endif
printf("%8s", "");
#ifdef CONFIG_X86_64
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
raid_gen4_avx2ext(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#endif
#endif
printf("\n");
@ -444,13 +464,14 @@ void speed(void)
raid_gen5_int8(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
printf("%8s", "");
printf("%8s", "");
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
printf("%8s", "");
@ -459,14 +480,16 @@ void speed(void)
#endif
}
#endif
#endif
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
raid_gen5_ssse3(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#ifdef CONFIG_X86_64
@ -474,23 +497,26 @@ void speed(void)
raid_gen5_ssse3ext(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#endif
}
#endif
printf("%8s", "");
#ifdef CONFIG_X86_64
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
raid_gen5_avx2ext(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#endif
#endif
printf("\n");
@ -503,13 +529,14 @@ void speed(void)
raid_gen6_int8(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
printf("%8s", "");
printf("%8s", "");
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
printf("%8s", "");
@ -518,14 +545,16 @@ void speed(void)
#endif
}
#endif
#endif
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
raid_gen6_ssse3(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#ifdef CONFIG_X86_64
@ -533,23 +562,26 @@ void speed(void)
raid_gen6_ssse3ext(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#endif
}
#endif
printf("%8s", "");
#ifdef CONFIG_X86_64
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
raid_gen6_avx2ext(nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#endif
#endif
printf("\n");
printf("\n");
@ -575,10 +607,11 @@ void speed(void)
raid_rec1_int8(1, id, ip + 1, nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
for (j = 0; j < nd; ++j)
@ -586,9 +619,10 @@ void speed(void)
raid_rec1_ssse3(1, id, ip + 1, nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
for (j = 0; j < nd; ++j)
@ -596,8 +630,9 @@ void speed(void)
raid_rec1_avx2(1, id, ip + 1, nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
}
#endif
#endif
printf("\n");
@ -611,10 +646,11 @@ void speed(void)
raid_rec2_int8(2, id, ip + 1, nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
for (j = 0; j < nd; ++j)
@ -622,9 +658,10 @@ void speed(void)
raid_rec2_ssse3(2, id, ip + 1, nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
for (j = 0; j < nd; ++j)
@ -632,8 +669,9 @@ void speed(void)
raid_rec2_avx2(2, id, ip + 1, nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
}
#endif
#endif
printf("\n");
@ -646,27 +684,30 @@ void speed(void)
raid_recX_int8(3, id, ip, nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
for (j = 0; j < nd; ++j)
raid_recX_ssse3(3, id, ip, nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
for (j = 0; j < nd; ++j)
raid_recX_avx2(3, id, ip, nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
}
#endif
#endif
printf("\n");
@ -679,27 +720,30 @@ void speed(void)
raid_recX_int8(4, id, ip, nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
for (j = 0; j < nd; ++j)
raid_recX_ssse3(4, id, ip, nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
for (j = 0; j < nd; ++j)
raid_recX_avx2(4, id, ip, nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
}
#endif
#endif
printf("\n");
@ -712,27 +756,30 @@ void speed(void)
raid_recX_int8(5, id, ip, nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
for (j = 0; j < nd; ++j)
raid_recX_ssse3(5, id, ip, nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
for (j = 0; j < nd; ++j)
raid_recX_avx2(5, id, ip, nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
}
#endif
#endif
printf("\n");
@ -745,27 +792,30 @@ void speed(void)
raid_recX_int8(6, id, ip, nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
for (j = 0; j < nd; ++j)
raid_recX_ssse3(6, id, ip, nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
for (j = 0; j < nd; ++j)
raid_recX_avx2(6, id, ip, nd, size, v);
} SPEED_STOP
printf("%8"PRIu64, ds / dt);
printf("%8" PRIu64, ds / dt);
}
#endif
#endif
printf("\n");
printf("\n");

View file

@ -15,7 +15,7 @@
#include "internal.h"
#include "gf.h"
#ifdef CONFIG_X86
#if defined(CONFIG_X86) && defined(CONFIG_SSE2)
/*
* GEN1 (RAID5 with xor) SSE2 implementation
*
@ -58,7 +58,7 @@ void raid_gen1_sse2(int nd, size_t size, void **vv)
}
#endif
#ifdef CONFIG_X86
#if defined(CONFIG_X86) && defined(CONFIG_AVX2)
/*
* GEN1 (RAID5 with xor) AVX2 implementation
*
@ -95,7 +95,7 @@ void raid_gen1_avx2(int nd, size_t size, void **vv)
}
#endif
#ifdef CONFIG_X86
#if defined(CONFIG_X86) && defined(CONFIG_SSE2)
static const struct gfconst16 {
uint8_t poly[16];
uint8_t low4[16];
@ -111,7 +111,7 @@ static const struct gfconst16 {
};
#endif
#ifdef CONFIG_X86
#if defined(CONFIG_X86) && defined(CONFIG_SSE2)
/*
* GEN2 (RAID6 with powers of 2) SSE2 implementation
*/
@ -167,7 +167,7 @@ void raid_gen2_sse2(int nd, size_t size, void **vv)
}
#endif
#ifdef CONFIG_X86
#if defined(CONFIG_X86) && defined(CONFIG_AVX2)
/*
* GEN2 (RAID6 with powers of 2) AVX2 implementation
*/
@ -222,7 +222,7 @@ void raid_gen2_avx2(int nd, size_t size, void **vv)
}
#endif
#ifdef CONFIG_X86_64
#if defined(CONFIG_X86_64) && defined(CONFIG_SSE2)
/*
* GEN2 (RAID6 with powers of 2) SSE2 implementation
*
@ -304,7 +304,7 @@ void raid_gen2_sse2ext(int nd, size_t size, void **vv)
}
#endif
#ifdef CONFIG_X86
#if defined(CONFIG_X86) && defined(CONFIG_SSSE3)
/*
* GEN3 (triple parity with Cauchy matrix) SSSE3 implementation
*/
@ -403,7 +403,7 @@ void raid_gen3_ssse3(int nd, size_t size, void **vv)
}
#endif
#ifdef CONFIG_X86_64
#if defined(CONFIG_X86_64) && defined(CONFIG_SSSE3)
/*
* GEN3 (triple parity with Cauchy matrix) SSSE3 implementation
*
@ -546,7 +546,7 @@ void raid_gen3_ssse3ext(int nd, size_t size, void **vv)
}
#endif
#ifdef CONFIG_X86_64
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX2)
/*
* GEN3 (triple parity with Cauchy matrix) AVX2 implementation
*
@ -681,7 +681,7 @@ void raid_gen3_avx2ext(int nd, size_t size, void **vv)
}
#endif
#ifdef CONFIG_X86
#if defined(CONFIG_X86) && defined(CONFIG_SSSE3)
/*
* GEN4 (quad parity with Cauchy matrix) SSSE3 implementation
*/
@ -799,7 +799,7 @@ void raid_gen4_ssse3(int nd, size_t size, void **vv)
}
#endif
#ifdef CONFIG_X86_64
#if defined(CONFIG_X86_64) && defined(CONFIG_SSSE3)
/*
* GEN4 (quad parity with Cauchy matrix) SSSE3 implementation
*
@ -974,7 +974,7 @@ void raid_gen4_ssse3ext(int nd, size_t size, void **vv)
}
#endif
#ifdef CONFIG_X86_64
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX2)
/*
* GEN4 (quad parity with Cauchy matrix) AVX2 implementation
*
@ -1137,7 +1137,7 @@ void raid_gen4_avx2ext(int nd, size_t size, void **vv)
}
#endif
#ifdef CONFIG_X86
#if defined(CONFIG_X86) && defined(CONFIG_SSSE3)
/*
* GEN5 (penta parity with Cauchy matrix) SSSE3 implementation
*/
@ -1279,7 +1279,7 @@ void raid_gen5_ssse3(int nd, size_t size, void **vv)
}
#endif
#ifdef CONFIG_X86_64
#if defined(CONFIG_X86_64) && defined(CONFIG_SSSE3)
/*
* GEN5 (penta parity with Cauchy matrix) SSSE3 implementation
*
@ -1414,7 +1414,7 @@ void raid_gen5_ssse3ext(int nd, size_t size, void **vv)
}
#endif
#ifdef CONFIG_X86_64
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX2)
/*
* GEN5 (penta parity with Cauchy matrix) AVX2 implementation
*
@ -1546,7 +1546,7 @@ void raid_gen5_avx2ext(int nd, size_t size, void **vv)
}
#endif
#ifdef CONFIG_X86
#if defined(CONFIG_X86) && defined(CONFIG_SSSE3)
/*
* GEN6 (hexa parity with Cauchy matrix) SSSE3 implementation
*/
@ -1710,7 +1710,7 @@ void raid_gen6_ssse3(int nd, size_t size, void **vv)
}
#endif
#ifdef CONFIG_X86_64
#if defined(CONFIG_X86_64) && defined(CONFIG_SSSE3)
/*
* GEN6 (hexa parity with Cauchy matrix) SSSE3 implementation
*
@ -1862,7 +1862,7 @@ void raid_gen6_ssse3ext(int nd, size_t size, void **vv)
}
#endif
#ifdef CONFIG_X86_64
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX2)
/*
* GEN6 (hexa parity with Cauchy matrix) AVX2 implementation
*
@ -2011,7 +2011,7 @@ void raid_gen6_avx2ext(int nd, size_t size, void **vv)
}
#endif
#ifdef CONFIG_X86
#if defined(CONFIG_X86) && defined(CONFIG_SSSE3)
/*
* RAID recovering for one disk SSSE3 implementation
*/
@ -2072,7 +2072,7 @@ void raid_rec1_ssse3(int nr, int *id, int *ip, int nd, size_t size, void **vv)
}
#endif
#ifdef CONFIG_X86
#if defined(CONFIG_X86) && defined(CONFIG_SSSE3)
/*
* RAID recovering for two disks SSSE3 implementation
*/
@ -2180,7 +2180,7 @@ void raid_rec2_ssse3(int nr, int *id, int *ip, int nd, size_t size, void **vv)
}
#endif
#ifdef CONFIG_X86
#if defined(CONFIG_X86) && defined(CONFIG_SSSE3)
/*
* RAID recovering SSSE3 implementation
*/
@ -2259,7 +2259,7 @@ void raid_recX_ssse3(int nr, int *id, int *ip, int nd, size_t size, void **vv)
#endif
#ifdef CONFIG_X86
#if defined(CONFIG_X86) && defined(CONFIG_AVX2)
/*
* RAID recovering for one disk AVX2 implementation
*/
@ -2317,7 +2317,7 @@ void raid_rec1_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
}
#endif
#ifdef CONFIG_X86
#if defined(CONFIG_X86) && defined(CONFIG_AVX2)
/*
* RAID recovering for two disks AVX2 implementation
*/
@ -2417,7 +2417,7 @@ void raid_rec2_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
}
#endif
#ifdef CONFIG_X86
#if defined(CONFIG_X86) && defined(CONFIG_AVX2)
/*
* RAID recovering AVX2 implementation
*/

View file

@ -14,7 +14,7 @@
#include "internal.h"
#ifdef CONFIG_X86
#if defined(CONFIG_X86) && defined(CONFIG_SSE2)
static const struct gfzconst16 {
uint8_t poly[16];
uint8_t half[16];
@ -35,7 +35,7 @@ static const struct gfzconst16 {
};
#endif
#ifdef CONFIG_X86
#if defined(CONFIG_X86) && defined(CONFIG_SSE2)
/*
* GENz (triple parity with powers of 2^-1) SSE2 implementation
*/
@ -95,7 +95,7 @@ void raid_genz_sse2(int nd, size_t size, void **vv)
}
#endif
#ifdef CONFIG_X86_64
#if defined(CONFIG_X86_64) && defined(CONFIG_SSE2)
/*
* GENz (triple parity with powers of 2^-1) SSE2 implementation
*
@ -179,7 +179,7 @@ void raid_genz_sse2ext(int nd, size_t size, void **vv)
}
#endif
#ifdef CONFIG_X86_64
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX2)
/*
* GENz (triple parity with powers of 2^-1) AVX2 implementation
*