mirror of
https://github.com/amadvance/snapraid.git
synced 2026-10-26 19:01:57 -04:00
Uses logical shift instead than arithmetic.
This commit is contained in:
Andrea Mazzoleni
parent
b802d49fb3
commit
a10e8d2c2a
1 changed files with 26 additions and 26 deletions
52
raid.c
52
raid.c
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@ -875,7 +875,7 @@ void raidS3_ssse3(unsigned char** vbuf, unsigned data, unsigned size)
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asm volatile("movdqa %xmm4,%xmm1");
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asm volatile("movdqa %xmm4,%xmm5");
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asm volatile("psraw $4,%xmm5");
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asm volatile("psrlw $4,%xmm5");
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asm volatile("pand %xmm7,%xmm4");
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asm volatile("pand %xmm7,%xmm5");
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@ -899,7 +899,7 @@ void raidS3_ssse3(unsigned char** vbuf, unsigned data, unsigned size)
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asm volatile("pxor %xmm4,%xmm1");
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asm volatile("movdqa %xmm4,%xmm5");
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asm volatile("psraw $4,%xmm5");
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asm volatile("psrlw $4,%xmm5");
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asm volatile("pand %xmm7,%xmm4");
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asm volatile("pand %xmm7,%xmm5");
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@ -967,8 +967,8 @@ void raidS3_ssse3ext(unsigned char** vbuf, unsigned data, unsigned size)
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asm volatile("movdqa %xmm4,%xmm5");
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asm volatile("movdqa %xmm12,%xmm13");
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asm volatile("psraw $4,%xmm5");
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asm volatile("psraw $4,%xmm13");
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asm volatile("psrlw $4,%xmm5");
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asm volatile("psrlw $4,%xmm13");
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asm volatile("pand %xmm11,%xmm4");
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asm volatile("pand %xmm11,%xmm12");
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asm volatile("pand %xmm11,%xmm5");
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@ -1008,8 +1008,8 @@ void raidS3_ssse3ext(unsigned char** vbuf, unsigned data, unsigned size)
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asm volatile("movdqa %xmm4,%xmm5");
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asm volatile("movdqa %xmm12,%xmm13");
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asm volatile("psraw $4,%xmm5");
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asm volatile("psraw $4,%xmm13");
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asm volatile("psrlw $4,%xmm5");
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asm volatile("psrlw $4,%xmm13");
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asm volatile("pand %xmm11,%xmm4");
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asm volatile("pand %xmm11,%xmm12");
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asm volatile("pand %xmm11,%xmm5");
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@ -1142,7 +1142,7 @@ void raidS4_ssse3(unsigned char** vbuf, unsigned data, unsigned size)
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asm volatile("movdqa %xmm4,%xmm1");
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asm volatile("movdqa %xmm4,%xmm5");
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asm volatile("psraw $4,%xmm5");
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asm volatile("psrlw $4,%xmm5");
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asm volatile("pand %xmm7,%xmm4");
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asm volatile("pand %xmm7,%xmm5");
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@ -1175,7 +1175,7 @@ void raidS4_ssse3(unsigned char** vbuf, unsigned data, unsigned size)
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asm volatile("pxor %xmm4,%xmm1");
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asm volatile("movdqa %xmm4,%xmm5");
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asm volatile("psraw $4,%xmm5");
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asm volatile("psrlw $4,%xmm5");
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asm volatile("pand %xmm7,%xmm4");
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asm volatile("pand %xmm7,%xmm5");
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@ -1253,8 +1253,8 @@ void raidS4_ssse3ext(unsigned char** vbuf, unsigned data, unsigned size)
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asm volatile("movdqa %xmm4,%xmm5");
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asm volatile("movdqa %xmm12,%xmm13");
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asm volatile("psraw $4,%xmm5");
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asm volatile("psraw $4,%xmm13");
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asm volatile("psrlw $4,%xmm5");
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asm volatile("psrlw $4,%xmm13");
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asm volatile("pand %xmm15,%xmm4");
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asm volatile("pand %xmm15,%xmm12");
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asm volatile("pand %xmm15,%xmm5");
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@ -1307,8 +1307,8 @@ void raidS4_ssse3ext(unsigned char** vbuf, unsigned data, unsigned size)
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asm volatile("movdqa %xmm4,%xmm5");
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asm volatile("movdqa %xmm12,%xmm13");
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asm volatile("psraw $4,%xmm5");
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asm volatile("psraw $4,%xmm13");
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asm volatile("psrlw $4,%xmm5");
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asm volatile("psrlw $4,%xmm13");
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asm volatile("pand %xmm15,%xmm4");
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asm volatile("pand %xmm15,%xmm12");
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asm volatile("pand %xmm15,%xmm5");
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@ -1473,7 +1473,7 @@ void raidS5_ssse3(unsigned char** vbuf, unsigned data, unsigned size)
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asm volatile("movdqa %0,%%xmm7" : : "m" (gfconst16.mask[0]));
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asm volatile("movdqa %xmm4,%xmm5");
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asm volatile("psraw $4,%xmm5");
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asm volatile("psrlw $4,%xmm5");
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asm volatile("pand %xmm7,%xmm4");
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asm volatile("pand %xmm7,%xmm5");
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@ -1513,7 +1513,7 @@ void raidS5_ssse3(unsigned char** vbuf, unsigned data, unsigned size)
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asm volatile("movdqa %0,%%xmm7" : : "m" (gfconst16.mask[0]));
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asm volatile("movdqa %xmm4,%xmm5");
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asm volatile("psraw $4,%xmm5");
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asm volatile("psrlw $4,%xmm5");
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asm volatile("pand %xmm7,%xmm4");
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asm volatile("pand %xmm7,%xmm5");
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@ -1601,7 +1601,7 @@ void raidS5_ssse3ext(unsigned char** vbuf, unsigned data, unsigned size)
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asm volatile("movdqa %xmm10,%xmm1");
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asm volatile("movdqa %xmm10,%xmm11");
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asm volatile("psraw $4,%xmm11");
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asm volatile("psrlw $4,%xmm11");
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asm volatile("pand %xmm15,%xmm10");
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asm volatile("pand %xmm15,%xmm11");
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@ -1637,7 +1637,7 @@ void raidS5_ssse3ext(unsigned char** vbuf, unsigned data, unsigned size)
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asm volatile("pxor %xmm10,%xmm1");
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asm volatile("movdqa %xmm10,%xmm11");
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asm volatile("psraw $4,%xmm11");
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asm volatile("psrlw $4,%xmm11");
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asm volatile("pand %xmm15,%xmm10");
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asm volatile("pand %xmm15,%xmm11");
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@ -1788,7 +1788,7 @@ void raidS6_ssse3(unsigned char** vbuf, unsigned data, unsigned size)
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asm volatile("movdqa %0,%%xmm7" : : "m" (gfconst16.mask[0]));
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asm volatile("movdqa %xmm4,%xmm5");
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asm volatile("psraw $4,%xmm5");
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asm volatile("psrlw $4,%xmm5");
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asm volatile("pand %xmm7,%xmm4");
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asm volatile("pand %xmm7,%xmm5");
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@ -1837,7 +1837,7 @@ void raidS6_ssse3(unsigned char** vbuf, unsigned data, unsigned size)
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asm volatile("movdqa %0,%%xmm7" : : "m" (gfconst16.mask[0]));
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asm volatile("movdqa %xmm4,%xmm5");
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asm volatile("psraw $4,%xmm5");
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asm volatile("psrlw $4,%xmm5");
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asm volatile("pand %xmm7,%xmm4");
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asm volatile("pand %xmm7,%xmm5");
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@ -1937,7 +1937,7 @@ void raidS6_ssse3ext(unsigned char** vbuf, unsigned data, unsigned size)
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asm volatile("movdqa %xmm10,%xmm1");
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asm volatile("movdqa %xmm10,%xmm11");
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asm volatile("psraw $4,%xmm11");
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asm volatile("psrlw $4,%xmm11");
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asm volatile("pand %xmm15,%xmm10");
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asm volatile("pand %xmm15,%xmm11");
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@ -1979,7 +1979,7 @@ void raidS6_ssse3ext(unsigned char** vbuf, unsigned data, unsigned size)
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asm volatile("pxor %xmm10,%xmm1");
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asm volatile("movdqa %xmm10,%xmm11");
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asm volatile("psraw $4,%xmm11");
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asm volatile("psrlw $4,%xmm11");
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asm volatile("pand %xmm15,%xmm10");
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asm volatile("pand %xmm15,%xmm11");
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@ -2572,7 +2572,7 @@ void raid_recov1_ssse3(unsigned level, const int* d, const int* c, unsigned char
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asm volatile("movdqa %xmm5,%xmm3");
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asm volatile("pxor %xmm0,%xmm1");
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asm volatile("movdqa %xmm1,%xmm0");
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asm volatile("psraw $4,%xmm1");
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asm volatile("psrlw $4,%xmm1");
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asm volatile("pand %xmm7,%xmm0");
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asm volatile("pand %xmm7,%xmm1");
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asm volatile("pshufb %xmm0,%xmm2");
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@ -2634,7 +2634,7 @@ void raid_recov2_ssse3(unsigned level, const int* d, const int* c, unsigned char
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asm volatile("movdqa %0,%%xmm3" : : "m" (gfmulpshufb[V[0]][1][0]));
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asm volatile("movdqa %xmm0,%xmm4");
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asm volatile("movdqa %xmm0,%xmm5");
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asm volatile("psraw $4,%xmm5");
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asm volatile("psrlw $4,%xmm5");
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asm volatile("pand %xmm7,%xmm4");
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asm volatile("pand %xmm7,%xmm5");
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asm volatile("pshufb %xmm4,%xmm2");
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@ -2646,7 +2646,7 @@ void raid_recov2_ssse3(unsigned level, const int* d, const int* c, unsigned char
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asm volatile("movdqa %0,%%xmm3" : : "m" (gfmulpshufb[V[1]][1][0]));
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asm volatile("movdqa %xmm1,%xmm4");
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asm volatile("movdqa %xmm1,%xmm5");
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asm volatile("psraw $4,%xmm5");
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asm volatile("psrlw $4,%xmm5");
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asm volatile("pand %xmm7,%xmm4");
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asm volatile("pand %xmm7,%xmm5");
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asm volatile("pshufb %xmm4,%xmm2");
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@ -2662,7 +2662,7 @@ void raid_recov2_ssse3(unsigned level, const int* d, const int* c, unsigned char
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asm volatile("movdqa %0,%%xmm3" : : "m" (gfmulpshufb[V[2]][1][0]));
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asm volatile("movdqa %xmm0,%xmm4");
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asm volatile("movdqa %xmm0,%xmm5");
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asm volatile("psraw $4,%xmm5");
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asm volatile("psrlw $4,%xmm5");
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asm volatile("pand %xmm7,%xmm4");
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asm volatile("pand %xmm7,%xmm5");
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asm volatile("pshufb %xmm4,%xmm2");
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@ -2674,7 +2674,7 @@ void raid_recov2_ssse3(unsigned level, const int* d, const int* c, unsigned char
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asm volatile("movdqa %0,%%xmm3" : : "m" (gfmulpshufb[V[3]][1][0]));
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asm volatile("movdqa %xmm1,%xmm4");
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asm volatile("movdqa %xmm1,%xmm5");
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asm volatile("psraw $4,%xmm5");
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asm volatile("psrlw $4,%xmm5");
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asm volatile("pand %xmm7,%xmm4");
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asm volatile("pand %xmm7,%xmm5");
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asm volatile("pshufb %xmm4,%xmm2");
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@ -2745,7 +2745,7 @@ void raid_recovX_ssse3(unsigned level, const int* d, const int* c, unsigned char
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asm volatile("movdqa %0,%%xmm3" : : "m" (gfmulpshufb[m][1][0]));
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asm volatile("movdqa %0,%%xmm4" : : "m" (PD[k][0]));
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asm volatile("movdqa %xmm4,%xmm5");
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asm volatile("psraw $4,%xmm5");
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asm volatile("psrlw $4,%xmm5");
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asm volatile("pand %xmm7,%xmm4");
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asm volatile("pand %xmm7,%xmm5");
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asm volatile("pshufb %xmm4,%xmm2");
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