mirror of
https://github.com/amadvance/snapraid.git
synced 2026-10-26 02:49:02 -04:00
Use a more generic approach to align the stack
This is independent of the compiler used.
This commit is contained in:
Andrea Mazzoleni
parent
a424772122
commit
b0d2368cce
2 changed files with 32 additions and 26 deletions
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@ -73,20 +73,33 @@
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#include <stdlib.h>
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#include <string.h>
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#ifndef BUG_ON
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/*
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* Inverse assert.
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*/
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#define BUG_ON(a) assert(!(a))
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#endif
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/*
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* Forced inline.
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*/
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#ifndef __always_inline
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#define __always_inline inline __attribute__((always_inline))
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#endif
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/*
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* Forced alignment.
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*/
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#ifndef __aligned
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#define __aligned(a) __attribute__((aligned(a)))
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#endif
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/*
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* Includes the headers.
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* Align a pointer at the specified size.
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*/
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#define __align_ptr(ptr, size) \
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(void*)((uintptr_t)(((uint8_t*)ptr) + size - 1) & ~(uintptr_t)(size - 1))
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/*
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* Includes the main interface header.
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*/
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#include "raid.h"
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39
raid/x86.c
39
raid/x86.c
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@ -1119,10 +1119,6 @@ void raid_gen4_avx2ext(int nd, size_t size, void **vv)
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/*
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* GEN5 (penta parity with Cauchy matrix) SSSE3 implementation
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*/
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#ifdef _WIN32
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/* ensures that stack is aligned at 16 bytes because we allocate SSE registers in it */
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__attribute__((force_align_arg_pointer))
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#endif
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void raid_gen5_ssse3(int nd, size_t size, void **vv)
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{
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uint8_t **v = (uint8_t **)vv;
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@ -1133,7 +1129,8 @@ void raid_gen5_ssse3(int nd, size_t size, void **vv)
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uint8_t *t;
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int d, l;
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size_t i;
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uint8_t p0[16] __aligned(16);
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uint8_t buffer[16+16];
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uint8_t* p0 = __align_ptr(buffer, 16);
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l = nd - 1;
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p = v[nd];
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@ -1522,10 +1519,6 @@ void raid_gen5_avx2ext(int nd, size_t size, void **vv)
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/*
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* GEN6 (hexa parity with Cauchy matrix) SSSE3 implementation
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*/
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#ifdef _WIN32
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/* ensures that stack is aligned at 16 bytes because we allocate SSE registers in it */
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__attribute__((force_align_arg_pointer))
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#endif
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void raid_gen6_ssse3(int nd, size_t size, void **vv)
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{
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uint8_t **v = (uint8_t **)vv;
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@ -1537,8 +1530,8 @@ void raid_gen6_ssse3(int nd, size_t size, void **vv)
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uint8_t *u;
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int d, l;
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size_t i;
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uint8_t p0[16] __aligned(16);
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uint8_t q0[16] __aligned(16);
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uint8_t buffer[2*16+16];
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uint8_t* p0 = __align_ptr(buffer, 16);
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l = nd - 1;
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p = v[nd];
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@ -1563,7 +1556,7 @@ void raid_gen6_ssse3(int nd, size_t size, void **vv)
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asm volatile ("movdqa %0,%%xmm4" : : "m" (v[l][i]));
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asm volatile ("movdqa %%xmm4,%0" : "=m" (p0[0]));
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asm volatile ("movdqa %%xmm4,%0" : "=m" (q0[0]));
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asm volatile ("movdqa %%xmm4,%0" : "=m" (p0[16]));
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asm volatile ("movdqa %0,%%xmm7" : : "m" (gfconst16.low4[0]));
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asm volatile ("movdqa %xmm4,%xmm5");
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@ -1598,7 +1591,7 @@ void raid_gen6_ssse3(int nd, size_t size, void **vv)
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/* intermediate disks */
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for (d = l - 1; d > 0; --d) {
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asm volatile ("movdqa %0,%%xmm5" : : "m" (p0[0]));
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asm volatile ("movdqa %0,%%xmm6" : : "m" (q0[0]));
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asm volatile ("movdqa %0,%%xmm6" : : "m" (p0[16]));
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asm volatile ("movdqa %0,%%xmm7" : : "m" (gfconst16.poly[0]));
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asm volatile ("pxor %xmm4,%xmm4");
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@ -1612,7 +1605,7 @@ void raid_gen6_ssse3(int nd, size_t size, void **vv)
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asm volatile ("pxor %xmm4,%xmm5");
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asm volatile ("pxor %xmm4,%xmm6");
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asm volatile ("movdqa %%xmm5,%0" : "=m" (p0[0]));
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asm volatile ("movdqa %%xmm6,%0" : "=m" (q0[0]));
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asm volatile ("movdqa %%xmm6,%0" : "=m" (p0[16]));
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asm volatile ("movdqa %0,%%xmm7" : : "m" (gfconst16.low4[0]));
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asm volatile ("movdqa %xmm4,%xmm5");
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@ -1651,7 +1644,7 @@ void raid_gen6_ssse3(int nd, size_t size, void **vv)
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/* first disk with all coefficients at 1 */
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asm volatile ("movdqa %0,%%xmm5" : : "m" (p0[0]));
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asm volatile ("movdqa %0,%%xmm6" : : "m" (q0[0]));
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asm volatile ("movdqa %0,%%xmm6" : : "m" (p0[16]));
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asm volatile ("movdqa %0,%%xmm7" : : "m" (gfconst16.poly[0]));
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asm volatile ("pxor %xmm4,%xmm4");
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@ -2154,6 +2147,8 @@ void raid_recX_ssse3(int nr, int *id, int *ip, int nd, size_t size, void **vv)
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uint8_t *pa[RAID_PARITY_MAX];
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uint8_t G[RAID_PARITY_MAX * RAID_PARITY_MAX];
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uint8_t V[RAID_PARITY_MAX * RAID_PARITY_MAX];
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uint8_t buffer[RAID_PARITY_MAX*16+16];
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uint8_t *PD = __align_ptr(buffer, 16);
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size_t i;
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int j, k;
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@ -2178,14 +2173,12 @@ void raid_recX_ssse3(int nr, int *id, int *ip, int nd, size_t size, void **vv)
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asm volatile ("movdqa %0,%%xmm7" : : "m" (gfconst16.low4[0]));
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for (i = 0; i < size; i += 16) {
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uint8_t PD[RAID_PARITY_MAX][16] __aligned(16);
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/* delta */
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for (j = 0; j < N; ++j) {
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asm volatile ("movdqa %0,%%xmm0" : : "m" (p[j][i]));
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asm volatile ("movdqa %0,%%xmm1" : : "m" (pa[j][i]));
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asm volatile ("pxor %xmm1,%xmm0");
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asm volatile ("movdqa %%xmm0,%0" : "=m" (PD[j][0]));
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asm volatile ("movdqa %%xmm0,%0" : "=m" (PD[j*16]));
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}
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/* reconstruct */
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@ -2198,7 +2191,7 @@ void raid_recX_ssse3(int nr, int *id, int *ip, int nd, size_t size, void **vv)
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asm volatile ("movdqa %0,%%xmm2" : : "m" (gfmulpshufb[m][0][0]));
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asm volatile ("movdqa %0,%%xmm3" : : "m" (gfmulpshufb[m][1][0]));
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asm volatile ("movdqa %0,%%xmm4" : : "m" (PD[k][0]));
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asm volatile ("movdqa %0,%%xmm4" : : "m" (PD[k*16]));
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asm volatile ("movdqa %xmm4,%xmm5");
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asm volatile ("psrlw $4,%xmm5");
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asm volatile ("pand %xmm7,%xmm4");
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@ -2384,6 +2377,8 @@ void raid_recX_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
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uint8_t *pa[RAID_PARITY_MAX];
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uint8_t G[RAID_PARITY_MAX * RAID_PARITY_MAX];
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uint8_t V[RAID_PARITY_MAX * RAID_PARITY_MAX];
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uint8_t buffer[RAID_PARITY_MAX*32+32];
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uint8_t *PD = __align_ptr(buffer, 32);
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size_t i;
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int j, k;
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@ -2408,14 +2403,12 @@ void raid_recX_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
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asm volatile ("vbroadcasti128 %0,%%ymm7" : : "m" (gfconst16.low4[0]));
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for (i = 0; i < size; i += 32) {
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uint8_t PD[RAID_PARITY_MAX][32] __aligned(32);
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/* delta */
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for (j = 0; j < N; ++j) {
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asm volatile ("vmovdqa %0,%%ymm0" : : "m" (p[j][i]));
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asm volatile ("vmovdqa %0,%%ymm1" : : "m" (pa[j][i]));
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asm volatile ("vpxor %ymm1,%ymm0,%ymm0");
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asm volatile ("vmovdqa %%ymm0,%0" : "=m" (PD[j][0]));
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asm volatile ("vmovdqa %%ymm0,%0" : "=m" (PD[j*32]));
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}
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/* reconstruct */
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@ -2428,7 +2421,7 @@ void raid_recX_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
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asm volatile ("vbroadcasti128 %0,%%ymm2" : : "m" (gfmulpshufb[m][0][0]));
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asm volatile ("vbroadcasti128 %0,%%ymm3" : : "m" (gfmulpshufb[m][1][0]));
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asm volatile ("vmovdqa %0,%%ymm4" : : "m" (PD[k][0]));
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asm volatile ("vmovdqa %0,%%ymm4" : : "m" (PD[k*32]));
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asm volatile ("vpsrlw $4,%ymm4,%ymm5");
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asm volatile ("vpand %ymm7,%ymm4,%ymm4");
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asm volatile ("vpand %ymm7,%ymm5,%ymm5");
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