From c192fe8982b3e4c8471ae33aad565d563cf47b28 Mon Sep 17 00:00:00 2001 From: Andrea Mazzoleni Date: Tue, 25 Aug 2026 09:58:53 +0200 Subject: [PATCH] Add compiler memory barriers to NEON and NEON32 end helpers --- raid/internal.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/raid/internal.h b/raid/internal.h index f34f376f..9501d0c5 100644 --- a/raid/internal.h +++ b/raid/internal.h @@ -520,6 +520,12 @@ static __always_inline void raid_neon_begin(void) static __always_inline void raid_neon_end(void) { + /* + * Compiler memory barrier to ensure memory operations are not + * reordered across the end of SIMD operations. + */ + asm volatile ("" : : : "memory"); + /* * Clobbers registers used in NEON asm operations. * @@ -551,6 +557,12 @@ static __always_inline void raid_neon32_begin(void) static __always_inline void raid_neon32_end(void) { + /* + * Compiler memory barrier to ensure memory operations are not + * reordered across the end of SIMD operations. + */ + asm volatile ("" : : : "memory"); + /* * Clobbers registers used in AArch32 NEON asm operations. *