diff --git a/raid/avx2.c b/raid/avx2.c
index 3271724b..d6673870 100644
--- a/raid/avx2.c
+++ b/raid/avx2.c
@@ -1064,74 +1064,6 @@ void raid_rec2_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
 
 	raid_avx_begin();
 
-#ifdef CONFIG_X86_64
-	asm volatile ("vpbroadcastb %0,%%ymm6" : : "m" (gfconst16.low4[0]));
-
-	/* the inverse matrix V[] is constant for the whole recovery. */
-	asm volatile ("vbroadcasti128 %0,%%ymm8" : : "m" (raid_gfmulpshufb[V[0]][0][0]));
-	asm volatile ("vbroadcasti128 %0,%%ymm9" : : "m" (raid_gfmulpshufb[V[0]][1][0]));
-	asm volatile ("vbroadcasti128 %0,%%ymm10" : : "m" (raid_gfmulpshufb[V[1]][0][0]));
-	asm volatile ("vbroadcasti128 %0,%%ymm11" : : "m" (raid_gfmulpshufb[V[1]][1][0]));
-	asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (raid_gfmulpshufb[V[2]][0][0]));
-	asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (raid_gfmulpshufb[V[2]][1][0]));
-	asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (raid_gfmulpshufb[V[3]][0][0]));
-	asm volatile ("vbroadcasti128 %0,%%ymm15" : : "m" (raid_gfmulpshufb[V[3]][1][0]));
-
-	for (i = 0; i < size; i += 32) {
-		/* d0 = p[0] ^ pa[0] */
-		asm volatile ("vmovdqa %0,%%ymm0" : : "m" (p[0][i]));
-		asm volatile ("vmovdqa %0,%%ymm4" : : "m" (pa[0][i]));
-		asm volatile ("vpxor %ymm4,%ymm0,%ymm0");
-
-		/* d1 = p[1] ^ pa[1] */
-		asm volatile ("vmovdqa %0,%%ymm1" : : "m" (p[1][i]));
-		asm volatile ("vmovdqa %0,%%ymm4" : : "m" (pa[1][i]));
-		asm volatile ("vpxor %ymm4,%ymm1,%ymm1");
-
-		/*
-		 * Split both deltas into low/high nibbles once.
-		 *
-		 * ymm0 = d0 low
-		 * ymm2 = d0 high
-		 * ymm1 = d1 low
-		 * ymm3 = d1 high
-		 */
-		asm volatile ("vpsrlw $4,%ymm0,%ymm2");
-		asm volatile ("vpsrlw $4,%ymm1,%ymm3");
-		asm volatile ("vpand %ymm6,%ymm0,%ymm0");
-		asm volatile ("vpand %ymm6,%ymm2,%ymm2");
-		asm volatile ("vpand %ymm6,%ymm1,%ymm1");
-		asm volatile ("vpand %ymm6,%ymm3,%ymm3");
-
-		/*
-		 * pa[0] = V[0] * d0 ^ V[1] * d1
-		 */
-		asm volatile ("vpshufb %ymm0,%ymm8,%ymm4");
-		asm volatile ("vpshufb %ymm2,%ymm9,%ymm5");
-		asm volatile ("vpxor %ymm5,%ymm4,%ymm4");
-
-		asm volatile ("vpshufb %ymm1,%ymm10,%ymm5");
-		asm volatile ("vpxor %ymm5,%ymm4,%ymm4");
-		asm volatile ("vpshufb %ymm3,%ymm11,%ymm5");
-		asm volatile ("vpxor %ymm5,%ymm4,%ymm4");
-
-		asm volatile ("vmovdqa %%ymm4,%0" : "=m" (pa[0][i]));
-
-		/*
-		 * pa[1] = V[2] * d0 ^ V[3] * d1
-		 */
-		asm volatile ("vpshufb %ymm0,%ymm12,%ymm4");
-		asm volatile ("vpshufb %ymm2,%ymm13,%ymm5");
-		asm volatile ("vpxor %ymm5,%ymm4,%ymm4");
-
-		asm volatile ("vpshufb %ymm1,%ymm14,%ymm5");
-		asm volatile ("vpxor %ymm5,%ymm4,%ymm4");
-		asm volatile ("vpshufb %ymm3,%ymm15,%ymm5");
-		asm volatile ("vpxor %ymm5,%ymm4,%ymm4");
-
-		asm volatile ("vmovdqa %%ymm4,%0" : "=m" (pa[1][i]));
-	}
-#else /* CONFIG_X86_32 */
 	asm volatile ("vpbroadcastb %0,%%ymm7" : : "m" (gfconst16.low4[0]));
 
 	for (i = 0; i < size; i += 32) {
@@ -1190,7 +1122,6 @@ void raid_rec2_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
 
 		asm volatile ("vmovdqa %%ymm6,%0" : "=m" (pa[1][i]));
 	}
-#endif
 
 	raid_avx_end();
 }
@@ -1227,158 +1158,6 @@ void raid_recX_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
 
 	raid_avx_begin();
 
-#ifdef CONFIG_X86_64
-	const uint8_t *T[RAID_PARITY_MAX * RAID_PARITY_MAX];
-
-	/* precompute shuffle table pointers */
-	for (j = 0; j < N * N; ++j)
-		T[j] = &raid_gfmulpshufb[V[j]][0][0];
-
-	asm volatile ("vpbroadcastb %0,%%ymm15" : : "m" (gfconst16.low4[0]));
-
-	for (i = 0; i < size; i += 32) {
-		/* delta */
-		asm volatile (
-			"movq 0(%2), %%rax\n"
-			"movq 0(%3), %%rbx\n"
-			"vmovdqa (%%rax, %1), %%ymm12\n"
-			"vmovdqa (%%rbx, %1), %%ymm13\n"
-			"vpxor %%ymm13, %%ymm12, %%ymm12\n"
-			"vpsrlw $4, %%ymm12, %%ymm1\n"
-			"vpand %%ymm15, %%ymm12, %%ymm0\n"
-			"vpand %%ymm15, %%ymm1, %%ymm1\n"
-			"cmpq $1, %0\n"
-			"jbe 1f\n"
-
-			"movq 8(%2), %%rax\n"
-			"movq 8(%3), %%rbx\n"
-			"vmovdqa (%%rax, %1), %%ymm12\n"
-			"vmovdqa (%%rbx, %1), %%ymm13\n"
-			"vpxor %%ymm13, %%ymm12, %%ymm12\n"
-			"vpsrlw $4, %%ymm12, %%ymm3\n"
-			"vpand %%ymm15, %%ymm12, %%ymm2\n"
-			"vpand %%ymm15, %%ymm3, %%ymm3\n"
-			"cmpq $2, %0\n"
-			"jbe 1f\n"
-
-			"movq 16(%2), %%rax\n"
-			"movq 16(%3), %%rbx\n"
-			"vmovdqa (%%rax, %1), %%ymm12\n"
-			"vmovdqa (%%rbx, %1), %%ymm13\n"
-			"vpxor %%ymm13, %%ymm12, %%ymm12\n"
-			"vpsrlw $4, %%ymm12, %%ymm5\n"
-			"vpand %%ymm15, %%ymm12, %%ymm4\n"
-			"vpand %%ymm15, %%ymm5, %%ymm5\n"
-			"cmpq $3, %0\n"
-			"jbe 1f\n"
-
-			"movq 24(%2), %%rax\n"
-			"movq 24(%3), %%rbx\n"
-			"vmovdqa (%%rax, %1), %%ymm12\n"
-			"vmovdqa (%%rbx, %1), %%ymm13\n"
-			"vpxor %%ymm13, %%ymm12, %%ymm12\n"
-			"vpsrlw $4, %%ymm12, %%ymm7\n"
-			"vpand %%ymm15, %%ymm12, %%ymm6\n"
-			"vpand %%ymm15, %%ymm7, %%ymm7\n"
-			"cmpq $4, %0\n"
-			"jbe 1f\n"
-
-			"movq 32(%2), %%rax\n"
-			"movq 32(%3), %%rbx\n"
-			"vmovdqa (%%rax, %1), %%ymm12\n"
-			"vmovdqa (%%rbx, %1), %%ymm13\n"
-			"vpxor %%ymm13, %%ymm12, %%ymm12\n"
-			"vpsrlw $4, %%ymm12, %%ymm9\n"
-			"vpand %%ymm15, %%ymm12, %%ymm8\n"
-			"vpand %%ymm15, %%ymm9, %%ymm9\n"
-			"cmpq $5, %0\n"
-			"jbe 1f\n"
-
-			"movq 40(%2), %%rax\n"
-			"movq 40(%3), %%rbx\n"
-			"vmovdqa (%%rax, %1), %%ymm12\n"
-			"vmovdqa (%%rbx, %1), %%ymm13\n"
-			"vpxor %%ymm13, %%ymm12, %%ymm12\n"
-			"vpsrlw $4, %%ymm12, %%ymm11\n"
-			"vpand %%ymm15, %%ymm12, %%ymm10\n"
-			"vpand %%ymm15, %%ymm11, %%ymm11\n"
-
-			"1:\n"
-			:
-			: "r" ((uint64_t)N), "r" (i), "r" (p), "r" (pa)
-			: "rax", "rbx", "cc", "memory"
-		);
-
-		/* reconstruct */
-		for (j = 0; j < N; ++j) {
-			asm volatile (
-				"movq 0(%2), %%rcx\n"
-				"vbroadcasti128 0(%%rcx), %%ymm13\n"
-				"vbroadcasti128 16(%%rcx), %%ymm14\n"
-				"vpshufb %%ymm0, %%ymm13, %%ymm13\n"
-				"vpshufb %%ymm1, %%ymm14, %%ymm14\n"
-				"cmpq $1, %0\n"
-				"jbe 1f\n"
-
-				"movq 8(%2), %%rcx\n"
-				"vbroadcasti128 0(%%rcx), %%ymm12\n"
-				"vpshufb %%ymm2, %%ymm12, %%ymm12\n"
-				"vpxor %%ymm12, %%ymm13, %%ymm13\n"
-				"vbroadcasti128 16(%%rcx), %%ymm12\n"
-				"vpshufb %%ymm3, %%ymm12, %%ymm12\n"
-				"vpxor %%ymm12, %%ymm14, %%ymm14\n"
-				"cmpq $2, %0\n"
-				"jbe 1f\n"
-
-				"movq 16(%2), %%rcx\n"
-				"vbroadcasti128 0(%%rcx), %%ymm12\n"
-				"vpshufb %%ymm4, %%ymm12, %%ymm12\n"
-				"vpxor %%ymm12, %%ymm13, %%ymm13\n"
-				"vbroadcasti128 16(%%rcx), %%ymm12\n"
-				"vpshufb %%ymm5, %%ymm12, %%ymm12\n"
-				"vpxor %%ymm12, %%ymm14, %%ymm14\n"
-				"cmpq $3, %0\n"
-				"jbe 1f\n"
-
-				"movq 24(%2), %%rcx\n"
-				"vbroadcasti128 0(%%rcx), %%ymm12\n"
-				"vpshufb %%ymm6, %%ymm12, %%ymm12\n"
-				"vpxor %%ymm12, %%ymm13, %%ymm13\n"
-				"vbroadcasti128 16(%%rcx), %%ymm12\n"
-				"vpshufb %%ymm7, %%ymm12, %%ymm12\n"
-				"vpxor %%ymm12, %%ymm14, %%ymm14\n"
-				"cmpq $4, %0\n"
-				"jbe 1f\n"
-
-				"movq 32(%2), %%rcx\n"
-				"vbroadcasti128 0(%%rcx), %%ymm12\n"
-				"vpshufb %%ymm8, %%ymm12, %%ymm12\n"
-				"vpxor %%ymm12, %%ymm13, %%ymm13\n"
-				"vbroadcasti128 16(%%rcx), %%ymm12\n"
-				"vpshufb %%ymm9, %%ymm12, %%ymm12\n"
-				"vpxor %%ymm12, %%ymm14, %%ymm14\n"
-				"cmpq $5, %0\n"
-				"jbe 1f\n"
-
-				"movq 40(%2), %%rcx\n"
-				"vbroadcasti128 0(%%rcx), %%ymm12\n"
-				"vpshufb %%ymm10, %%ymm12, %%ymm12\n"
-				"vpxor %%ymm12, %%ymm13, %%ymm13\n"
-				"vbroadcasti128 16(%%rcx), %%ymm12\n"
-				"vpshufb %%ymm11, %%ymm12, %%ymm12\n"
-				"vpxor %%ymm12, %%ymm14, %%ymm14\n"
-
-				"1:\n"
-				"vpxor %%ymm14, %%ymm13, %%ymm13\n"
-				"movq %3, %%rax\n"
-				"vmovdqa %%ymm13, (%%rax, %1)\n"
-				:
-				: "r" ((uint64_t)N), "r" (i), "r" (&T[j * N]), "r" (pa[j])
-				: "rax", "rcx", "cc", "memory"
-			);
-		}
-	}
-#else /* CONFIG_X86_32 */
 	uint8_t buffer_low[RAID_PARITY_MAX * 32 + 32];
 	uint8_t buffer_high[RAID_PARITY_MAX * 32 + 32];
 	uint8_t *pd_low = __align_ptr(buffer_low, 32);
@@ -1406,8 +1185,8 @@ void raid_recX_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
 		/* reconstruct */
 		for (j = 0; j < N; ++j) {
 			asm volatile (
-				"vpxor %%ymm0, %%ymm0, %%ymm0\n"
-				"vpxor %%ymm1, %%ymm1, %%ymm1\n"
+				"vpxor %ymm0, %ymm0, %ymm0\n"
+				"vpxor %ymm1, %ymm1, %ymm1\n"
 			);
 
 			for (k = 0; k < N; ++k) {
@@ -1435,11 +1214,332 @@ void raid_recX_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
 			);
 		}
 	}
-#endif
 
 	raid_avx_end();
 }
 
+#ifdef CONFIG_X86_64
+/*
+ * RAID recovering AVX2 implementation.
+ *
+ * Compute only the selected syndromes, keeping them in registers.
+ * This avoids raid_delta_gen(), temporary syndrome buffers, and the
+ * generation of unused parity rows.
+ */
+static __always_inline void raid_recX_avx2ext(int nr, int *id, int *ip, int nd, size_t size, void **vv)
+{
+	uint8_t **v = (uint8_t **)vv;
+	uint8_t *p[RAID_PARITY_MAX];
+	uint8_t *pa[RAID_PARITY_MAX];
+	uint8_t *src[RAID_DATA_MAX];
+	uint8_t G[RAID_PARITY_MAX * RAID_PARITY_MAX];
+	uint8_t V[RAID_PARITY_MAX * RAID_PARITY_MAX];
+	const uint8_t *S[RAID_DATA_MAX][RAID_PARITY_MAX];
+	const uint8_t *R[RAID_PARITY_MAX][RAID_PARITY_MAX];
+	size_t i;
+	int d, j, k, s;
+	int ns;
+	int has_p;
+
+	/* setup the coefficients matrix */
+	for (j = 0; j < nr; ++j)
+		for (k = 0; k < nr; ++k)
+			G[j * nr + k] = A(ip[j], id[k]);
+
+	/* invert it to solve the system of linear equations */
+	raid_invert(G, V, nr);
+
+	/* setup selected parity and destination pointers */
+	for (j = 0; j < nr; ++j) {
+		p[j] = v[nd + ip[j]];
+		pa[j] = v[id[j]];
+	}
+
+	/* ip[] is ordered. If P is available, it is always ip[0] */
+	has_p = ip[0] == 0;
+
+	/*
+	 * Build the compact list of surviving data blocks and precompute
+	 * the multiplication table pointers for each selected syndrome.
+	 */
+	ns = 0;
+	k = 0;
+
+	for (d = 0; d < nd; ++d) {
+		if (k < nr && d == id[k]) {
+			++k;
+			continue;
+		}
+
+		src[ns] = v[d];
+
+		for (j = 0; j < nr; ++j)
+			S[ns][j] = &raid_gfmulpshufb[A(ip[j], d)][0][0];
+
+		++ns;
+	}
+
+	BUG_ON(k != nr);
+	BUG_ON(ns != nd - nr);
+
+	/* precompute inverse-matrix multiplication table pointers */
+	for (j = 0; j < nr; ++j)
+		for (k = 0; k < nr; ++k)
+			R[j][k] = &raid_gfmulpshufb[V[j * nr + k]][0][0];
+
+	raid_avx_begin();
+
+	asm volatile ("vpbroadcastb %0,%%ymm15" : : "m" (gfconst16.low4[0]));
+
+	for (i = 0; i < size; i += 32) {
+		/*
+		 * Start each syndrome with the corresponding stored parity.
+		 *
+		 * During syndrome computation:
+		 *
+		 *   ymm0   syndrome 0
+		 *   ymm2   syndrome 1
+		 *   ymm4   syndrome 2
+		 *   ymm6   syndrome 3
+		 *   ymm8   syndrome 4
+		 *   ymm10  syndrome 5
+		 *
+		 *   ymm12  source / source low nibble
+		 *   ymm13  source high nibble
+		 *   ymm14  multiplication table / temporary
+		 *   ymm15  low-nibble mask
+		 */
+		asm volatile ("vmovdqa %0,%%ymm0" : : "m" (p[0][i]));
+		asm volatile ("vmovdqa %0,%%ymm2" : : "m" (p[1][i]));
+
+		if (nr >= 3)
+			asm volatile ("vmovdqa %0,%%ymm4" : : "m" (p[2][i]));
+
+		if (nr >= 4)
+			asm volatile ("vmovdqa %0,%%ymm6" : : "m" (p[3][i]));
+
+		if (nr >= 5)
+			asm volatile ("vmovdqa %0,%%ymm8" : : "m" (p[4][i]));
+
+		if (nr >= 6)
+			asm volatile ("vmovdqa %0,%%ymm10" : : "m" (p[5][i]));
+
+		/*
+		 * Add all surviving data contributions.
+		 */
+		for (s = 0; s < ns; ++s) {
+			const uint8_t **t = S[s];
+
+			asm volatile ("vmovdqa %0,%%ymm12" : : "m" (src[s][i]));
+
+			/*
+			 * P has coefficient 1 for every data disk.
+			 *
+			 * Keep the simple XOR fast path when P is the
+			 * first selected parity. Otherwise syndrome 0
+			 * uses the normal vpshufb multiplication.
+			 */
+			if (has_p) {
+				asm volatile ("vpxor %ymm12,%ymm0,%ymm0");
+
+				asm volatile ("vpsrlw $4,%ymm12,%ymm13");
+				asm volatile ("vpand %ymm15,%ymm12,%ymm12");
+				asm volatile ("vpand %ymm15,%ymm13,%ymm13");
+			} else {
+				asm volatile ("vpsrlw $4,%ymm12,%ymm13");
+				asm volatile ("vpand %ymm15,%ymm12,%ymm12");
+				asm volatile ("vpand %ymm15,%ymm13,%ymm13");
+
+				asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[0][0]));
+				asm volatile ("vpshufb %ymm12,%ymm14,%ymm14");
+				asm volatile ("vpxor %ymm14,%ymm0,%ymm0");
+
+				asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[0][16]));
+				asm volatile ("vpshufb %ymm13,%ymm14,%ymm14");
+				asm volatile ("vpxor %ymm14,%ymm0,%ymm0");
+			}
+
+			asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[1][0]));
+			asm volatile ("vpshufb %ymm12,%ymm14,%ymm14");
+			asm volatile ("vpxor %ymm14,%ymm2,%ymm2");
+			asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[1][16]));
+			asm volatile ("vpshufb %ymm13,%ymm14,%ymm14");
+			asm volatile ("vpxor %ymm14,%ymm2,%ymm2");
+
+			if (nr >= 3) {
+				asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[2][0]));
+				asm volatile ("vpshufb %ymm12,%ymm14,%ymm14");
+				asm volatile ("vpxor %ymm14,%ymm4,%ymm4");
+				asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[2][16]));
+				asm volatile ("vpshufb %ymm13,%ymm14,%ymm14");
+				asm volatile ("vpxor %ymm14,%ymm4,%ymm4");
+			}
+
+			if (nr >= 4) {
+				asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[3][0]));
+				asm volatile ("vpshufb %ymm12,%ymm14,%ymm14");
+				asm volatile ("vpxor %ymm14,%ymm6,%ymm6");
+				asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[3][16]));
+				asm volatile ("vpshufb %ymm13,%ymm14,%ymm14");
+				asm volatile ("vpxor %ymm14,%ymm6,%ymm6");
+			}
+
+			if (nr >= 5) {
+				asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[4][0]));
+				asm volatile ("vpshufb %ymm12,%ymm14,%ymm14");
+				asm volatile ("vpxor %ymm14,%ymm8,%ymm8");
+				asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[4][16]));
+				asm volatile ("vpshufb %ymm13,%ymm14,%ymm14");
+				asm volatile ("vpxor %ymm14,%ymm8,%ymm8");
+			}
+
+			if (nr >= 6) {
+				asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[5][0]));
+				asm volatile ("vpshufb %ymm12,%ymm14,%ymm14");
+				asm volatile ("vpxor %ymm14,%ymm10,%ymm10");
+				asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[5][16]));
+				asm volatile ("vpshufb %ymm13,%ymm14,%ymm14");
+				asm volatile ("vpxor %ymm14,%ymm10,%ymm10");
+			}
+		}
+
+		/*
+		 * Split every completed syndrome once.
+		 *
+		 * After this:
+		 *
+		 *   ymm0 /ymm1   delta 0 low/high
+		 *   ymm2 /ymm3   delta 1 low/high
+		 *   ymm4 /ymm5   delta 2 low/high
+		 *   ymm6 /ymm7   delta 3 low/high
+		 *   ymm8 /ymm9   delta 4 low/high
+		 *   ymm10/ymm11  delta 5 low/high
+		 */
+		asm volatile ("vpsrlw $4,%ymm0,%ymm1");
+		asm volatile ("vpand %ymm15,%ymm0,%ymm0");
+		asm volatile ("vpand %ymm15,%ymm1,%ymm1");
+
+		asm volatile ("vpsrlw $4,%ymm2,%ymm3");
+		asm volatile ("vpand %ymm15,%ymm2,%ymm2");
+		asm volatile ("vpand %ymm15,%ymm3,%ymm3");
+
+		if (nr >= 3) {
+			asm volatile ("vpsrlw $4,%ymm4,%ymm5");
+			asm volatile ("vpand %ymm15,%ymm4,%ymm4");
+			asm volatile ("vpand %ymm15,%ymm5,%ymm5");
+		}
+
+		if (nr >= 4) {
+			asm volatile ("vpsrlw $4,%ymm6,%ymm7");
+			asm volatile ("vpand %ymm15,%ymm6,%ymm6");
+			asm volatile ("vpand %ymm15,%ymm7,%ymm7");
+		}
+
+		if (nr >= 5) {
+			asm volatile ("vpsrlw $4,%ymm8,%ymm9");
+			asm volatile ("vpand %ymm15,%ymm8,%ymm8");
+			asm volatile ("vpand %ymm15,%ymm9,%ymm9");
+		}
+
+		if (nr >= 6) {
+			asm volatile ("vpsrlw $4,%ymm10,%ymm11");
+			asm volatile ("vpand %ymm15,%ymm10,%ymm10");
+			asm volatile ("vpand %ymm15,%ymm11,%ymm11");
+		}
+
+		/* reconstruct every missing data block */
+		for (j = 0; j < nr; ++j) {
+			const uint8_t **t = R[j];
+
+			/* first coefficient initializes the low/high accumulators */
+			asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (t[0][0]));
+			asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (t[0][16]));
+			asm volatile ("vpshufb %ymm0,%ymm12,%ymm12");
+			asm volatile ("vpshufb %ymm1,%ymm13,%ymm13");
+
+			asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[1][0]));
+			asm volatile ("vpshufb %ymm2,%ymm14,%ymm14");
+			asm volatile ("vpxor %ymm14,%ymm12,%ymm12");
+			asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[1][16]));
+			asm volatile ("vpshufb %ymm3,%ymm14,%ymm14");
+			asm volatile ("vpxor %ymm14,%ymm13,%ymm13");
+
+			if (nr >= 3) {
+				asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[2][0]));
+				asm volatile ("vpshufb %ymm4,%ymm14,%ymm14");
+				asm volatile ("vpxor %ymm14,%ymm12,%ymm12");
+				asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[2][16]));
+				asm volatile ("vpshufb %ymm5,%ymm14,%ymm14");
+				asm volatile ("vpxor %ymm14,%ymm13,%ymm13");
+			}
+
+			if (nr >= 4) {
+				asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[3][0]));
+				asm volatile ("vpshufb %ymm6,%ymm14,%ymm14");
+				asm volatile ("vpxor %ymm14,%ymm12,%ymm12");
+				asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[3][16]));
+				asm volatile ("vpshufb %ymm7,%ymm14,%ymm14");
+				asm volatile ("vpxor %ymm14,%ymm13,%ymm13");
+			}
+
+			if (nr >= 5) {
+				asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[4][0]));
+				asm volatile ("vpshufb %ymm8,%ymm14,%ymm14");
+				asm volatile ("vpxor %ymm14,%ymm12,%ymm12");
+				asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[4][16]));
+				asm volatile ("vpshufb %ymm9,%ymm14,%ymm14");
+				asm volatile ("vpxor %ymm14,%ymm13,%ymm13");
+			}
+
+			if (nr >= 6) {
+				asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[5][0]));
+				asm volatile ("vpshufb %ymm10,%ymm14,%ymm14");
+				asm volatile ("vpxor %ymm14,%ymm12,%ymm12");
+
+				asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[5][16]));
+				asm volatile ("vpshufb %ymm11,%ymm14,%ymm14");
+				asm volatile ("vpxor %ymm14,%ymm13,%ymm13");
+			}
+
+			asm volatile ("vpxor %ymm13,%ymm12,%ymm12");
+			asm volatile ("vmovdqa %%ymm12,%0" : "=m" (pa[j][i]));
+		}
+	}
+
+	raid_avx_end();
+}
+
+static void raid_rec2_avx2ext(int nr, int *id, int *ip, int nd, size_t size, void **vv)
+{
+	BUG_ON(nr != 2);
+	raid_recX_avx2ext(2, id, ip, nd, size, vv);
+}
+
+static void raid_rec3_avx2ext(int nr, int *id, int *ip, int nd, size_t size, void **vv)
+{
+	BUG_ON(nr != 3);
+	raid_recX_avx2ext(3, id, ip, nd, size, vv);
+}
+
+static void raid_rec4_avx2ext(int nr, int *id, int *ip, int nd, size_t size, void **vv)
+{
+	BUG_ON(nr != 4);
+	raid_recX_avx2ext(4, id, ip, nd, size, vv);
+}
+
+static void raid_rec5_avx2ext(int nr, int *id, int *ip, int nd, size_t size, void **vv)
+{
+	BUG_ON(nr != 5);
+	raid_recX_avx2ext(5, id, ip, nd, size, vv);
+}
+
+static void raid_rec6_avx2ext(int nr, int *id, int *ip, int nd, size_t size, void **vv)
+{
+	BUG_ON(nr != 6);
+	raid_recX_avx2ext(6, id, ip, nd, size, vv);
+}
+#endif
+
 void raid_register_avx2(void)
 {
 	if (raid_cpu_has_avx2()) {
@@ -1466,6 +1566,13 @@ void raid_register_avx2(void)
 		raid_rec_register(RAID_ALGO_CAUCHY_PAR4, "avx2", raid_recX_avx2, RAID_POLY_ANY);
 		raid_rec_register(RAID_ALGO_CAUCHY_PAR5, "avx2", raid_recX_avx2, RAID_POLY_ANY);
 		raid_rec_register(RAID_ALGO_CAUCHY_PAR6, "avx2", raid_recX_avx2, RAID_POLY_ANY);
+#ifdef CONFIG_X86_64
+		raid_rec_register(RAID_ALGO_CAUCHY_PAR3, "avx2e", raid_rec2_avx2ext, RAID_POLY_ANY);
+		raid_rec_register(RAID_ALGO_CAUCHY_PAR3, "avx2e", raid_rec3_avx2ext, RAID_POLY_ANY);
+		raid_rec_register(RAID_ALGO_CAUCHY_PAR4, "avx2e", raid_rec4_avx2ext, RAID_POLY_ANY);
+		raid_rec_register(RAID_ALGO_CAUCHY_PAR5, "avx2e", raid_rec5_avx2ext, RAID_POLY_ANY);
+		raid_rec_register(RAID_ALGO_CAUCHY_PAR6, "avx2e", raid_rec6_avx2ext, RAID_POLY_ANY);
+#endif
 	}
 }
 #endif