From cbddaa108d83e71975f3964b7087514af031d314 Mon Sep 17 00:00:00 2001 From: Andrea Mazzoleni Date: Tue, 31 Dec 2013 15:46:24 +0100 Subject: [PATCH] Refactors even more and add an additional selftest. --- mingw.h | 2 +- raid/gf.h | 4 +- raid/int.c | 32 ++++----- raid/internal.h | 7 +- raid/module.c | 178 ++++++++++++++++++++++++++++++++++++++++++++++++ raid/raid.c | 10 +-- raid/raid.h | 9 ++- raid/test.c | 138 ++++++++++++++++++------------------- raid/x86.c | 162 ++++++++++++++++++++++--------------------- selftest.c | 4 ++ speed.c | 147 +++++++++++++++++++-------------------- state.c | 4 +- util.c | 4 +- 13 files changed, 443 insertions(+), 258 deletions(-) diff --git a/mingw.h b/mingw.h index 3ff246c8..351e4327 100644 --- a/mingw.h +++ b/mingw.h @@ -25,7 +25,7 @@ /** * Assume to always have CRC32B if running in x86 */ -#if defined(__i386__) || defined(__x86_64__) +#ifdef CONFIG_X86 #define HAVE_CRC32B 1 #endif diff --git a/raid/gf.h b/raid/gf.h index 63ee1179..a9356478 100644 --- a/raid/gf.h +++ b/raid/gf.h @@ -58,14 +58,12 @@ static __always_inline const uint8_t *table(uint8_t v) return gfmul[v]; } -extern const uint8_t (*raid_gen)[256]; - /* * Gets the generator matrix coefficient for parity 'p' and disk 'd'. */ static __always_inline uint8_t A(int p, int d) { - return raid_gen[p][d]; + return gfgen[p][d]; } /* diff --git a/raid/int.c b/raid/int.c index 10d7ff5f..495cb145 100644 --- a/raid/int.c +++ b/raid/int.c @@ -34,8 +34,6 @@ void raid_par1_int32(int nd, size_t size, void **vv) for (i = 0; i < size; i += 8) { p0 = v_32(v[l][i]); p1 = v_32(v[l][i+4]); - /* accessing disks in backward order because the buffers */ - /* are also in backward order */ for (d = l-1; d >= 0; --d) { p0 ^= v_32(v[d][i]); p1 ^= v_32(v[d][i+4]); @@ -64,8 +62,6 @@ void raid_par1_int64(int nd, size_t size, void **vv) for (i = 0; i < size; i += 16) { p0 = v_64(v[l][i]); p1 = v_64(v[l][i+8]); - /* accessing disks in backward order because the buffers */ - /* are also in backward order */ for (d = l-1; d >= 0; --d) { p0 ^= v_64(v[d][i]); p1 ^= v_64(v[d][i+8]); @@ -187,8 +183,8 @@ void raid_par3_int8(int nd, size_t size, void **vv) d0 = v_8(v[d][i]); p0 ^= d0; - q0 ^= gfmul[d0][gfcauchy[1][d]]; - r0 ^= gfmul[d0][gfcauchy[2][d]]; + q0 ^= gfmul[d0][gfgen[1][d]]; + r0 ^= gfmul[d0][gfgen[2][d]]; } /* first disk with all coefficients at 1 */ @@ -236,9 +232,9 @@ void raid_par4_int8(int nd, size_t size, void **vv) d0 = v_8(v[d][i]); p0 ^= d0; - q0 ^= gfmul[d0][gfcauchy[1][d]]; - r0 ^= gfmul[d0][gfcauchy[2][d]]; - s0 ^= gfmul[d0][gfcauchy[3][d]]; + q0 ^= gfmul[d0][gfgen[1][d]]; + r0 ^= gfmul[d0][gfgen[2][d]]; + s0 ^= gfmul[d0][gfgen[3][d]]; } /* first disk with all coefficients at 1 */ @@ -290,10 +286,10 @@ void raid_par5_int8(int nd, size_t size, void **vv) d0 = v_8(v[d][i]); p0 ^= d0; - q0 ^= gfmul[d0][gfcauchy[1][d]]; - r0 ^= gfmul[d0][gfcauchy[2][d]]; - s0 ^= gfmul[d0][gfcauchy[3][d]]; - t0 ^= gfmul[d0][gfcauchy[4][d]]; + q0 ^= gfmul[d0][gfgen[1][d]]; + r0 ^= gfmul[d0][gfgen[2][d]]; + s0 ^= gfmul[d0][gfgen[3][d]]; + t0 ^= gfmul[d0][gfgen[4][d]]; } /* first disk with all coefficients at 1 */ @@ -349,11 +345,11 @@ void raid_par6_int8(int nd, size_t size, void **vv) d0 = v_8(v[d][i]); p0 ^= d0; - q0 ^= gfmul[d0][gfcauchy[1][d]]; - r0 ^= gfmul[d0][gfcauchy[2][d]]; - s0 ^= gfmul[d0][gfcauchy[3][d]]; - t0 ^= gfmul[d0][gfcauchy[4][d]]; - u0 ^= gfmul[d0][gfcauchy[5][d]]; + q0 ^= gfmul[d0][gfgen[1][d]]; + r0 ^= gfmul[d0][gfgen[2][d]]; + s0 ^= gfmul[d0][gfgen[3][d]]; + t0 ^= gfmul[d0][gfgen[4][d]]; + u0 ^= gfmul[d0][gfgen[5][d]]; } /* first disk with all coefficients at 1 */ diff --git a/raid/internal.h b/raid/internal.h index a7faa0ba..8084d0e4 100644 --- a/raid/internal.h +++ b/raid/internal.h @@ -31,6 +31,8 @@ * * These are intented to provide access for testing. */ +int raid_selftest(void); +void raid_par_ref(int nd, int np, size_t size, void **vv); void raid_invert(uint8_t *M, uint8_t *V, int n); void raid_delta_gen(int nr, const int *id, const int *ip, int nd, size_t size, void **v); void raid_rec1_par1(const int *id, int nd, size_t size, void **v); @@ -99,14 +101,15 @@ extern const uint8_t raid_gfvandermonde[3][256] __aligned(256); extern const uint8_t raid_gfcauchy[6][256] __aligned(256); extern const uint8_t raid_gfcauchypshufb[251][4][2][16] __aligned(256); extern const uint8_t raid_gfmulpshufb[256][2][16] __aligned(256); +extern const uint8_t (*raid_gfgen)[256]; #define gfmul raid_gfmul #define gfexp raid_gfexp #define gfinv raid_gfinv #define gfvandermonde raid_gfvandermonde #define gfcauchy raid_gfcauchy -#define gfcauchypshufb raid_gfcauchypshufb +#define gfgenpshufb raid_gfcauchypshufb #define gfmulpshufb raid_gfmulpshufb - +#define gfgen raid_gfgen /* * Assembler blocks. */ diff --git a/raid/module.c b/raid/module.c index 5a19f195..25b709c6 100644 --- a/raid/module.c +++ b/raid/module.c @@ -13,6 +13,7 @@ */ #include "internal.h" +#include "memory.h" #include "cpu.h" void raid_init(void) @@ -81,6 +82,183 @@ void raid_init(void) raid_mode(RAID_MODE_CAUCHY); } +/* + * Refence parity computation. + */ +void raid_par_ref(int nd, int np, size_t size, void **vv) +{ + uint8_t **v = (uint8_t **)vv; + size_t i; + + for (i = 0; i < size; ++i) { + uint8_t p[RAID_PARITY_MAX]; + int j, d; + + for (j = 0; j < np; ++j) + p[j] = 0; + + for (d = 0; d < nd; ++d) { + uint8_t b = v[d][i]; + + for (j = 0; j < np; ++j) + p[j] ^= gfmul[b][gfgen[j][d]]; + } + + for (j = 0; j < np; ++j) + v[nd + j][i] = p[j]; + } +} + +/** + * Number of data disks to test. + */ +#define TEST_DATA_MAX 8 + +/* + * Parity generation test. + */ +static int raid_test_par(int nd, int np, size_t size, void **v, void **ref) +{ + int i; + void *t[TEST_DATA_MAX + RAID_PARITY_MAX]; + + /* setup data */ + for (i = 0; i < nd; ++i) + t[i] = ref[i]; + + /* setup parity */ + for (i = 0; i < np; ++i) + t[nd+i] = v[nd+i]; + + raid_par(nd, np, size, t); + + /* compare parity */ + for (i = 0; i < np; ++i) + if (memcmp(t[nd+i], ref[nd+i], size) != 0) + return -1; + + return 0; +} + +/* + * Recovering test. + */ +static int raid_test_rec(int nrd, int *id, int nrp, int *ip, int nd, int np, size_t size, void **v, void **ref) +{ + int i, j; + void *t[TEST_DATA_MAX + RAID_PARITY_MAX]; + + /* setup data */ + for (i = 0, j = 0; i < nd; ++i) { + if (j < nrd && id[j] == i) { + t[i] = v[i]; + ++j; + } else { + t[i] = ref[i]; + } + } + + /* setup parity */ + for (i = 0, j = 0; i < np; ++i) { + if (j < nrp && ip[j] == i) { + t[nd+i] = v[nd+i]; + ++j; + } else { + t[nd+i] = ref[nd+i]; + } + } + + raid_rec(nrd, id, nrp, ip, nd, np, size, t); + + /* compare all data and parity */ + for (i = 0; i < nd+np; ++i) + if (t[i] != ref[i] && memcmp(t[i], ref[i], size) != 0) + return -1; + + return 0; +} + +/* + * Basic functionality self test. + */ +int raid_selftest(void) +{ + const int nd = TEST_DATA_MAX; + const int nv = nd + RAID_PARITY_MAX * 2 + 1; + const size_t size = 4096; + void *v_alloc; + void **v; + void *ref[nd + RAID_PARITY_MAX]; + int id[RAID_PARITY_MAX]; + int ip[RAID_PARITY_MAX]; + int i, np; + + /* ensure to have enough space for data */ + BUG_ON(TEST_DATA_MAX * size > 65536); + + v = raid_malloc_vector(nd, nv, size, &v_alloc); + if (!v) + return -1; + + memset(v[nv-1], 0, size); + raid_zero(v[nv-1]); + + /* use the multiplication table as data */ + for (i = 0; i < nd; ++i) + ref[i] = ((uint8_t *)gfmul) + size * i; + + /* setup reference parity */ + for (i = 0; i < RAID_PARITY_MAX; ++i) + ref[nd+i] = v[nd+RAID_PARITY_MAX+i]; + + /* compute reference parity */ + raid_par_ref(nd, RAID_PARITY_MAX, size, ref); + + /* test for each parity level */ + for (np = 1; np <= RAID_PARITY_MAX; ++np) { + int r; + + /* test parity generation */ + r = raid_test_par(nd, np, size, v, ref); + if (r != 0) + return r; + + /* test recovering with full broken data disks */ + for (i = 0; i < np; ++i) + id[i] = nd - np + i; + + r = raid_test_rec(np, id, 0, ip, nd, np, size, v, ref); + if (r != 0) + return r; + + /* test recovering with half broken data and ending parity */ + for (i = 0; i < np / 2; ++i) + id[i] = i; + + for (i = 0; i < (np + 1) / 2; ++i) + ip[i] = np - np / 2 + i; + + r = raid_test_rec(np / 2, id, np / 2, ip, nd, np, size, v, ref); + if (r != 0) + return r; + + /* test recovering with half broken data and leading parity */ + for (i = 0; i < np / 2; ++i) + id[i] = i; + + for (i = 0; i < (np + 1) / 2; ++i) + ip[i] = i; + + r = raid_test_rec(np / 2, id, np / 2, ip, nd, np, size, v, ref); + if (r != 0) + return r; + } + + free(v_alloc); + + return 0; +} + static struct raid_func { const char *name; void *p; diff --git a/raid/raid.c b/raid/raid.c index 7fa54300..7b25abd0 100644 --- a/raid/raid.c +++ b/raid/raid.c @@ -171,16 +171,16 @@ /** * Generator matrix currently used. */ -const uint8_t (*raid_gen)[256]; +const uint8_t (*raid_gfgen)[256]; void raid_mode(int mode) { if (mode == RAID_MODE_VANDERMONDE) { raid_par_ptr[2] = raid_parz_ptr; - raid_gen = gfvandermonde; + raid_gfgen = gfvandermonde; } else { raid_par_ptr[2] = raid_par3_ptr; - raid_gen = gfcauchy; + raid_gfgen = gfcauchy; } } @@ -412,7 +412,7 @@ void raid_rec(int nrd, const int *id, int nrp, int *ip, int nd, int np, size_t s /* setup the vector of parities to use */ for (i = 0, j = 0, k = 0; i < np; ++i) { - if (ip[j] == i) { + if (j < nrp && ip[j] == i) { /* this parity has to be recovered */ ++j; } else { @@ -451,7 +451,7 @@ void raid_rec_dataonly(int nr, const int *id, const int *ip, int nd, size_t size for (i = 0, j = 0; i < np; ++i) { p[i] = v[nd+i]; - if (ip[j] == i) { + if (j < nr && ip[j] == i) { /* this parity is used for recovering */ ++j; } else { diff --git a/raid/raid.h b/raid/raid.h index 3cbeeace..5c834750 100644 --- a/raid/raid.h +++ b/raid/raid.h @@ -21,7 +21,7 @@ * It requires SSSE3 to get good performance with triple or more * parities. * - * This is the default mode used by SnapRAID. + * This is the default mode set after calling raid_init(). */ #define RAID_MODE_CAUCHY 0 @@ -49,6 +49,13 @@ */ void raid_init(void); +/** + * Runs a basic functionality self test. + * + * It returns 0 on success. + */ +int raid_selftest(void); + /** * Sets the mode to use. One of RAID_MODE_*. * diff --git a/raid/test.c b/raid/test.c index b0404785..938a2f67 100644 --- a/raid/test.c +++ b/raid/test.c @@ -105,23 +105,22 @@ int raid_test_sort(void) int raid_test_rec(int mode, int nd, size_t size) { - void *buffer_alloc; - void **buffer; + void *v_alloc; + void **v; void **data; void **parity; void **test; void *data_save[RAID_PARITY_MAX]; void *parity_save[RAID_PARITY_MAX]; - void *zero; void *waste; - int buffermax; + int nv; int id[RAID_PARITY_MAX]; int ip[RAID_PARITY_MAX]; int i; int j; int nr; - void (*map[RAID_PARITY_MAX][4])(int nr, const int *id, const int *ip, int nd, size_t size, void **vbuf); - int mac[RAID_PARITY_MAX]; + void (*f[RAID_PARITY_MAX][4])(int nr, const int *id, const int *ip, int nd, size_t size, void **vbuf); + int nf[RAID_PARITY_MAX]; int np; raid_mode(mode); @@ -130,56 +129,55 @@ int raid_test_rec(int mode, int nd, size_t size) else np = 3; - buffermax = nd + np * 2 + 2; + nv = nd + np * 2 + 2; - buffer = raid_malloc_vector(nd, buffermax, size, &buffer_alloc); - if (!buffer) + v = raid_malloc_vector(nd, nv, size, &v_alloc); + if (!v) return -1; - data = buffer; - parity = buffer + nd; - test = buffer + nd + np; + data = v; + parity = v + nd; + test = v + nd + np; for (i = 0; i < np; ++i) parity_save[i] = parity[i]; - zero = buffer[buffermax-2]; - memset(zero, 0, size); - raid_zero(zero); + memset(v[nv-2], 0, size); + raid_zero(v[nv-2]); - waste = buffer[buffermax-1]; + waste = v[nv-1]; /* fill data disk with random */ - raid_mrand_vector(buffer, nd, size); + raid_mrand_vector(v, nd, size); /* setup recov functions */ for (i = 0; i < np; ++i) { - mac[i] = 0; + nf[i] = 0; if (i == 0) { - map[i][mac[i]++] = raid_rec1_int8; + f[i][nf[i]++] = raid_rec1_int8; #ifdef CONFIG_X86 if (raid_cpu_has_ssse3()) - map[i][mac[i]++] = raid_rec1_ssse3; + f[i][nf[i]++] = raid_rec1_ssse3; #endif } else if (i == 1) { - map[i][mac[i]++] = raid_rec2_int8; + f[i][nf[i]++] = raid_rec2_int8; #ifdef CONFIG_X86 if (raid_cpu_has_ssse3()) - map[i][mac[i]++] = raid_rec2_ssse3; + f[i][nf[i]++] = raid_rec2_ssse3; #endif } else { - map[i][mac[i]++] = raid_recX_int8; + f[i][nf[i]++] = raid_recX_int8; #ifdef CONFIG_X86 if (raid_cpu_has_ssse3()) - map[i][mac[i]++] = raid_recX_ssse3; + f[i][nf[i]++] = raid_recX_ssse3; #endif } } /* compute the parity */ - raid_par(nd, np, size, buffer); + raid_par_ref(nd, np, size, v); - /* set all the parity to the waste buffer */ + /* set all the parity to the waste v */ for (i = 0; i < np; ++i) parity[i] = waste; @@ -192,7 +190,7 @@ int raid_test_rec(int mode, int nd, size_t size) combination_first(nr, np, ip); do { /* for each recover function */ - for (j = 0; j < mac[nr-1]; ++j) { + for (j = 0; j < nf[nr-1]; ++j) { /* set */ for (i = 0; i < nr; ++i) { /* remove the missing data */ @@ -203,7 +201,7 @@ int raid_test_rec(int mode, int nd, size_t size) } /* recover */ - map[nr-1][j](nr, id, ip, nd, size, buffer); + f[nr-1][j](nr, id, ip, nd, size, v); /* check */ for (i = 0; i < nr; ++i) @@ -222,20 +220,20 @@ int raid_test_rec(int mode, int nd, size_t size) } while (combination_next(nr, nd, id)); } - free(buffer_alloc); - free(buffer); + free(v_alloc); + free(v); return 0; } int raid_test_par(int mode, int nd, size_t size) { - void *buffer_alloc; - void **buffer; - int buffermax; + void *v_alloc; + void **v; + int nv; int i, j; - void (*map[64])(int nd, size_t size, void **vbuf); - int mac; + void (*f[64])(int nd, size_t size, void **vbuf); + int nf; int np; raid_mode(mode); @@ -244,87 +242,87 @@ int raid_test_par(int mode, int nd, size_t size) else np = 3; - buffermax = nd + np * 2; + nv = nd + np * 2; - buffer = raid_malloc_vector(nd, buffermax, size, &buffer_alloc); - if (!buffer) + v = raid_malloc_vector(nd, nv, size, &v_alloc); + if (!v) return -1; /* fill with random */ - raid_mrand_vector(buffer, buffermax, size); + raid_mrand_vector(v, nv, size); /* compute the parity */ - raid_par(nd, np, size, buffer); + raid_par_ref(nd, np, size, v); /* copy in back buffers */ for (i = 0; i < np; ++i) - memcpy(buffer[nd + np + i], buffer[nd + i], size); + memcpy(v[nd + np + i], v[nd + i], size); /* load all the available functions */ - mac = 0; + nf = 0; - map[mac++] = raid_par1_int32; - map[mac++] = raid_par1_int64; - map[mac++] = raid_par2_int32; - map[mac++] = raid_par2_int64; + f[nf++] = raid_par1_int32; + f[nf++] = raid_par1_int64; + f[nf++] = raid_par2_int32; + f[nf++] = raid_par2_int64; #ifdef CONFIG_X86 if (raid_cpu_has_sse2()) { - map[mac++] = raid_par1_sse2; - map[mac++] = raid_par2_sse2; + f[nf++] = raid_par1_sse2; + f[nf++] = raid_par2_sse2; #ifdef CONFIG_X86_64 - map[mac++] = raid_par2_sse2ext; + f[nf++] = raid_par2_sse2ext; #endif } #endif if (mode == RAID_MODE_CAUCHY) { - map[mac++] = raid_par3_int8; - map[mac++] = raid_par4_int8; - map[mac++] = raid_par5_int8; - map[mac++] = raid_par6_int8; + f[nf++] = raid_par3_int8; + f[nf++] = raid_par4_int8; + f[nf++] = raid_par5_int8; + f[nf++] = raid_par6_int8; #ifdef CONFIG_X86 if (raid_cpu_has_ssse3()) { - map[mac++] = raid_par3_ssse3; - map[mac++] = raid_par4_ssse3; - map[mac++] = raid_par5_ssse3; - map[mac++] = raid_par6_ssse3; + f[nf++] = raid_par3_ssse3; + f[nf++] = raid_par4_ssse3; + f[nf++] = raid_par5_ssse3; + f[nf++] = raid_par6_ssse3; #ifdef CONFIG_X86_64 - map[mac++] = raid_par3_ssse3ext; - map[mac++] = raid_par4_ssse3ext; - map[mac++] = raid_par5_ssse3ext; - map[mac++] = raid_par6_ssse3ext; + f[nf++] = raid_par3_ssse3ext; + f[nf++] = raid_par4_ssse3ext; + f[nf++] = raid_par5_ssse3ext; + f[nf++] = raid_par6_ssse3ext; #endif } #endif } else { - map[mac++] = raid_parz_int32; - map[mac++] = raid_parz_int64; + f[nf++] = raid_parz_int32; + f[nf++] = raid_parz_int64; #ifdef CONFIG_X86 if (raid_cpu_has_sse2()) { - map[mac++] = raid_parz_sse2; + f[nf++] = raid_parz_sse2; #ifdef CONFIG_X86_64 - map[mac++] = raid_parz_sse2ext; + f[nf++] = raid_parz_sse2ext; #endif } #endif } /* check all the functions */ - for (j = 0; j < mac; ++j) { + for (j = 0; j < nf; ++j) { /* compute parity */ - map[j](nd, size, buffer); + f[j](nd, size, v); /* check it */ for (i = 0; i < np; ++i) - if (memcmp(buffer[nd + np + i], buffer[nd + i], size) != 0) + if (memcmp(v[nd + np + i], v[nd + i], size) != 0) return -1; } - free(buffer_alloc); - free(buffer); + free(v_alloc); + free(v); return 0; } diff --git a/raid/x86.c b/raid/x86.c index 2b87f38b..43a9dc7a 100644 --- a/raid/x86.c +++ b/raid/x86.c @@ -41,8 +41,6 @@ void raid_par1_sse2(int nd, size_t size, void **vv) asm volatile("movdqa %0,%%xmm1" : : "m" (v[l][i+16])); asm volatile("movdqa %0,%%xmm2" : : "m" (v[l][i+32])); asm volatile("movdqa %0,%%xmm3" : : "m" (v[l][i+48])); - /* accessing disks in backward order because the buffers */ - /* are also in backward order */ for (d = l-1; d >= 0; --d) { asm volatile("movdqa %0,%%xmm4" : : "m" (v[d][i])); asm volatile("movdqa %0,%%xmm5" : : "m" (v[d][i+16])); @@ -250,8 +248,8 @@ void raid_par3_ssse3(int nd, size_t size, void **vv) asm volatile("pand %xmm7,%xmm4"); asm volatile("pand %xmm7,%xmm5"); - asm volatile("movdqa %0,%%xmm2" : : "m" (gfcauchypshufb[l][0][0][0])); - asm volatile("movdqa %0,%%xmm6" : : "m" (gfcauchypshufb[l][0][1][0])); + asm volatile("movdqa %0,%%xmm2" : : "m" (gfgenpshufb[l][0][0][0])); + asm volatile("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[l][0][1][0])); asm volatile("pshufb %xmm4,%xmm2"); asm volatile("pshufb %xmm5,%xmm6"); asm volatile("pxor %xmm6,%xmm2"); @@ -274,10 +272,10 @@ void raid_par3_ssse3(int nd, size_t size, void **vv) asm volatile("pand %xmm7,%xmm4"); asm volatile("pand %xmm7,%xmm5"); - asm volatile("movdqa %0,%%xmm6" : : "m" (gfcauchypshufb[d][0][0][0])); + asm volatile("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][0][0][0])); asm volatile("pshufb %xmm4,%xmm6"); asm volatile("pxor %xmm6,%xmm2"); - asm volatile("movdqa %0,%%xmm6" : : "m" (gfcauchypshufb[d][0][1][0])); + asm volatile("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][0][1][0])); asm volatile("pshufb %xmm5,%xmm6"); asm volatile("pxor %xmm6,%xmm2"); } @@ -356,8 +354,8 @@ void raid_par3_ssse3ext(int nd, size_t size, void **vv) asm volatile("pand %xmm11,%xmm5"); asm volatile("pand %xmm11,%xmm13"); - asm volatile("movdqa %0,%%xmm2" : : "m" (gfcauchypshufb[l][0][0][0])); - asm volatile("movdqa %0,%%xmm7" : : "m" (gfcauchypshufb[l][0][1][0])); + asm volatile("movdqa %0,%%xmm2" : : "m" (gfgenpshufb[l][0][0][0])); + asm volatile("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[l][0][1][0])); asm volatile("movdqa %xmm2,%xmm10"); asm volatile("movdqa %xmm7,%xmm15"); asm volatile("pshufb %xmm4,%xmm2"); @@ -397,8 +395,8 @@ void raid_par3_ssse3ext(int nd, size_t size, void **vv) asm volatile("pand %xmm11,%xmm5"); asm volatile("pand %xmm11,%xmm13"); - asm volatile("movdqa %0,%%xmm6" : : "m" (gfcauchypshufb[d][0][0][0])); - asm volatile("movdqa %0,%%xmm7" : : "m" (gfcauchypshufb[d][0][1][0])); + asm volatile("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][0][0][0])); + asm volatile("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[d][0][1][0])); asm volatile("movdqa %xmm6,%xmm14"); asm volatile("movdqa %xmm7,%xmm15"); asm volatile("pshufb %xmm4,%xmm6"); @@ -488,14 +486,14 @@ void raid_par4_ssse3(int nd, size_t size, void **vv) asm volatile("pand %xmm7,%xmm4"); asm volatile("pand %xmm7,%xmm5"); - asm volatile("movdqa %0,%%xmm2" : : "m" (gfcauchypshufb[l][0][0][0])); - asm volatile("movdqa %0,%%xmm7" : : "m" (gfcauchypshufb[l][0][1][0])); + asm volatile("movdqa %0,%%xmm2" : : "m" (gfgenpshufb[l][0][0][0])); + asm volatile("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[l][0][1][0])); asm volatile("pshufb %xmm4,%xmm2"); asm volatile("pshufb %xmm5,%xmm7"); asm volatile("pxor %xmm7,%xmm2"); - asm volatile("movdqa %0,%%xmm3" : : "m" (gfcauchypshufb[l][1][0][0])); - asm volatile("movdqa %0,%%xmm7" : : "m" (gfcauchypshufb[l][1][1][0])); + asm volatile("movdqa %0,%%xmm3" : : "m" (gfgenpshufb[l][1][0][0])); + asm volatile("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[l][1][1][0])); asm volatile("pshufb %xmm4,%xmm3"); asm volatile("pshufb %xmm5,%xmm7"); asm volatile("pxor %xmm7,%xmm3"); @@ -521,15 +519,15 @@ void raid_par4_ssse3(int nd, size_t size, void **vv) asm volatile("pand %xmm7,%xmm4"); asm volatile("pand %xmm7,%xmm5"); - asm volatile("movdqa %0,%%xmm6" : : "m" (gfcauchypshufb[d][0][0][0])); - asm volatile("movdqa %0,%%xmm7" : : "m" (gfcauchypshufb[d][0][1][0])); + asm volatile("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][0][0][0])); + asm volatile("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[d][0][1][0])); asm volatile("pshufb %xmm4,%xmm6"); asm volatile("pshufb %xmm5,%xmm7"); asm volatile("pxor %xmm6,%xmm2"); asm volatile("pxor %xmm7,%xmm2"); - asm volatile("movdqa %0,%%xmm6" : : "m" (gfcauchypshufb[d][1][0][0])); - asm volatile("movdqa %0,%%xmm7" : : "m" (gfcauchypshufb[d][1][1][0])); + asm volatile("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][1][0][0])); + asm volatile("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[d][1][1][0])); asm volatile("pshufb %xmm4,%xmm6"); asm volatile("pshufb %xmm5,%xmm7"); asm volatile("pxor %xmm6,%xmm3"); @@ -613,8 +611,8 @@ void raid_par4_ssse3ext(int nd, size_t size, void **vv) asm volatile("pand %xmm15,%xmm5"); asm volatile("pand %xmm15,%xmm13"); - asm volatile("movdqa %0,%%xmm2" : : "m" (gfcauchypshufb[l][0][0][0])); - asm volatile("movdqa %0,%%xmm7" : : "m" (gfcauchypshufb[l][0][1][0])); + asm volatile("movdqa %0,%%xmm2" : : "m" (gfgenpshufb[l][0][0][0])); + asm volatile("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[l][0][1][0])); asm volatile("movdqa %xmm2,%xmm10"); asm volatile("movdqa %xmm7,%xmm15"); asm volatile("pshufb %xmm4,%xmm2"); @@ -624,8 +622,8 @@ void raid_par4_ssse3ext(int nd, size_t size, void **vv) asm volatile("pxor %xmm7,%xmm2"); asm volatile("pxor %xmm15,%xmm10"); - asm volatile("movdqa %0,%%xmm3" : : "m" (gfcauchypshufb[l][1][0][0])); - asm volatile("movdqa %0,%%xmm7" : : "m" (gfcauchypshufb[l][1][1][0])); + asm volatile("movdqa %0,%%xmm3" : : "m" (gfgenpshufb[l][1][0][0])); + asm volatile("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[l][1][1][0])); asm volatile("movdqa %xmm3,%xmm11"); asm volatile("movdqa %xmm7,%xmm15"); asm volatile("pshufb %xmm4,%xmm3"); @@ -667,8 +665,8 @@ void raid_par4_ssse3ext(int nd, size_t size, void **vv) asm volatile("pand %xmm15,%xmm5"); asm volatile("pand %xmm15,%xmm13"); - asm volatile("movdqa %0,%%xmm6" : : "m" (gfcauchypshufb[d][0][0][0])); - asm volatile("movdqa %0,%%xmm7" : : "m" (gfcauchypshufb[d][0][1][0])); + asm volatile("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][0][0][0])); + asm volatile("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[d][0][1][0])); asm volatile("movdqa %xmm6,%xmm14"); asm volatile("movdqa %xmm7,%xmm15"); asm volatile("pshufb %xmm4,%xmm6"); @@ -680,8 +678,8 @@ void raid_par4_ssse3ext(int nd, size_t size, void **vv) asm volatile("pxor %xmm7,%xmm2"); asm volatile("pxor %xmm15,%xmm10"); - asm volatile("movdqa %0,%%xmm6" : : "m" (gfcauchypshufb[d][1][0][0])); - asm volatile("movdqa %0,%%xmm7" : : "m" (gfcauchypshufb[d][1][1][0])); + asm volatile("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][1][0][0])); + asm volatile("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[d][1][1][0])); asm volatile("movdqa %xmm6,%xmm14"); asm volatile("movdqa %xmm7,%xmm15"); asm volatile("pshufb %xmm4,%xmm6"); @@ -785,20 +783,20 @@ void raid_par5_ssse3(int nd, size_t size, void **vv) asm volatile("pand %xmm7,%xmm4"); asm volatile("pand %xmm7,%xmm5"); - asm volatile("movdqa %0,%%xmm1" : : "m" (gfcauchypshufb[l][0][0][0])); - asm volatile("movdqa %0,%%xmm7" : : "m" (gfcauchypshufb[l][0][1][0])); + asm volatile("movdqa %0,%%xmm1" : : "m" (gfgenpshufb[l][0][0][0])); + asm volatile("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[l][0][1][0])); asm volatile("pshufb %xmm4,%xmm1"); asm volatile("pshufb %xmm5,%xmm7"); asm volatile("pxor %xmm7,%xmm1"); - asm volatile("movdqa %0,%%xmm2" : : "m" (gfcauchypshufb[l][1][0][0])); - asm volatile("movdqa %0,%%xmm7" : : "m" (gfcauchypshufb[l][1][1][0])); + asm volatile("movdqa %0,%%xmm2" : : "m" (gfgenpshufb[l][1][0][0])); + asm volatile("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[l][1][1][0])); asm volatile("pshufb %xmm4,%xmm2"); asm volatile("pshufb %xmm5,%xmm7"); asm volatile("pxor %xmm7,%xmm2"); - asm volatile("movdqa %0,%%xmm3" : : "m" (gfcauchypshufb[l][2][0][0])); - asm volatile("movdqa %0,%%xmm7" : : "m" (gfcauchypshufb[l][2][1][0])); + asm volatile("movdqa %0,%%xmm3" : : "m" (gfgenpshufb[l][2][0][0])); + asm volatile("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[l][2][1][0])); asm volatile("pshufb %xmm4,%xmm3"); asm volatile("pshufb %xmm5,%xmm7"); asm volatile("pxor %xmm7,%xmm3"); @@ -825,22 +823,22 @@ void raid_par5_ssse3(int nd, size_t size, void **vv) asm volatile("pand %xmm7,%xmm4"); asm volatile("pand %xmm7,%xmm5"); - asm volatile("movdqa %0,%%xmm6" : : "m" (gfcauchypshufb[d][0][0][0])); - asm volatile("movdqa %0,%%xmm7" : : "m" (gfcauchypshufb[d][0][1][0])); + asm volatile("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][0][0][0])); + asm volatile("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[d][0][1][0])); asm volatile("pshufb %xmm4,%xmm6"); asm volatile("pshufb %xmm5,%xmm7"); asm volatile("pxor %xmm6,%xmm1"); asm volatile("pxor %xmm7,%xmm1"); - asm volatile("movdqa %0,%%xmm6" : : "m" (gfcauchypshufb[d][1][0][0])); - asm volatile("movdqa %0,%%xmm7" : : "m" (gfcauchypshufb[d][1][1][0])); + asm volatile("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][1][0][0])); + asm volatile("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[d][1][1][0])); asm volatile("pshufb %xmm4,%xmm6"); asm volatile("pshufb %xmm5,%xmm7"); asm volatile("pxor %xmm6,%xmm2"); asm volatile("pxor %xmm7,%xmm2"); - asm volatile("movdqa %0,%%xmm6" : : "m" (gfcauchypshufb[d][2][0][0])); - asm volatile("movdqa %0,%%xmm7" : : "m" (gfcauchypshufb[d][2][1][0])); + asm volatile("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][2][0][0])); + asm volatile("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[d][2][1][0])); asm volatile("pshufb %xmm4,%xmm6"); asm volatile("pshufb %xmm5,%xmm7"); asm volatile("pxor %xmm6,%xmm3"); @@ -924,20 +922,20 @@ void raid_par5_ssse3ext(int nd, size_t size, void **vv) asm volatile("pand %xmm15,%xmm10"); asm volatile("pand %xmm15,%xmm11"); - asm volatile("movdqa %0,%%xmm2" : : "m" (gfcauchypshufb[l][0][0][0])); - asm volatile("movdqa %0,%%xmm13" : : "m" (gfcauchypshufb[l][0][1][0])); + asm volatile("movdqa %0,%%xmm2" : : "m" (gfgenpshufb[l][0][0][0])); + asm volatile("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[l][0][1][0])); asm volatile("pshufb %xmm10,%xmm2"); asm volatile("pshufb %xmm11,%xmm13"); asm volatile("pxor %xmm13,%xmm2"); - asm volatile("movdqa %0,%%xmm3" : : "m" (gfcauchypshufb[l][1][0][0])); - asm volatile("movdqa %0,%%xmm13" : : "m" (gfcauchypshufb[l][1][1][0])); + asm volatile("movdqa %0,%%xmm3" : : "m" (gfgenpshufb[l][1][0][0])); + asm volatile("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[l][1][1][0])); asm volatile("pshufb %xmm10,%xmm3"); asm volatile("pshufb %xmm11,%xmm13"); asm volatile("pxor %xmm13,%xmm3"); - asm volatile("movdqa %0,%%xmm4" : : "m" (gfcauchypshufb[l][2][0][0])); - asm volatile("movdqa %0,%%xmm13" : : "m" (gfcauchypshufb[l][2][1][0])); + asm volatile("movdqa %0,%%xmm4" : : "m" (gfgenpshufb[l][2][0][0])); + asm volatile("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[l][2][1][0])); asm volatile("pshufb %xmm10,%xmm4"); asm volatile("pshufb %xmm11,%xmm13"); asm volatile("pxor %xmm13,%xmm4"); @@ -960,22 +958,22 @@ void raid_par5_ssse3ext(int nd, size_t size, void **vv) asm volatile("pand %xmm15,%xmm10"); asm volatile("pand %xmm15,%xmm11"); - asm volatile("movdqa %0,%%xmm12" : : "m" (gfcauchypshufb[d][0][0][0])); - asm volatile("movdqa %0,%%xmm13" : : "m" (gfcauchypshufb[d][0][1][0])); + asm volatile("movdqa %0,%%xmm12" : : "m" (gfgenpshufb[d][0][0][0])); + asm volatile("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[d][0][1][0])); asm volatile("pshufb %xmm10,%xmm12"); asm volatile("pshufb %xmm11,%xmm13"); asm volatile("pxor %xmm12,%xmm2"); asm volatile("pxor %xmm13,%xmm2"); - asm volatile("movdqa %0,%%xmm12" : : "m" (gfcauchypshufb[d][1][0][0])); - asm volatile("movdqa %0,%%xmm13" : : "m" (gfcauchypshufb[d][1][1][0])); + asm volatile("movdqa %0,%%xmm12" : : "m" (gfgenpshufb[d][1][0][0])); + asm volatile("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[d][1][1][0])); asm volatile("pshufb %xmm10,%xmm12"); asm volatile("pshufb %xmm11,%xmm13"); asm volatile("pxor %xmm12,%xmm3"); asm volatile("pxor %xmm13,%xmm3"); - asm volatile("movdqa %0,%%xmm12" : : "m" (gfcauchypshufb[d][2][0][0])); - asm volatile("movdqa %0,%%xmm13" : : "m" (gfcauchypshufb[d][2][1][0])); + asm volatile("movdqa %0,%%xmm12" : : "m" (gfgenpshufb[d][2][0][0])); + asm volatile("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[d][2][1][0])); asm volatile("pshufb %xmm10,%xmm12"); asm volatile("pshufb %xmm11,%xmm13"); asm volatile("pxor %xmm12,%xmm4"); @@ -1061,26 +1059,26 @@ void raid_par6_ssse3(int nd, size_t size, void **vv) asm volatile("pand %xmm7,%xmm4"); asm volatile("pand %xmm7,%xmm5"); - asm volatile("movdqa %0,%%xmm0" : : "m" (gfcauchypshufb[l][0][0][0])); - asm volatile("movdqa %0,%%xmm7" : : "m" (gfcauchypshufb[l][0][1][0])); + asm volatile("movdqa %0,%%xmm0" : : "m" (gfgenpshufb[l][0][0][0])); + asm volatile("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[l][0][1][0])); asm volatile("pshufb %xmm4,%xmm0"); asm volatile("pshufb %xmm5,%xmm7"); asm volatile("pxor %xmm7,%xmm0"); - asm volatile("movdqa %0,%%xmm1" : : "m" (gfcauchypshufb[l][1][0][0])); - asm volatile("movdqa %0,%%xmm7" : : "m" (gfcauchypshufb[l][1][1][0])); + asm volatile("movdqa %0,%%xmm1" : : "m" (gfgenpshufb[l][1][0][0])); + asm volatile("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[l][1][1][0])); asm volatile("pshufb %xmm4,%xmm1"); asm volatile("pshufb %xmm5,%xmm7"); asm volatile("pxor %xmm7,%xmm1"); - asm volatile("movdqa %0,%%xmm2" : : "m" (gfcauchypshufb[l][2][0][0])); - asm volatile("movdqa %0,%%xmm7" : : "m" (gfcauchypshufb[l][2][1][0])); + asm volatile("movdqa %0,%%xmm2" : : "m" (gfgenpshufb[l][2][0][0])); + asm volatile("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[l][2][1][0])); asm volatile("pshufb %xmm4,%xmm2"); asm volatile("pshufb %xmm5,%xmm7"); asm volatile("pxor %xmm7,%xmm2"); - asm volatile("movdqa %0,%%xmm3" : : "m" (gfcauchypshufb[l][3][0][0])); - asm volatile("movdqa %0,%%xmm7" : : "m" (gfcauchypshufb[l][3][1][0])); + asm volatile("movdqa %0,%%xmm3" : : "m" (gfgenpshufb[l][3][0][0])); + asm volatile("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[l][3][1][0])); asm volatile("pshufb %xmm4,%xmm3"); asm volatile("pshufb %xmm5,%xmm7"); asm volatile("pxor %xmm7,%xmm3"); @@ -1110,29 +1108,29 @@ void raid_par6_ssse3(int nd, size_t size, void **vv) asm volatile("pand %xmm7,%xmm4"); asm volatile("pand %xmm7,%xmm5"); - asm volatile("movdqa %0,%%xmm6" : : "m" (gfcauchypshufb[d][0][0][0])); - asm volatile("movdqa %0,%%xmm7" : : "m" (gfcauchypshufb[d][0][1][0])); + asm volatile("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][0][0][0])); + asm volatile("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[d][0][1][0])); asm volatile("pshufb %xmm4,%xmm6"); asm volatile("pshufb %xmm5,%xmm7"); asm volatile("pxor %xmm6,%xmm0"); asm volatile("pxor %xmm7,%xmm0"); - asm volatile("movdqa %0,%%xmm6" : : "m" (gfcauchypshufb[d][1][0][0])); - asm volatile("movdqa %0,%%xmm7" : : "m" (gfcauchypshufb[d][1][1][0])); + asm volatile("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][1][0][0])); + asm volatile("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[d][1][1][0])); asm volatile("pshufb %xmm4,%xmm6"); asm volatile("pshufb %xmm5,%xmm7"); asm volatile("pxor %xmm6,%xmm1"); asm volatile("pxor %xmm7,%xmm1"); - asm volatile("movdqa %0,%%xmm6" : : "m" (gfcauchypshufb[d][2][0][0])); - asm volatile("movdqa %0,%%xmm7" : : "m" (gfcauchypshufb[d][2][1][0])); + asm volatile("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][2][0][0])); + asm volatile("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[d][2][1][0])); asm volatile("pshufb %xmm4,%xmm6"); asm volatile("pshufb %xmm5,%xmm7"); asm volatile("pxor %xmm6,%xmm2"); asm volatile("pxor %xmm7,%xmm2"); - asm volatile("movdqa %0,%%xmm6" : : "m" (gfcauchypshufb[d][3][0][0])); - asm volatile("movdqa %0,%%xmm7" : : "m" (gfcauchypshufb[d][3][1][0])); + asm volatile("movdqa %0,%%xmm6" : : "m" (gfgenpshufb[d][3][0][0])); + asm volatile("movdqa %0,%%xmm7" : : "m" (gfgenpshufb[d][3][1][0])); asm volatile("pshufb %xmm4,%xmm6"); asm volatile("pshufb %xmm5,%xmm7"); asm volatile("pxor %xmm6,%xmm3"); @@ -1221,26 +1219,26 @@ void raid_par6_ssse3ext(int nd, size_t size, void **vv) asm volatile("pand %xmm15,%xmm10"); asm volatile("pand %xmm15,%xmm11"); - asm volatile("movdqa %0,%%xmm2" : : "m" (gfcauchypshufb[l][0][0][0])); - asm volatile("movdqa %0,%%xmm13" : : "m" (gfcauchypshufb[l][0][1][0])); + asm volatile("movdqa %0,%%xmm2" : : "m" (gfgenpshufb[l][0][0][0])); + asm volatile("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[l][0][1][0])); asm volatile("pshufb %xmm10,%xmm2"); asm volatile("pshufb %xmm11,%xmm13"); asm volatile("pxor %xmm13,%xmm2"); - asm volatile("movdqa %0,%%xmm3" : : "m" (gfcauchypshufb[l][1][0][0])); - asm volatile("movdqa %0,%%xmm13" : : "m" (gfcauchypshufb[l][1][1][0])); + asm volatile("movdqa %0,%%xmm3" : : "m" (gfgenpshufb[l][1][0][0])); + asm volatile("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[l][1][1][0])); asm volatile("pshufb %xmm10,%xmm3"); asm volatile("pshufb %xmm11,%xmm13"); asm volatile("pxor %xmm13,%xmm3"); - asm volatile("movdqa %0,%%xmm4" : : "m" (gfcauchypshufb[l][2][0][0])); - asm volatile("movdqa %0,%%xmm13" : : "m" (gfcauchypshufb[l][2][1][0])); + asm volatile("movdqa %0,%%xmm4" : : "m" (gfgenpshufb[l][2][0][0])); + asm volatile("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[l][2][1][0])); asm volatile("pshufb %xmm10,%xmm4"); asm volatile("pshufb %xmm11,%xmm13"); asm volatile("pxor %xmm13,%xmm4"); - asm volatile("movdqa %0,%%xmm5" : : "m" (gfcauchypshufb[l][3][0][0])); - asm volatile("movdqa %0,%%xmm13" : : "m" (gfcauchypshufb[l][3][1][0])); + asm volatile("movdqa %0,%%xmm5" : : "m" (gfgenpshufb[l][3][0][0])); + asm volatile("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[l][3][1][0])); asm volatile("pshufb %xmm10,%xmm5"); asm volatile("pshufb %xmm11,%xmm13"); asm volatile("pxor %xmm13,%xmm5"); @@ -1263,29 +1261,29 @@ void raid_par6_ssse3ext(int nd, size_t size, void **vv) asm volatile("pand %xmm15,%xmm10"); asm volatile("pand %xmm15,%xmm11"); - asm volatile("movdqa %0,%%xmm12" : : "m" (gfcauchypshufb[d][0][0][0])); - asm volatile("movdqa %0,%%xmm13" : : "m" (gfcauchypshufb[d][0][1][0])); + asm volatile("movdqa %0,%%xmm12" : : "m" (gfgenpshufb[d][0][0][0])); + asm volatile("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[d][0][1][0])); asm volatile("pshufb %xmm10,%xmm12"); asm volatile("pshufb %xmm11,%xmm13"); asm volatile("pxor %xmm12,%xmm2"); asm volatile("pxor %xmm13,%xmm2"); - asm volatile("movdqa %0,%%xmm12" : : "m" (gfcauchypshufb[d][1][0][0])); - asm volatile("movdqa %0,%%xmm13" : : "m" (gfcauchypshufb[d][1][1][0])); + asm volatile("movdqa %0,%%xmm12" : : "m" (gfgenpshufb[d][1][0][0])); + asm volatile("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[d][1][1][0])); asm volatile("pshufb %xmm10,%xmm12"); asm volatile("pshufb %xmm11,%xmm13"); asm volatile("pxor %xmm12,%xmm3"); asm volatile("pxor %xmm13,%xmm3"); - asm volatile("movdqa %0,%%xmm12" : : "m" (gfcauchypshufb[d][2][0][0])); - asm volatile("movdqa %0,%%xmm13" : : "m" (gfcauchypshufb[d][2][1][0])); + asm volatile("movdqa %0,%%xmm12" : : "m" (gfgenpshufb[d][2][0][0])); + asm volatile("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[d][2][1][0])); asm volatile("pshufb %xmm10,%xmm12"); asm volatile("pshufb %xmm11,%xmm13"); asm volatile("pxor %xmm12,%xmm4"); asm volatile("pxor %xmm13,%xmm4"); - asm volatile("movdqa %0,%%xmm12" : : "m" (gfcauchypshufb[d][3][0][0])); - asm volatile("movdqa %0,%%xmm13" : : "m" (gfcauchypshufb[d][3][1][0])); + asm volatile("movdqa %0,%%xmm12" : : "m" (gfgenpshufb[d][3][0][0])); + asm volatile("movdqa %0,%%xmm13" : : "m" (gfgenpshufb[d][3][1][0])); asm volatile("pshufb %xmm10,%xmm12"); asm volatile("pshufb %xmm11,%xmm13"); asm volatile("pxor %xmm12,%xmm5"); diff --git a/selftest.c b/selftest.c index 3cf86986..74288e14 100644 --- a/selftest.c +++ b/selftest.c @@ -162,6 +162,10 @@ void selftest(void) test_hash(); test_crc32c(); + if (raid_selftest() != 0) { + fprintf(stderr, "Failed SELF test\n"); + exit(EXIT_FAILURE); + } if (raid_test_sort() != 0) { fprintf(stderr, "Failed SORT test\n"); exit(EXIT_FAILURE); diff --git a/speed.c b/speed.c index 2ba19ce8..1fd5a212 100644 --- a/speed.c +++ b/speed.c @@ -24,6 +24,11 @@ #include "raid/internal.h" #include "state.h" +/* + * Size of the blocks to test. + */ +#define TEST_SIZE (256*1024) + /** * Differential us of two timeval. */ @@ -44,7 +49,7 @@ static int64_t diffgettimeofday(struct timeval *start, struct timeval *stop) count = 0; \ gettimeofday(&start, 0); \ do { \ - for(i=0;iraid_mode == RAID_MODE_CAUCHY) { @@ -703,7 +703,7 @@ void state_config(struct snapraid_state* state, const char* path, const char* co } else if (state->opt.force_spooky2) { state->besthash = HASH_SPOOKY2; } else { -#if defined(__i386__) || defined(__x86_64__) +#ifdef CONFIG_X86 if (sizeof(void*) == 4 && !raid_cpu_has_slowmult()) state->besthash = HASH_MURMUR3; else diff --git a/util.c b/util.c index f02df895..25e5787f 100644 --- a/util.c +++ b/util.c @@ -1094,13 +1094,13 @@ uint32_t crc32c_gen(uint32_t crc, const unsigned char* ptr, unsigned size) uint32_t crc32c_x86(uint32_t crc, const unsigned char* ptr, unsigned size) { -#if defined(__x86_64__) +#ifdef CONFIG_X86_64 uint64_t crc64; #endif crc ^= CRC_IV; -#if defined(__x86_64__) +#ifdef CONFIG_X86_64 crc64 = crc; while (size >= 8) { asm volatile ("crc32q %1, %0\n" : "+r" (crc64) : "rm" (*(uint64_t*)ptr));