diff --git a/Makefile.am b/Makefile.am index 81f2e5cb..bd377418 100644 --- a/Makefile.am +++ b/Makefile.am @@ -117,6 +117,8 @@ noinst_HEADERS = \ cmdline/spooky2test.c \ cmdline/museair.c \ cmdline/museairtest.c \ + cmdline/xxh3.c \ + cmdline/xxh3test.c \ cmdline/import.h \ cmdline/search.h \ cmdline/thermal.h \ diff --git a/cmdline/mkstream.c b/cmdline/mkstream.c index 224e8380..eadccad9 100644 --- a/cmdline/mkstream.c +++ b/cmdline/mkstream.c @@ -22,6 +22,7 @@ void test(int advise_mode) uint32_t put_crc_stored; crc32c_init(); + hash_init(); s = sopen_multi_write(STREAM_MAX, advise_mode | STREAM_FLAGS_CRC); for (i = 0; i < STREAM_MAX; ++i) { diff --git a/cmdline/selftest.c b/cmdline/selftest.c index a88f61e5..16064c51 100644 --- a/cmdline/selftest.c +++ b/cmdline/selftest.c @@ -153,7 +153,15 @@ static struct hash_test_vector TEST_MUSEAIR[] = { { 0, 0, { 0 }, { 0 } } }; -#define HASH_TEST_MAX 512 /* tests are never longer than 512 bytes */ +/** + * Test vectors for XXH3 + */ +static struct hash_test_vector TEST_XXH3[] = { +#include "xxh3test.c" + { 0, 0, { 0 }, { 0 } } +}; + +#define HASH_TEST_MAX 4096 /* tests are never longer than 4096 bytes */ static void test_hash(void) { @@ -241,6 +249,69 @@ static void test_hash(void) } } + for (i = 0; TEST_XXH3[i].data; ++i) { + unsigned char digest[HASH_MAX]; + memcpy(buffer_aligned, TEST_XXH3[i].data, TEST_XXH3[i].len); + memcpy(seed_aligned, TEST_XXH3[i].seed, HASH_MAX); + + xxh3_128(buffer_aligned, TEST_XXH3[i].len, seed_aligned, digest); + if (memcmp(digest, TEST_XXH3[i].digest, HASH_MAX) != 0) { + /* LCOV_EXCL_START */ + log_fatal(EINTERNAL, "Failed XXH3 test\n"); + exit(EXIT_FAILURE); + /* LCOV_EXCL_STOP */ + } + +#if CONFIG_X86 + if (raid_cpu_has_sse2()) { + xxh3_128_sse2(buffer_aligned, TEST_XXH3[i].len, seed_aligned, digest); + if (memcmp(digest, TEST_XXH3[i].digest, HASH_MAX) != 0) { + /* LCOV_EXCL_START */ + log_fatal(EINTERNAL, "Failed XXH3 SSE2 test\n"); + exit(EXIT_FAILURE); + /* LCOV_EXCL_STOP */ + } + } + + if (raid_cpu_has_avx2()) { + xxh3_128_avx2(buffer_aligned, TEST_XXH3[i].len, seed_aligned, digest); + if (memcmp(digest, TEST_XXH3[i].digest, HASH_MAX) != 0) { + /* LCOV_EXCL_START */ + log_fatal(EINTERNAL, "Failed XXH3 AVX2 test\n"); + exit(EXIT_FAILURE); + /* LCOV_EXCL_STOP */ + } + } + + if (raid_cpu_has_avx512f()) { + xxh3_128_avx512(buffer_aligned, TEST_XXH3[i].len, seed_aligned, digest); + if (memcmp(digest, TEST_XXH3[i].digest, HASH_MAX) != 0) { + /* LCOV_EXCL_START */ + log_fatal(EINTERNAL, "Failed XXH3 AVX512 test\n"); + exit(EXIT_FAILURE); + /* LCOV_EXCL_STOP */ + } + } +#endif +#if defined(CONFIG_NEON) || defined(CONFIG_NEON32) + xxh3_128_neon(buffer_aligned, TEST_XXH3[i].len, seed_aligned, digest); + if (memcmp(digest, TEST_XXH3[i].digest, HASH_MAX) != 0) { + /* LCOV_EXCL_START */ + log_fatal(EINTERNAL, "Failed XXH3 NEON test\n"); + exit(EXIT_FAILURE); + /* LCOV_EXCL_STOP */ + } +#endif + + memhash(HASH_XXH3, seed_aligned, digest, buffer_aligned, TEST_XXH3[i].len); + if (memcmp(digest, TEST_XXH3[i].digest, HASH_MAX) != 0) { + /* LCOV_EXCL_START */ + log_fatal(EINTERNAL, "Failed XXH3 memhash test\n"); + exit(EXIT_FAILURE); + /* LCOV_EXCL_STOP */ + } + } + free(buffer_alloc); free(seed_alloc); } @@ -2924,6 +2995,7 @@ void test(int argc, char* argv[]) lock_init(); crc32c_init(); + hash_init(); raid_init(); msg_progress("Test...\n"); diff --git a/cmdline/snapraid.c b/cmdline/snapraid.c index 2d806fb9..e671dd09 100644 --- a/cmdline/snapraid.c +++ b/cmdline/snapraid.c @@ -1067,6 +1067,7 @@ int snapraid_main(int argc, char* argv[]) app_init(); raid_init(); crc32c_init(); + hash_init(); random_reseed(); if (speedtest != 0) { diff --git a/cmdline/speed.c b/cmdline/speed.c index c690986e..6222246b 100644 --- a/cmdline/speed.c +++ b/cmdline/speed.c @@ -151,6 +151,18 @@ void speed_hash(int nd, void** v, int size, int delta, int period) printf("%8s", "murmur3"); printf("%8s", "spooky2"); printf("%8s", "museair"); + printf("%8s", "xxh3"); +#if CONFIG_X86 + if (raid_cpu_has_sse2()) + printf("%8s", "xsse2"); + if (raid_cpu_has_avx2()) + printf("%8s", "xavx2"); + if (raid_cpu_has_avx512f()) + printf("%8s", "xavx512"); +#endif +#if defined(CONFIG_NEON) || defined(CONFIG_NEON32) + printf("%8s", "xneon"); +#endif printf("\n"); printf("%8s", "hash"); @@ -179,6 +191,57 @@ void speed_hash(int nd, void** v, int size, int delta, int period) } SPEED_STOP printf("%8" PRIu64, ds / dt); + fflush(stdout); + + SPEED_START { + for (i = 0; i < nd; ++i) + xxh3_128(v[i], size, seed, digest); + } SPEED_STOP + + printf("%8" PRIu64, ds / dt); + fflush(stdout); + +#if CONFIG_X86 + if (raid_cpu_has_sse2()) { + SPEED_START { + for (i = 0; i < nd; ++i) + xxh3_128_sse2(v[i], size, seed, digest); + } SPEED_STOP + + printf("%8" PRIu64, ds / dt); + fflush(stdout); + } + + if (raid_cpu_has_avx2()) { + SPEED_START { + for (i = 0; i < nd; ++i) + xxh3_128_avx2(v[i], size, seed, digest); + } SPEED_STOP + + printf("%8" PRIu64, ds / dt); + fflush(stdout); + } + + if (raid_cpu_has_avx512f()) { + SPEED_START { + for (i = 0; i < nd; ++i) + xxh3_128_avx512(v[i], size, seed, digest); + } SPEED_STOP + + printf("%8" PRIu64, ds / dt); + fflush(stdout); + } +#endif +#if defined(CONFIG_NEON) || defined(CONFIG_NEON32) + SPEED_START { + for (i = 0; i < nd; ++i) + xxh3_128_neon(v[i], size, seed, digest); + } SPEED_STOP + + printf("%8" PRIu64, ds / dt); + fflush(stdout); +#endif + printf("\n"); printf("\n"); } diff --git a/cmdline/util.c b/cmdline/util.c index 233656f8..0083f3d5 100644 --- a/cmdline/util.c +++ b/cmdline/util.c @@ -787,6 +787,7 @@ const char* memhashname(unsigned kind) case HASH_MURMUR3 : return "murmur3"; case HASH_SPOOKY2 : return "spooky2"; case HASH_MUSEAIR : return "museair"; + case HASH_XXH3 : return "xxh3"; } return 0; @@ -810,6 +811,26 @@ unsigned membesthash(void) #include "murmur3.c" #include "spooky2.c" #include "museair.c" +#include "xxh3.c" + +static void (*xxh3)(const void* bytes, size_t len, const uint8_t* seed, uint8_t* out) = xxh3_128; + +void hash_init(void) +{ + xxh3 = xxh3_128; +#if CONFIG_X86 + if (raid_cpu_has_avx512f()) { + xxh3 = xxh3_128_avx512; + } else if (raid_cpu_has_avx2()) { + xxh3 = xxh3_128_avx2; + } else if (raid_cpu_has_sse2()) { + xxh3 = xxh3_128_sse2; + } +#endif +#if defined(CONFIG_NEON) || defined(CONFIG_NEON32) + xxh3 = xxh3_128_neon; +#endif +} void memhash(unsigned kind, const unsigned char* seed, void* digest, const void* src, size_t size) { @@ -823,6 +844,9 @@ void memhash(unsigned kind, const unsigned char* seed, void* digest, const void* case HASH_MUSEAIR : MuseAirLoong(src, size, seed, digest); break; + case HASH_XXH3 : + xxh3(src, size, seed, digest); + break; default : /* LCOV_EXCL_START */ log_fatal(EINTERNAL, "Internal inconsistency in hash function %u\n", kind); @@ -859,6 +883,7 @@ const char* hash_config_name(unsigned kind) case HASH_MURMUR3 : return "murmur3"; case HASH_SPOOKY2 : return "spooky2"; case HASH_MUSEAIR : return "museair"; + case HASH_XXH3 : return "xxh3"; default : /* LCOV_EXCL_START */ return "unknown"; diff --git a/cmdline/util.h b/cmdline/util.h index f65dce31..96a8edd1 100644 --- a/cmdline/util.h +++ b/cmdline/util.h @@ -385,12 +385,26 @@ extern uint32_t (*crc32c)(uint32_t crc, const unsigned char* ptr, size_t size); uint32_t crc32c_gen(uint32_t crc, const unsigned char* ptr, size_t size); uint32_t crc32c_x86(uint32_t crc, const unsigned char* ptr, size_t size); uint32_t crc32c_arm64(uint32_t crc, const unsigned char* ptr, size_t size); +void xxh3_128(const void* bytes, size_t len, const uint8_t* seed, uint8_t* out); +#if CONFIG_X86 +void xxh3_128_sse2(const void* bytes, size_t len, const uint8_t* seed, uint8_t* out); +void xxh3_128_avx2(const void* bytes, size_t len, const uint8_t* seed, uint8_t* out); +void xxh3_128_avx512(const void* bytes, size_t len, const uint8_t* seed, uint8_t* out); +#endif +#if defined(CONFIG_NEON) || defined(CONFIG_NEON32) +void xxh3_128_neon(const void* bytes, size_t len, const uint8_t* seed, uint8_t* out); +#endif /** * Initialize the CRC-32 (Castagnoli) support. */ void crc32c_init(void); +/** + * Initialize the hash subsystem and select the best CPU backend. + */ +void hash_init(void); + /****************************************************************************/ /* hash */ @@ -406,6 +420,7 @@ void crc32c_init(void); #define HASH_MURMUR3 1 #define HASH_SPOOKY2 2 #define HASH_MUSEAIR 3 +#define HASH_XXH3 4 /** * Return the hash that is expected to be the fastest in this architecture @@ -448,12 +463,12 @@ void memhash_block(unsigned kind, const unsigned char* seed, void* digest, const * * Legacy hashes (Murmur3, Spooky2) preserve historical semantics and hash * only the logical file bytes. - * Modern hashes (MuseAir) hash the complete zero-padded RAID block up to + * Modern hashes (MuseAir, XXH3) hash the complete zero-padded RAID block up to * block_size. */ static inline int memhash_is_block(unsigned kind) { - return kind == HASH_MUSEAIR; + return kind == HASH_MUSEAIR || kind == HASH_XXH3; } /** diff --git a/cmdline/xxh3.c b/cmdline/xxh3.c new file mode 100644 index 00000000..3741630e --- /dev/null +++ b/cmdline/xxh3.c @@ -0,0 +1,579 @@ +// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (C) 2026 Andrea Mazzoleni + +/* + * Derivative work of the XXH3-128 v8.4 implementation. + * + * This file implements the XXH3 long accumulator mode with support for + * arbitrary input lengths. Unlike the original XXH3, which switches to separate + * small/midsize routines for len <= 240 bytes, this implementation extends the + * long mode: + * - For len >= 64 bytes, it uses the striped accumulator loop directly. + * - For len < 64 bytes, the input is zero-padded to 64 bytes, and the original + * length is folded into the finalizer (preventing padding collisions). + * + * The motivation for extending the long mode to all lengths rather than using + * the upstream short/midsize routines is that SnapRAID operates primarily on + * large data blocks (typically 256 KB) where SIMD-accelerated long mode delivers + * maximum throughput. Short inputs occur only as rare edge cases (such as + * empty or small files), and maintaining a single code path reduces algorithmic + * complexity and defect potential. + * + * seed points to 16 bytes, interpreted as two little-endian uint64_t words: + * seed_lo then seed_hi. + * - An all-zero seed uses the unmodified standard XXH3 secret. + * - For len > 240, setting seed_lo == seed_hi matches standard + * XXH3_128bits_withSeed() with that 64-bit seed value. + * - When seed_lo != seed_hi, the 128-bit seed extends the secret by adding + * seed_lo to even 64-bit words and subtracting seed_hi from odd words. + * + * For len <= 240, the output is not bit-compatible with original xxHash due to + * using the padded long mode rather than the upstream short/midsize routines. + */ + +/* + * xxHash - Extremely Fast Hash algorithm + * Development source file for `xxh3` + * Copyright (C) 2019-2021 Yann Collet + * + * BSD 2-Clause License (https://www.opensource.org/licenses/bsd-license.php) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following disclaimer + * in the documentation and/or other materials provided with the + * distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You can contact the author at: + * - xxHash homepage: https://www.xxhash.com + * - xxHash source repository: https://github.com/Cyan4973/xxHash + */ + +#if CONFIG_X86 +#include + +#define XXH3_TARGET_SSE2 __attribute__((target("sse2"))) +#define XXH3_TARGET_AVX2 __attribute__((target("avx2"))) +#define XXH3_TARGET_AVX512 __attribute__((target("avx512f"))) +#endif + +#if defined(CONFIG_NEON) || defined(CONFIG_NEON32) +#include +#endif + +#define XXH3_STRIPE_LEN 64 +#define XXH3_SECRET_SIZE 192 +#define XXH3_SECRET_CONSUME_RATE 8 +#define XXH3_ACC_NB 8 +#define XXH3_STRIPES_PER_BLOCK 16 +#define XXH3_BLOCK_LEN 1024 +#define XXH3_LAST_SECRET_OFFSET 121 +#define XXH3_MERGE_OFFSET 11 + +#define XXH_PRIME32_1 0x9E3779B1U +#define XXH_PRIME32_2 0x85EBCA77U +#define XXH_PRIME32_3 0xC2B2AE3DU + +#define XXH_PRIME64_1 0x9E3779B185EBCA87ULL +#define XXH_PRIME64_2 0xC2B2AE3D27D4EB4FULL +#define XXH_PRIME64_3 0x165667B19E3779F9ULL +#define XXH_PRIME64_4 0x85EBCA77C2B2AE63ULL +#define XXH_PRIME64_5 0x27D4EB2F165667C5ULL + +#define XXH_PRIME_MX1 0x165667919E3779F9ULL + +#define XXH3_INIT_ACC_VALUES \ + { XXH_PRIME32_3, XXH_PRIME64_1, XXH_PRIME64_2, XXH_PRIME64_3, \ + XXH_PRIME64_4, XXH_PRIME32_2, XXH_PRIME64_5, XXH_PRIME32_1 } + +static const __attribute__((aligned(64))) uint8_t xxh3_secret[XXH3_SECRET_SIZE] = { + 0xb8, 0xfe, 0x6c, 0x39, 0x23, 0xa4, 0x4b, 0xbe, 0x7c, 0x01, 0x81, 0x2c, 0xf7, 0x21, 0xad, 0x1c, + 0xde, 0xd4, 0x6d, 0xe9, 0x83, 0x90, 0x97, 0xdb, 0x72, 0x40, 0xa4, 0xa4, 0xb7, 0xb3, 0x67, 0x1f, + 0xcb, 0x79, 0xe6, 0x4e, 0xcc, 0xc0, 0xe5, 0x78, 0x82, 0x5a, 0xd0, 0x7d, 0xcc, 0xff, 0x72, 0x21, + 0xb8, 0x08, 0x46, 0x74, 0xf7, 0x43, 0x24, 0x8e, 0xe0, 0x35, 0x90, 0xe6, 0x81, 0x3a, 0x26, 0x4c, + 0x3c, 0x28, 0x52, 0xbb, 0x91, 0xc3, 0x00, 0xcb, 0x88, 0xd0, 0x65, 0x8b, 0x1b, 0x53, 0x2e, 0xa3, + 0x71, 0x64, 0x48, 0x97, 0xa2, 0x0d, 0xf9, 0x4e, 0x38, 0x19, 0xef, 0x46, 0xa9, 0xde, 0xac, 0xd8, + 0xa8, 0xfa, 0x76, 0x3f, 0xe3, 0x9c, 0x34, 0x3f, 0xf9, 0xdc, 0xbb, 0xc7, 0xc7, 0x0b, 0x4f, 0x1d, + 0x8a, 0x51, 0xe0, 0x4b, 0xcd, 0xb4, 0x59, 0x31, 0xc8, 0x9f, 0x7e, 0xc9, 0xd9, 0x78, 0x73, 0x64, + 0xea, 0xc5, 0xac, 0x83, 0x34, 0xd3, 0xeb, 0xc3, 0xc5, 0x81, 0xa0, 0xff, 0xfa, 0x13, 0x63, 0xeb, + 0x17, 0x0d, 0xdd, 0x51, 0xb7, 0xf0, 0xda, 0x49, 0xd3, 0x16, 0x55, 0x26, 0x29, 0xd4, 0x68, 0x9e, + 0x2b, 0x16, 0xbe, 0x58, 0x7d, 0x47, 0xa1, 0xfc, 0x8f, 0xf8, 0xb8, 0xd1, 0x7a, 0xd0, 0x31, 0xce, + 0x45, 0xcb, 0x3a, 0x8f, 0x95, 0x16, 0x04, 0x28, 0xaf, 0xd7, 0xfb, 0xca, 0xbb, 0x4b, 0x40, 0x7e +}; + +static __always_inline uint64_t xxh3_xorshift64(uint64_t x, unsigned shift) +{ + return x ^ (x >> shift); +} + +static __always_inline uint64_t xxh3_avalanche(uint64_t x) +{ + x = xxh3_xorshift64(x, 37); + x *= XXH_PRIME_MX1; + return xxh3_xorshift64(x, 32); +} + +static __always_inline uint64_t xxh3_mul128_fold64(uint64_t a, uint64_t b) +{ + util_mum(&a, &b); + return a ^ b; +} + +/* + * 128-bit seed extension. + * + * Standard XXH3 with a 64-bit seed transforms every 16-byte secret pair as: + * + * secret[even] += seed; + * secret[odd] -= seed; + * + * Here the 16-byte seed is split into two little-endian 64-bit words and the + * same construction is extended naturally to: + * + * secret[even] += seed_lo; + * secret[odd] -= seed_hi; + * + * Therefore both halves of the seed affect every 16-byte secret pair. + */ +static void xxh3_make_seeded_secret(uint8_t* out, uint64_t seed_lo, uint64_t seed_hi) +{ + for (size_t i = 0; i < XXH3_SECRET_SIZE; i += 16) { + util_write64(out + i, util_read64(xxh3_secret + i) + seed_lo); + util_write64(out + i + 8, util_read64(xxh3_secret + i + 8) - seed_hi); + } +} + +static __always_inline const uint8_t* xxh3_select_secret(const uint8_t* seed, uint8_t* custom) +{ + uint64_t seed_lo = util_read64(seed); + uint64_t seed_hi = util_read64(seed + 8); + + if ((seed_lo | seed_hi) == 0) + return xxh3_secret; + + xxh3_make_seeded_secret(custom, seed_lo, seed_hi); + return custom; +} + +static __always_inline uint64_t xxh3_mix2accs(const uint64_t* acc, const uint8_t* secret) +{ + return xxh3_mul128_fold64(acc[0] ^ util_read64(secret), acc[1] ^ util_read64(secret + 8)); +} + +static __always_inline uint64_t xxh3_merge_accs(const uint64_t* acc, const uint8_t* secret, uint64_t start) +{ + uint64_t h = start; + for (unsigned i = 0; i < 4; ++i) + h += xxh3_mix2accs(acc + 2 * i, secret + 16 * i); + return xxh3_avalanche(h); +} + +static __always_inline void xxh3_finalize128(const uint64_t* acc, const uint8_t* secret, size_t len, uint8_t* out) +{ + uint64_t low64 = xxh3_merge_accs(acc, secret + XXH3_MERGE_OFFSET, (uint64_t)len * XXH_PRIME64_1); + uint64_t high64 = xxh3_merge_accs(acc, secret + XXH3_SECRET_SIZE - XXH3_STRIPE_LEN - XXH3_MERGE_OFFSET, ~((uint64_t)len * XXH_PRIME64_2)); + util_write64(out, low64); + util_write64(out + 8, high64); +} + +static __always_inline void xxh3_acc512_c(uint64_t* acc, const uint8_t* input, const uint8_t* secret) +{ + for (unsigned lane = 0; lane < XXH3_ACC_NB; ++lane) { + uint64_t data = util_read64(input + 8 * lane); + uint64_t keyed = data ^ util_read64(secret + 8 * lane); + uint64_t product = (uint64_t)(uint32_t)keyed * (uint32_t)(keyed >> 32); + + acc[lane ^ 1] += data; /* exchange adjacent 64-bit lanes */ + acc[lane] += product; + } +} + +static __always_inline void xxh3_scramble_c(uint64_t* acc, const uint8_t* secret) +{ + for (unsigned lane = 0; lane < XXH3_ACC_NB; ++lane) { + uint64_t x = xxh3_xorshift64(acc[lane], 47); + x ^= util_read64(secret + 8 * lane); + acc[lane] = x * XXH_PRIME32_1; + } +} + +static __always_inline void xxh3_short_core(const void* input, size_t len, const uint8_t* secret, uint8_t* out) +{ + __attribute__((aligned(64))) uint8_t buf[XXH3_STRIPE_LEN]; + __attribute__((aligned(64))) uint64_t acc[XXH3_ACC_NB] = XXH3_INIT_ACC_VALUES; + + memset(buf, 0, XXH3_STRIPE_LEN); + if (len > 0) + memcpy(buf, input, len); + + xxh3_acc512_c(acc, buf, secret + XXH3_LAST_SECRET_OFFSET); + xxh3_finalize128(acc, secret, len, out); +} + +/* + * With the 192-byte default secret: + * stripes per block = (192 - 64) / 8 = 16 + * block size = 16 * 64 = 1024 bytes + */ +static __always_inline void xxh3_long_core_c(const void* input, size_t len, const uint8_t* secret, uint8_t* out) +{ + const uint8_t* p = input; + __attribute__((aligned(64))) uint64_t acc[XXH3_ACC_NB] = XXH3_INIT_ACC_VALUES; + size_t blocks = (len - 1) / XXH3_BLOCK_LEN; + + for (size_t b = 0; b < blocks; ++b) { + const uint8_t* block = p + b * XXH3_BLOCK_LEN; + for (size_t s = 0; s < XXH3_STRIPES_PER_BLOCK; ++s) + xxh3_acc512_c(acc, block + s * XXH3_STRIPE_LEN, secret + s * XXH3_SECRET_CONSUME_RATE); + xxh3_scramble_c(acc, secret + XXH3_SECRET_SIZE - XXH3_STRIPE_LEN); + } + + size_t stripes = ((len - 1) - blocks * XXH3_BLOCK_LEN) / XXH3_STRIPE_LEN; + const uint8_t* block = p + blocks * XXH3_BLOCK_LEN; + for (size_t s = 0; s < stripes; ++s) + xxh3_acc512_c(acc, block + s * XXH3_STRIPE_LEN, secret + s * XXH3_SECRET_CONSUME_RATE); + + xxh3_acc512_c(acc, p + len - XXH3_STRIPE_LEN, secret + XXH3_LAST_SECRET_OFFSET); + xxh3_finalize128(acc, secret, len, out); +} + +/* + * seed points to 16 bytes: seed_lo then seed_hi, both little-endian. + * out receives low64 then high64, both little-endian. + * + * No CPU detection is performed. The caller must invoke only a SIMD entry + * point supported by the current CPU. + */ +void xxh3_128(const void* bytes, size_t len, const uint8_t* seed, uint8_t* out) +{ + __attribute__((aligned(64))) uint8_t custom[XXH3_SECRET_SIZE]; + const uint8_t* secret; + + secret = xxh3_select_secret(seed, custom); + + if (tommy_unlikely(len < XXH3_STRIPE_LEN)) + xxh3_short_core(bytes, len, secret, out); + else + xxh3_long_core_c(bytes, len, secret, out); +} + +#if defined(CONFIG_NEON) || defined(CONFIG_NEON32) +static __always_inline uint64x2_t xxh3_vld1q_u64(const void* ptr) +{ + return vreinterpretq_u64_u8(vld1q_u8((const uint8_t*)ptr)); +} + +static __always_inline uint64x2_t xxh3_vmlal_low_u32(uint64x2_t acc, uint32x4_t lhs, uint32x4_t rhs) +{ + return vmlal_u32(acc, vget_low_u32(lhs), vget_low_u32(rhs)); +} + +static __always_inline uint64x2_t xxh3_vmlal_high_u32(uint64x2_t acc, uint32x4_t lhs, uint32x4_t rhs) +{ +#if defined(CONFIG_NEON) + return vmlal_high_u32(acc, lhs, rhs); +#else + return vmlal_u32(acc, vget_high_u32(lhs), vget_high_u32(rhs)); +#endif +} + +static __always_inline void xxh3_acc512_neon(uint64_t* acc, const uint8_t* input, const uint8_t* secret) +{ + for (unsigned i = 0; i < 4; i += 2) { + uint64x2_t data_vec_1 = xxh3_vld1q_u64(input + i * 16); + uint64x2_t data_vec_2 = xxh3_vld1q_u64(input + (i + 1) * 16); + uint64x2_t key_vec_1 = xxh3_vld1q_u64(secret + i * 16); + uint64x2_t key_vec_2 = xxh3_vld1q_u64(secret + (i + 1) * 16); + + uint64x2_t data_swap_1 = vextq_u64(data_vec_1, data_vec_1, 1); + uint64x2_t data_swap_2 = vextq_u64(data_vec_2, data_vec_2, 1); + + uint64x2_t data_key_1 = veorq_u64(data_vec_1, key_vec_1); + uint64x2_t data_key_2 = veorq_u64(data_vec_2, key_vec_2); + + uint32x4x2_t unzipped = vuzpq_u32( + vreinterpretq_u32_u64(data_key_1), + vreinterpretq_u32_u64(data_key_2) + ); + uint32x4_t data_key_lo = unzipped.val[0]; + uint32x4_t data_key_hi = unzipped.val[1]; + + uint64x2_t sum_1 = xxh3_vmlal_low_u32(data_swap_1, data_key_lo, data_key_hi); + uint64x2_t sum_2 = xxh3_vmlal_high_u32(data_swap_2, data_key_lo, data_key_hi); + + /* typed loads and stores preserve scalar lane order on big-endian ARM */ + vst1q_u64(acc + i * 2, vaddq_u64(vld1q_u64(acc + i * 2), sum_1)); + vst1q_u64(acc + (i + 1) * 2, vaddq_u64(vld1q_u64(acc + (i + 1) * 2), sum_2)); + } +} + +static __always_inline void xxh3_scramble_neon(uint64_t* acc, const uint8_t* secret) +{ + const uint32x2_t prime_lo = vdup_n_u32(XXH_PRIME32_1); + const uint32x4_t prime_hi = vreinterpretq_u32_u64(vdupq_n_u64((uint64_t)XXH_PRIME32_1 << 32)); + + for (unsigned i = 0; i < 4; ++i) { + uint64x2_t acc_vec = vld1q_u64(acc + i * 2); + uint64x2_t shifted = vshrq_n_u64(acc_vec, 47); + uint64x2_t data_vec = veorq_u64(acc_vec, shifted); + + uint64x2_t key_vec = xxh3_vld1q_u64(secret + i * 16); + uint64x2_t data_key = veorq_u64(data_vec, key_vec); + + uint32x4_t prod_hi = vmulq_u32(vreinterpretq_u32_u64(data_key), prime_hi); + uint32x2_t data_key_lo = vmovn_u64(data_key); + vst1q_u64(acc + i * 2, vmlal_u32(vreinterpretq_u64_u32(prod_hi), data_key_lo, prime_lo)); + } +} + +static __always_inline void xxh3_long_core_neon(const void* input, size_t len, const uint8_t* secret, uint8_t* out) +{ + const uint8_t* p = input; + __attribute__((aligned(64))) uint64_t acc[XXH3_ACC_NB] = XXH3_INIT_ACC_VALUES; + size_t blocks = (len - 1) / XXH3_BLOCK_LEN; + + for (size_t b = 0; b < blocks; ++b) { + const uint8_t* block = p + b * XXH3_BLOCK_LEN; + for (size_t s = 0; s < XXH3_STRIPES_PER_BLOCK; ++s) + xxh3_acc512_neon(acc, block + s * XXH3_STRIPE_LEN, secret + s * XXH3_SECRET_CONSUME_RATE); + xxh3_scramble_neon(acc, secret + XXH3_SECRET_SIZE - XXH3_STRIPE_LEN); + } + + size_t stripes = ((len - 1) - blocks * XXH3_BLOCK_LEN) / XXH3_STRIPE_LEN; + const uint8_t* block = p + blocks * XXH3_BLOCK_LEN; + for (size_t s = 0; s < stripes; ++s) + xxh3_acc512_neon(acc, block + s * XXH3_STRIPE_LEN, secret + s * XXH3_SECRET_CONSUME_RATE); + + xxh3_acc512_neon(acc, p + len - XXH3_STRIPE_LEN, secret + XXH3_LAST_SECRET_OFFSET); + xxh3_finalize128(acc, secret, len, out); +} + +void xxh3_128_neon(const void* bytes, size_t len, const uint8_t* seed, uint8_t* out) +{ + __attribute__((aligned(64))) uint8_t custom[XXH3_SECRET_SIZE]; + const uint8_t* secret; + + secret = xxh3_select_secret(seed, custom); + + if (tommy_unlikely(len < XXH3_STRIPE_LEN)) + xxh3_short_core(bytes, len, secret, out); + else + xxh3_long_core_neon(bytes, len, secret, out); +} +#endif + +#if CONFIG_X86 +static XXH3_TARGET_SSE2 __always_inline void xxh3_acc512_sse2(uint64_t* acc, const uint8_t* input, const uint8_t* secret) +{ + __m128i* a = (__m128i*)(void*)acc; + + for (unsigned i = 0; i < 4; ++i) { + __m128i data = _mm_loadu_si128((const __m128i*)(const void*)(input + 16 * i)); + __m128i key = _mm_loadu_si128((const __m128i*)(const void*)(secret + 16 * i)); + __m128i mix = _mm_xor_si128(data, key); + __m128i hi32 = _mm_srli_epi64(mix, 32); + __m128i prod = _mm_mul_epu32(mix, hi32); + __m128i swap = _mm_shuffle_epi32(data, _MM_SHUFFLE(1, 0, 3, 2)); + a[i] = _mm_add_epi64(_mm_add_epi64(a[i], swap), prod); + } +} + +static XXH3_TARGET_SSE2 __always_inline void xxh3_scramble_sse2(uint64_t* acc, const uint8_t* secret) +{ + __m128i* a = (__m128i*)(void*)acc; + const __m128i prime = _mm_set1_epi32((int)XXH_PRIME32_1); + + for (unsigned i = 0; i < 4; ++i) { + __m128i x = a[i]; + __m128i key = _mm_loadu_si128((const __m128i*)(const void*)(secret + 16 * i)); + x = _mm_xor_si128(x, _mm_srli_epi64(x, 47)); + x = _mm_xor_si128(x, key); + + /* 64-bit x * 32-bit prime, modulo 2^64, using SSE2 32x32 multiplies. */ + __m128i lo = _mm_mul_epu32(x, prime); + __m128i hi = _mm_mul_epu32(_mm_srli_epi64(x, 32), prime); + a[i] = _mm_add_epi64(lo, _mm_slli_epi64(hi, 32)); + } +} + +static XXH3_TARGET_AVX2 __always_inline void xxh3_acc512_avx2(uint64_t* acc, const uint8_t* input, const uint8_t* secret) +{ + __m256i* a = (__m256i*)(void*)acc; + + for (unsigned i = 0; i < 2; ++i) { + __m256i data = _mm256_loadu_si256((const __m256i*)(const void*)(input + 32 * i)); + __m256i key = _mm256_loadu_si256((const __m256i*)(const void*)(secret + 32 * i)); + __m256i mix = _mm256_xor_si256(data, key); + __m256i hi32 = _mm256_srli_epi64(mix, 32); + __m256i prod = _mm256_mul_epu32(mix, hi32); + __m256i swap = _mm256_shuffle_epi32(data, _MM_SHUFFLE(1, 0, 3, 2)); + a[i] = _mm256_add_epi64(_mm256_add_epi64(a[i], swap), prod); + } +} + +static XXH3_TARGET_AVX2 __always_inline void xxh3_scramble_avx2(uint64_t* acc, const uint8_t* secret) +{ + __m256i* a = (__m256i*)(void*)acc; + const __m256i prime = _mm256_set1_epi32((int)XXH_PRIME32_1); + + for (unsigned i = 0; i < 2; ++i) { + __m256i x = a[i]; + __m256i key = _mm256_loadu_si256((const __m256i*)(const void*)(secret + 32 * i)); + x = _mm256_xor_si256(x, _mm256_srli_epi64(x, 47)); + x = _mm256_xor_si256(x, key); + + __m256i lo = _mm256_mul_epu32(x, prime); + __m256i hi = _mm256_mul_epu32(_mm256_srli_epi64(x, 32), prime); + a[i] = _mm256_add_epi64(lo, _mm256_slli_epi64(hi, 32)); + } +} + +static XXH3_TARGET_AVX512 __always_inline void xxh3_acc512_avx512(uint64_t* acc, const uint8_t* input, const uint8_t* secret) +{ + __m512i* a = (__m512i*)(void*)acc; + __m512i data = _mm512_loadu_si512((const void*)input); + __m512i key = _mm512_loadu_si512((const void*)secret); + __m512i mix = _mm512_xor_si512(data, key); + __m512i prod = _mm512_mul_epu32(mix, _mm512_srli_epi64(mix, 32)); + __m512i swap = _mm512_shuffle_epi32(data, _MM_SHUFFLE(1, 0, 3, 2)); + *a = _mm512_add_epi64(_mm512_add_epi64(*a, swap), prod); +} + +static XXH3_TARGET_AVX512 __always_inline void xxh3_scramble_avx512(uint64_t* acc, const uint8_t* secret) +{ + __m512i* a = (__m512i*)(void*)acc; + const __m512i prime = _mm512_set1_epi32((int)XXH_PRIME32_1); + __m512i x = *a; + __m512i key = _mm512_loadu_si512((const void*)secret); + __m512i shifted = _mm512_srli_epi64(x, 47); + + x = _mm512_ternarylogic_epi32(key, x, shifted, 0x96); + + __m512i lo = _mm512_mul_epu32(x, prime); + __m512i hi = _mm512_mul_epu32(_mm512_srli_epi64(x, 32), prime); + *a = _mm512_add_epi64(lo, _mm512_slli_epi64(hi, 32)); +} + +static XXH3_TARGET_SSE2 __always_inline void xxh3_long_core_sse2(const void* input, size_t len, const uint8_t* secret, uint8_t* out) +{ + const uint8_t* p = input; + __attribute__((aligned(64))) uint64_t acc[XXH3_ACC_NB] = XXH3_INIT_ACC_VALUES; + size_t blocks = (len - 1) / XXH3_BLOCK_LEN; + + for (size_t b = 0; b < blocks; ++b) { + const uint8_t* block = p + b * XXH3_BLOCK_LEN; + for (size_t s = 0; s < XXH3_STRIPES_PER_BLOCK; ++s) + xxh3_acc512_sse2(acc, block + s * XXH3_STRIPE_LEN, secret + s * XXH3_SECRET_CONSUME_RATE); + xxh3_scramble_sse2(acc, secret + XXH3_SECRET_SIZE - XXH3_STRIPE_LEN); + } + + size_t stripes = ((len - 1) - blocks * XXH3_BLOCK_LEN) / XXH3_STRIPE_LEN; + const uint8_t* block = p + blocks * XXH3_BLOCK_LEN; + for (size_t s = 0; s < stripes; ++s) + xxh3_acc512_sse2(acc, block + s * XXH3_STRIPE_LEN, secret + s * XXH3_SECRET_CONSUME_RATE); + + xxh3_acc512_sse2(acc, p + len - XXH3_STRIPE_LEN, secret + XXH3_LAST_SECRET_OFFSET); + xxh3_finalize128(acc, secret, len, out); +} + +static XXH3_TARGET_AVX2 __always_inline void xxh3_long_core_avx2(const void* input, size_t len, const uint8_t* secret, uint8_t* out) +{ + const uint8_t* p = input; + __attribute__((aligned(64))) uint64_t acc[XXH3_ACC_NB] = XXH3_INIT_ACC_VALUES; + size_t blocks = (len - 1) / XXH3_BLOCK_LEN; + + for (size_t b = 0; b < blocks; ++b) { + const uint8_t* block = p + b * XXH3_BLOCK_LEN; + for (size_t s = 0; s < XXH3_STRIPES_PER_BLOCK; ++s) + xxh3_acc512_avx2(acc, block + s * XXH3_STRIPE_LEN, secret + s * XXH3_SECRET_CONSUME_RATE); + xxh3_scramble_avx2(acc, secret + XXH3_SECRET_SIZE - XXH3_STRIPE_LEN); + } + + size_t stripes = ((len - 1) - blocks * XXH3_BLOCK_LEN) / XXH3_STRIPE_LEN; + const uint8_t* block = p + blocks * XXH3_BLOCK_LEN; + for (size_t s = 0; s < stripes; ++s) + xxh3_acc512_avx2(acc, block + s * XXH3_STRIPE_LEN, secret + s * XXH3_SECRET_CONSUME_RATE); + + xxh3_acc512_avx2(acc, p + len - XXH3_STRIPE_LEN, secret + XXH3_LAST_SECRET_OFFSET); + xxh3_finalize128(acc, secret, len, out); +} + +static XXH3_TARGET_AVX512 __always_inline void xxh3_long_core_avx512(const void* input, size_t len, const uint8_t* secret, uint8_t* out) +{ + const uint8_t* p = input; + __attribute__((aligned(64))) uint64_t acc[XXH3_ACC_NB] = XXH3_INIT_ACC_VALUES; + size_t blocks = (len - 1) / XXH3_BLOCK_LEN; + + for (size_t b = 0; b < blocks; ++b) { + const uint8_t* block = p + b * XXH3_BLOCK_LEN; + for (size_t s = 0; s < XXH3_STRIPES_PER_BLOCK; ++s) + xxh3_acc512_avx512(acc, block + s * XXH3_STRIPE_LEN, secret + s * XXH3_SECRET_CONSUME_RATE); + xxh3_scramble_avx512(acc, secret + XXH3_SECRET_SIZE - XXH3_STRIPE_LEN); + } + + size_t stripes = ((len - 1) - blocks * XXH3_BLOCK_LEN) / XXH3_STRIPE_LEN; + const uint8_t* block = p + blocks * XXH3_BLOCK_LEN; + for (size_t s = 0; s < stripes; ++s) + xxh3_acc512_avx512(acc, block + s * XXH3_STRIPE_LEN, secret + s * XXH3_SECRET_CONSUME_RATE); + + xxh3_acc512_avx512(acc, p + len - XXH3_STRIPE_LEN, secret + XXH3_LAST_SECRET_OFFSET); + xxh3_finalize128(acc, secret, len, out); +} + +XXH3_TARGET_SSE2 void xxh3_128_sse2(const void* bytes, size_t len, const uint8_t* seed, uint8_t* out) +{ + __attribute__((aligned(64))) uint8_t custom[XXH3_SECRET_SIZE]; + const uint8_t* secret; + + secret = xxh3_select_secret(seed, custom); + + if (tommy_unlikely(len < XXH3_STRIPE_LEN)) + xxh3_short_core(bytes, len, secret, out); + else + xxh3_long_core_sse2(bytes, len, secret, out); +} + +XXH3_TARGET_AVX2 void xxh3_128_avx2(const void* bytes, size_t len, const uint8_t* seed, uint8_t* out) +{ + __attribute__((aligned(64))) uint8_t custom[XXH3_SECRET_SIZE]; + const uint8_t* secret; + + secret = xxh3_select_secret(seed, custom); + + if (tommy_unlikely(len < XXH3_STRIPE_LEN)) + xxh3_short_core(bytes, len, secret, out); + else + xxh3_long_core_avx2(bytes, len, secret, out); +} + +XXH3_TARGET_AVX512 void xxh3_128_avx512(const void* bytes, size_t len, const uint8_t* seed, uint8_t* out) +{ + __attribute__((aligned(64))) uint8_t custom[XXH3_SECRET_SIZE]; + const uint8_t* secret; + + secret = xxh3_select_secret(seed, custom); + + if (tommy_unlikely(len < XXH3_STRIPE_LEN)) + xxh3_short_core(bytes, len, secret, out); + else + xxh3_long_core_avx512(bytes, len, secret, out); +} +#endif + diff --git a/cmdline/xxh3test.c b/cmdline/xxh3test.c new file mode 100644 index 00000000..00ab335a --- /dev/null +++ b/cmdline/xxh3test.c @@ -0,0 +1,270 @@ +{ "", 0, { 0xf2, 0xd1, 0xcc, 0xc9, 0x7e, 0x42, 0x26, 0x47, 0x97, 0xe5, 0xea, 0x5c, 0x23, 0xce, 0xe6, 0x03 }, { 0x9b, 0x79, 0xbc, 0x6a, 0x71, 0x60, 0xf5, 0xb9, 0x88, 0x93, 0xe0, 0xdc, 0x7a, 0xd1, 0xd4, 0x95 } }, +{ "a", 1, { 0x50, 0x43, 0x98, 0xb1, 0x85, 0x66, 0x5c, 0xa4, 0x18, 0x8f, 0x92, 0x53, 0x05, 0x6a, 0xa8, 0x7e }, { 0x5a, 0xaa, 0x9c, 0xab, 0xbe, 0xdd, 0xfe, 0x80, 0xdf, 0x27, 0x0f, 0x40, 0x38, 0xa7, 0x9a, 0x66 } }, +{ "abc", 3, { 0x3c, 0x4b, 0x75, 0x83, 0x85, 0x62, 0xda, 0x05, 0x33, 0x04, 0xf9, 0x0a, 0x5f, 0x6a, 0xa3, 0x69 }, { 0x8b, 0xad, 0x1c, 0xd8, 0x00, 0xa9, 0xb0, 0x6d, 0x66, 0x07, 0x37, 0x0b, 0xc1, 0x39, 0x9e, 0x3a } }, +{ "message digest", 14, { 0x1b, 0x95, 0x53, 0x1b, 0x84, 0xc9, 0xa7, 0xb2, 0x2c, 0xd0, 0x7a, 0x4d, 0xe9, 0xdd, 0xa6, 0x8c }, { 0x72, 0x4f, 0x4d, 0x46, 0xf6, 0xa6, 0x9e, 0xd5, 0xfc, 0x32, 0x67, 0xa9, 0x32, 0xcd, 0x31, 0xac } }, +{ "abcdefghijklmnopqrstuvwxyz", 26, { 0x4e, 0xea, 0x9f, 0x7d, 0xa5, 0x4d, 0xc5, 0xa9, 0x78, 0x50, 0x8f, 0xc0, 0x0d, 0x7f, 0xae, 0xb5 }, { 0x7b, 0xdb, 0xe8, 0x39, 0x55, 0x13, 0x1b, 0x34, 0xa7, 0x59, 0x11, 0x43, 0x9d, 0x23, 0xd9, 0x82 } }, +{ "ABCDEFGHIJKLMNOPQRSTUVWXYZabcdefghijklmnopqrstuvwxyz0123456789", 62, { 0x60, 0x91, 0x94, 0xf1, 0x49, 0xd7, 0x7e, 0xe7, 0xa0, 0xb9, 0x56, 0xcb, 0xb4, 0x89, 0xa9, 0x8e }, { 0x2c, 0xdc, 0x82, 0x06, 0x56, 0x9a, 0xe8, 0xcb, 0x9c, 0x20, 0x21, 0xc3, 0x49, 0x5c, 0xb8, 0xf4 } }, +{ "The quick brown fox jumps over the lazy dog", 43, { 0xe4, 0xab, 0x88, 0x27, 0x3c, 0x99, 0x7d, 0x4b, 0xd8, 0xc7, 0xe8, 0xf4, 0xb9, 0xbf, 0x6b, 0x50 }, { 0xba, 0x5b, 0x3e, 0x6b, 0x0e, 0x20, 0x55, 0xc0, 0x18, 0x05, 0xd6, 0x70, 0x8e, 0x5e, 0xdf, 0xfc } }, +{ "\x6e", 1, { 0xe8, 0x6c, 0x98, 0x93, 0xe0, 0xd8, 0xbd, 0xfb, 0x76, 0x8a, 0xcc, 0x2e, 0xaf, 0xf3, 0x33, 0xf5 }, { 0x17, 0xaf, 0x01, 0x8b, 0x0f, 0x70, 0x4b, 0xf6, 0x07, 0xaa, 0xa0, 0x20, 0x61, 0x41, 0x4e, 0xc1 } }, +{ "\x6d\xbe", 2, { 0x14, 0x65, 0x05, 0xa0, 0xcb, 0x4f, 0x0d, 0x35, 0x1b, 0x2e, 0xf8, 0xad, 0xf3, 0x6d, 0xdb, 0xa7 }, { 0x3d, 0xd4, 0xde, 0xba, 0x3a, 0x42, 0xae, 0x50, 0xa1, 0x14, 0xb0, 0x8b, 0xe8, 0x2a, 0xa6, 0x5e } }, +{ "\x48\x0c\xa2", 3, { 0x3c, 0x2d, 0x94, 0xbf, 0x81, 0x4d, 0x24, 0xb3, 0xe7, 0x15, 0x30, 0xb1, 0x09, 0xbd, 0xa9, 0x83 }, { 0x57, 0x41, 0xde, 0x16, 0x30, 0x0d, 0x6f, 0x2a, 0xad, 0xf9, 0x2c, 0xb1, 0x2a, 0x60, 0xe9, 0xe2 } }, +{ "\xc3\x33\x46\x33", 4, { 0x41, 0x11, 0x6b, 0x9f, 0x92, 0x18, 0xf9, 0x27, 0x31, 0x34, 0x05, 0x28, 0x04, 0xbe, 0x94, 0xe8 }, { 0x99, 0xc1, 0xf8, 0x7d, 0xf8, 0x6d, 0xb3, 0x6a, 0xe3, 0x55, 0x54, 0x92, 0x21, 0x91, 0xdd, 0x7d } }, +{ "\xba\x03\x22\x46\x9d", 5, { 0xe0, 0xb2, 0x89, 0x88, 0x61, 0x60, 0x8f, 0x4f, 0xb0, 0xec, 0x42, 0xcf, 0xb0, 0x2c, 0xb5, 0x76 }, { 0xa3, 0xfb, 0x87, 0xee, 0x38, 0xc3, 0x31, 0xd0, 0xa1, 0x70, 0x2f, 0xe4, 0xa8, 0xdf, 0x6b, 0x63 } }, +{ "\x09\xea\xfd\x5f\xb1\x78", 6, { 0x44, 0xfb, 0xd1, 0xdd, 0x73, 0xaf, 0x15, 0xe4, 0x83, 0xb7, 0xfa, 0xdb, 0x54, 0x3c, 0x17, 0x65 }, { 0x5b, 0x4b, 0x61, 0x08, 0xd7, 0xb6, 0x30, 0x2e, 0x69, 0x13, 0x64, 0x31, 0xcb, 0x23, 0x8f, 0x67 } }, +{ "\xc6\x0f\x76\x18\xbb\xd8\x6e", 7, { 0x35, 0x7d, 0x14, 0xc2, 0xa2, 0x41, 0x54, 0x55, 0x94, 0x2c, 0xc1, 0xe7, 0xcd, 0xab, 0xbe, 0x71 }, { 0xce, 0xf9, 0x4b, 0x19, 0xc8, 0xc6, 0x40, 0xa3, 0xba, 0x40, 0xce, 0xf6, 0xb7, 0xaf, 0xbf, 0x53 } }, +{ "\x0f\x1d\x57\x93\xbb\xc3\x48\xb9", 8, { 0x93, 0xb2, 0x24, 0xf7, 0x76, 0x9c, 0x82, 0x77, 0xe9, 0x30, 0x50, 0xbf, 0xef, 0x9b, 0x15, 0x56 }, { 0xb5, 0x26, 0x36, 0x82, 0x83, 0x66, 0x8d, 0x39, 0xa2, 0xc9, 0xba, 0x79, 0x2d, 0x88, 0x14, 0x31 } }, +{ "\x07\xa6\x2f\x92\x07\x58\x5b\xc1\xb7", 9, { 0x67, 0xf0, 0x1d, 0x7a, 0x1a, 0x66, 0x9f, 0x17, 0x41, 0x5b, 0xd7, 0xee, 0x13, 0xcc, 0x34, 0x2d }, { 0xf1, 0x18, 0x97, 0xa0, 0xf8, 0x1f, 0x1c, 0xe4, 0x5e, 0x75, 0xc9, 0xea, 0xb7, 0x9f, 0x12, 0xc3 } }, +{ "\x66\x4f\xc3\x6a\xce\x9f\x13\x1f\x07\xfb", 10, { 0x68, 0x81, 0x1e, 0xa4, 0x7e, 0x9d, 0x5c, 0xd1, 0x54, 0xb2, 0x50, 0x4b, 0xd8, 0x86, 0xfd, 0xea }, { 0x42, 0xdf, 0x7c, 0xf6, 0xa1, 0xc7, 0x8d, 0xe9, 0x85, 0xc2, 0x88, 0x01, 0x13, 0xd7, 0x7d, 0xbc } }, +{ "\xa4\x63\x5e\xa3\x40\x3d\x24\xbb\xb1\xeb\x35", 11, { 0xa9, 0x9e, 0xd6, 0xe1, 0xc9, 0x09, 0xca, 0xa6, 0x9e, 0x0d, 0x61, 0x56, 0x39, 0xe6, 0xb3, 0xe2 }, { 0xbd, 0x69, 0xe4, 0x3e, 0x45, 0x95, 0x9e, 0x2a, 0x02, 0x5e, 0x66, 0x60, 0xea, 0x09, 0x8f, 0xb9 } }, +{ "\x4e\x45\xa8\xf7\x9a\xa4\x17\x8b\xac\x8b\x65\xa3", 12, { 0x3e, 0xd6, 0x3b, 0x7e, 0x4e, 0x89, 0xd2, 0xe7, 0x45, 0x2f, 0x69, 0xd7, 0x46, 0x96, 0xda, 0xa7 }, { 0x7e, 0xbb, 0x6c, 0x82, 0x23, 0xd5, 0xfa, 0x75, 0x3a, 0xd9, 0x68, 0x72, 0xaf, 0xa5, 0x10, 0x1e } }, +{ "\x3d\xa3\x12\xc8\xbc\xe4\x3f\x47\x28\x24\xf2\x08\x41", 13, { 0x42, 0x58, 0x39, 0x3c, 0xdd, 0x4c, 0x1d, 0xc7, 0x12, 0x83, 0x4d, 0x6e, 0xa6, 0xa4, 0xf4, 0x7d }, { 0xc5, 0x06, 0x58, 0xd4, 0x82, 0x80, 0xff, 0x66, 0x0b, 0x66, 0xeb, 0x50, 0x9f, 0xae, 0x7d, 0x28 } }, +{ "\x08\x7d\xaa\x9d\xcf\xfb\x77\x52\xca\x1a\x3a\xec\x9a\x43", 14, { 0xa6, 0x6f, 0xe5, 0x98, 0x46, 0x60, 0x87, 0x6f, 0x7a, 0x16, 0xb7, 0x83, 0xc6, 0x92, 0x6d, 0xc9 }, { 0x76, 0x43, 0xb9, 0xe3, 0x7f, 0x4f, 0x51, 0x80, 0x31, 0x21, 0x3c, 0x85, 0x5d, 0xd8, 0xb3, 0x01 } }, +{ "\x2d\x30\xe3\x52\x14\x7c\xde\xaa\x7d\x58\xbd\x58\x46\x2a\x6a", 15, { 0x72, 0x30, 0xea, 0xd0, 0xcd, 0x3e, 0xed, 0x63, 0x7d, 0x08, 0xa2, 0x69, 0x85, 0xa0, 0x61, 0xb5 }, { 0xc7, 0xeb, 0x8c, 0xa9, 0xde, 0x2e, 0x04, 0x11, 0xb1, 0xd3, 0x48, 0xb3, 0xae, 0x9a, 0xa1, 0xaa } }, +{ "\xe5\xbd\xf1\x7d\xa2\x37\xe9\x42\x21\xa8\x4f\x3d\xa4\x1e\xfc\x64", 16, { 0xae, 0x86, 0x5c, 0xf9, 0xf4, 0x00, 0x91, 0xf5, 0xe0, 0x75, 0x4c, 0x92, 0xea, 0x66, 0x00, 0x95 }, { 0x8c, 0xa8, 0x04, 0x34, 0x0b, 0xd6, 0x45, 0xc4, 0x5c, 0x76, 0xa4, 0x99, 0x28, 0xd3, 0xd2, 0x8e } }, +{ "\x5d\xc2\x34\x44\xd3\x55\x1e\x2a\x87\xa9\xa8\x2f\x21\xaa\x25\x2d\x47", 17, { 0x17, 0xde, 0x4c, 0xca, 0xc8, 0xe9, 0xe8, 0x12, 0x36, 0xe6, 0x6d, 0x6c, 0x8b, 0x39, 0xfc, 0xc1 }, { 0xda, 0x00, 0xb2, 0xf2, 0x19, 0x37, 0xbd, 0xd5, 0x1f, 0x5a, 0xd2, 0x2d, 0xd2, 0xb3, 0x46, 0x31 } }, +{ "\xa3\xc0\xd8\x85\x8e\xee\x9d\x2a\x0c\x1a\x5b\x02\x28\xbc\x00\xc3\xff\xa1", 18, { 0xb5, 0xd7, 0x56, 0x6f, 0xf8, 0xf3, 0x99, 0xb6, 0x95, 0x95, 0xeb, 0x87, 0x47, 0x85, 0x14, 0x25 }, { 0x6f, 0x7b, 0xf1, 0x8d, 0x4a, 0xb7, 0x3d, 0xdf, 0x32, 0x02, 0xa1, 0xa8, 0xfd, 0x57, 0x11, 0xa5 } }, +{ "\x82\xe3\x22\x7a\xae\x8c\x3a\xbb\x12\x52\x3f\x04\x96\xaf\xa3\xbd\xe8\xa1\x62", 19, { 0x27, 0xd8, 0xb0, 0x99, 0x90, 0x80, 0x66, 0x4f, 0xa2, 0xed, 0x29, 0x41, 0xcb, 0xd2, 0xdd, 0xf5 }, { 0xa0, 0x42, 0xfb, 0xc8, 0x8c, 0x45, 0xb0, 0x34, 0xf3, 0x6b, 0x17, 0x59, 0x24, 0x8d, 0xd4, 0x0b } }, +{ "\xbf\xf8\x9f\x20\x51\xf0\x0d\x55\x14\xa7\x72\x9d\xf2\x82\xa7\x91\x88\x08\x20\x75", 20, { 0x56, 0x65, 0x4e, 0xac, 0xa6, 0x72, 0x3f, 0xd7, 0x47, 0x6b, 0x5d, 0xa9, 0x41, 0xe9, 0xa8, 0x9d }, { 0x11, 0x0e, 0xd8, 0x07, 0xb4, 0xc0, 0x97, 0x69, 0xa3, 0x23, 0x28, 0xf4, 0x84, 0xf4, 0xf8, 0x40 } }, +{ "\x9d\x54\x0c\xe4\x4d\x04\xd7\x96\xbc\x18\x04\xfc\x9d\x31\x6c\xe7\x66\xaf\x7c\xdb\x84", 21, { 0xd6, 0xb6, 0xbb, 0x78, 0xa0, 0x37, 0x30, 0xfe, 0x1d, 0xf8, 0xb0, 0x9b, 0x7c, 0x81, 0x1b, 0x73 }, { 0xbe, 0x82, 0xd5, 0xa6, 0x72, 0x40, 0xa6, 0x78, 0x6c, 0x53, 0xd2, 0xe6, 0x1f, 0x33, 0x99, 0xf9 } }, +{ "\x77\xf6\x2d\xc6\x30\x75\x1b\x50\x4a\xe8\x9b\xa6\xa4\x51\xd3\x87\x4d\x25\xa6\xdb\x1e\xf7", 22, { 0xbd, 0x77, 0x9c, 0x4b, 0x23, 0x30, 0x9a, 0x7e, 0x24, 0x12, 0x22, 0x33, 0x51, 0x21, 0xa0, 0x6a }, { 0xfb, 0x21, 0x9a, 0x18, 0xba, 0xf0, 0x33, 0x97, 0x3c, 0xd3, 0x49, 0xa1, 0x1f, 0xee, 0x3d, 0x3c } }, +{ "\xde\x39\x85\x48\xe0\x10\x54\x9c\x31\x2f\xf2\x77\xff\xcf\x56\x6d\xc5\x17\x55\x1c\x64\x1e\x24", 23, { 0x31, 0xe3, 0xd1, 0x36, 0x76, 0xd3, 0x50, 0xa0, 0x3b, 0xcd, 0x0d, 0xc4, 0x32, 0xc3, 0x92, 0x9e }, { 0xf5, 0x3b, 0x9c, 0xa2, 0xdc, 0xd9, 0xdb, 0x71, 0x10, 0x15, 0x6e, 0x33, 0x8d, 0x16, 0x75, 0x02 } }, +{ "\xd8\x80\xfa\x2c\xdb\x4c\x8a\xd0\x4a\x50\x29\x87\x9e\xb0\x3a\x72\xc7\x49\x83\x50\x7f\xb0\x41\x68", 24, { 0x69, 0x6a, 0x09, 0xa3, 0x82, 0x0e, 0x73, 0x74, 0x0d, 0x63, 0xc7, 0x44, 0xb7, 0x87, 0x6c, 0x5c }, { 0x84, 0x7b, 0x36, 0x9e, 0x75, 0xe1, 0xd7, 0xbc, 0xa1, 0xd0, 0xd1, 0xef, 0x48, 0x1b, 0x45, 0xac } }, +{ "\x73\xec\x31\x8f\xd3\xbf\x7a\x06\xfe\x5f\x7e\x90\x6f\xb1\xcc\x76\x10\x5a\x39\x9d\xa2\xcc\x69\x40\x48", 25, { 0x76, 0xd7, 0xc8, 0x52, 0x3b, 0x57, 0xa2, 0x73, 0xf5, 0x1d, 0x43, 0x09, 0xb6, 0xe1, 0xda, 0x50 }, { 0x9f, 0x5a, 0x37, 0x09, 0x36, 0xcc, 0x8d, 0x13, 0x81, 0x95, 0x43, 0x21, 0x7a, 0x3f, 0x11, 0xe2 } }, +{ "\xef\xe2\xe7\xbf\x91\x34\x7f\xc8\xdc\x86\x3b\xf5\xd1\x84\x1b\x2d\xcd\x7b\x91\x5c\x20\xab\xde\x79\x70\x3a", 26, { 0x7c, 0xa0, 0xf4, 0x9c, 0x2b, 0xc5, 0x3e, 0x95, 0x3a, 0xcd, 0x32, 0x32, 0x5a, 0xda, 0xb4, 0xca }, { 0xc5, 0x34, 0xef, 0x09, 0x50, 0x54, 0x34, 0xe7, 0x95, 0x1d, 0xff, 0x3b, 0x54, 0x28, 0xcc, 0xd1 } }, +{ "\x78\x6c\xfe\x5a\xd7\xf3\x8d\xe3\xc1\xf5\xf4\x8c\x60\x5b\x4d\xc3\x8e\x09\x70\x8a\x20\x91\xde\x6b\xcb\x2a\xae", 27, { 0x82, 0x7b, 0xcd, 0xe5, 0x4a, 0x51, 0x13, 0x94, 0x6d, 0x47, 0xa5, 0x4c, 0x23, 0xc5, 0x4f, 0x7d }, { 0xaa, 0xa1, 0x7b, 0x7d, 0xfa, 0x8d, 0xd5, 0x9e, 0xf7, 0xc1, 0x7a, 0x48, 0x9e, 0x4b, 0xa4, 0x3c } }, +{ "\x98\xdd\x6a\xc6\xc0\x8c\xef\x21\x93\x7b\x27\xa8\x0d\xd8\x86\x36\x65\xd2\xd2\x78\xc4\xdb\x23\x45\xdf\xf2\x92\x98", 28, { 0x86, 0x32, 0x88, 0xc6, 0x8f, 0x72, 0x70, 0xed, 0x62, 0x3f, 0xa6, 0x36, 0x80, 0x97, 0x3d, 0x87 }, { 0x13, 0x87, 0xc1, 0x13, 0x71, 0xb6, 0xe1, 0xd6, 0xc4, 0x3a, 0xe7, 0x3c, 0x7b, 0xb8, 0x99, 0x66 } }, +{ "\xff\x50\xe7\xdb\xff\xc3\x6d\xc8\xf0\x49\xb3\x27\xf0\x8e\x6f\x47\x79\xd1\x30\xe1\x32\xb3\x7e\x1c\xf9\x9d\x0f\x44\xaf", 29, { 0x27, 0x57, 0xcb, 0xa2, 0xdb, 0x08, 0x8e, 0x79, 0x47, 0xe5, 0x29, 0xea, 0xb4, 0x9d, 0x4f, 0xe7 }, { 0xdd, 0x95, 0x50, 0x7d, 0xc3, 0x69, 0x34, 0x6d, 0x33, 0x90, 0xb6, 0x9f, 0xf1, 0xc8, 0x9f, 0xd4 } }, +{ "\x77\x2b\x84\xa4\xa5\x9e\x73\xdc\x10\x6f\xa0\xa7\xe8\x78\x70\x96\x08\x96\x6a\x3c\xae\x2d\x43\xcd\xb2\x6d\x5f\xb8\x4a\x59", 30, { 0xb8, 0x26, 0x1d, 0xd2, 0xf2, 0xe0, 0x38, 0x57, 0x12, 0x25, 0x38, 0x2c, 0x12, 0x38, 0x38, 0x9d }, { 0xf5, 0x09, 0x42, 0x73, 0x39, 0x7b, 0x07, 0xfb, 0x6f, 0x48, 0x30, 0x1f, 0x86, 0x77, 0x66, 0xba } }, +{ "\xb7\xd1\x4f\x5d\x91\x79\x06\xc0\x8a\x00\xd1\x25\xd4\x27\x37\xd5\x5b\xbc\x1f\x48\x2f\x0c\x56\x97\x23\x7a\xa8\xe8\xdb\x0d\xb5", 31, { 0xa8, 0x89, 0xa3, 0xe9, 0x55, 0x68, 0x4c, 0xf4, 0xf8, 0x20, 0x26, 0x95, 0xf4, 0x9b, 0xa8, 0x9f }, { 0xdc, 0x62, 0xe3, 0x7d, 0xb8, 0x49, 0xbf, 0x79, 0x41, 0x21, 0x63, 0x7e, 0xde, 0x85, 0x86, 0x3f } }, +{ "\xf8\x33\xe3\xaf\xe2\xd1\xec\x94\xbb\xab\x79\xd0\x5d\x23\x32\x04\x71\x2e\x07\xc6\xc8\x3a\x98\x5d\x95\xfd\xaf\x62\xab\x00\x8e\xd8", 32, { 0x49, 0x80, 0xfb, 0xa0, 0xda, 0x32, 0x24, 0xab, 0x52, 0x45, 0x03, 0xb5, 0x74, 0xb6, 0xba, 0xca }, { 0x19, 0x96, 0x41, 0xfa, 0x7b, 0x04, 0x0e, 0xe0, 0x07, 0x11, 0x53, 0x88, 0xbb, 0x9a, 0x63, 0x76 } }, +{ "\xac\x09\x0c\xde\x50\x2b\x8f\x22\x33\x5c\x78\x70\x68\xd3\xc5\xee\x32\xba\x5a\xef\x89\xa4\x19\x6e\x35\xd1\xee\x9e\x07\x0c\xa6\x0b\xe8", 33, { 0x29, 0x03, 0x49, 0xfc, 0xa9, 0xcd, 0x61, 0x25, 0xb7, 0x4c, 0x47, 0x48, 0x12, 0x4d, 0x92, 0x17 }, { 0x92, 0x71, 0x70, 0x92, 0xd6, 0x05, 0xae, 0x0e, 0x15, 0xd8, 0xb4, 0x63, 0x9b, 0x01, 0x40, 0xc0 } }, +{ "\xe0\x40\x99\x90\x3b\x53\x17\x19\x5c\x98\x69\xdf\x3c\x4f\xed\x81\x38\xf9\x29\x15\xd4\x40\x20\x1d\xbe\x57\x83\xc6\x02\xb3\xde\x20\x5c\x11", 34, { 0x45, 0x3e, 0xd4, 0x82, 0x84, 0x03, 0x0f, 0xd6, 0x29, 0x80, 0x3b, 0x45, 0xe3, 0x34, 0xb2, 0xa8 }, { 0x9f, 0xdb, 0x2d, 0x43, 0x42, 0x12, 0xe6, 0x89, 0x47, 0x38, 0x32, 0x0e, 0xd9, 0x6d, 0x32, 0xf7 } }, +{ "\xcf\x9f\x21\x4a\xfa\x25\x1e\x51\x52\xaf\x6f\x76\x8b\x2f\x5f\x7d\xa1\x99\x96\x74\xba\x0f\x51\x6a\x5c\x9d\x98\x97\x55\x39\xf0\x4f\xe8\xa7\xbb", 35, { 0xc4, 0x8a, 0x0b, 0x4a, 0x99, 0xc4, 0x0e, 0xce, 0xec, 0x3d, 0x59, 0xa9, 0x50, 0x93, 0xb1, 0x8d }, { 0x14, 0x04, 0x3a, 0x5e, 0x93, 0x57, 0x51, 0x5a, 0xd8, 0xbd, 0xbb, 0xac, 0x28, 0xe3, 0x71, 0xbd } }, +{ "\x7b\xa3\x9c\x59\x35\x62\x2e\xee\x8e\x77\xb3\xdf\xbd\x04\xe0\x31\x08\x75\x14\x84\x2b\xb8\x28\xba\xcb\xcf\x83\xb7\xe3\x74\x77\x59\x8b\xd6\xdb\xb2", 36, { 0xb4, 0xe5, 0xdb, 0x24, 0x6f, 0x52, 0x5b, 0x5a, 0xd7, 0xf7, 0x2e, 0x68, 0xee, 0x2c, 0x1e, 0x3e }, { 0xea, 0xe6, 0x61, 0xf1, 0xe5, 0xf1, 0x3b, 0xa0, 0x97, 0x4e, 0x74, 0x42, 0x67, 0x22, 0x76, 0xf2 } }, +{ "\x34\xf6\x69\x19\x65\x94\xa7\x21\x56\x96\x9d\x8a\x10\x31\x15\x27\x0a\xe8\xd6\x77\x6c\xe6\x76\xfa\xc5\xc8\xdf\x41\x73\x95\x7b\x19\xd7\xbc\x95\x29\x39", 37, { 0xa4, 0x2f, 0xe4, 0xb3, 0x54, 0x4c, 0x32, 0x22, 0x42, 0xe7, 0xbc, 0xdd, 0x7e, 0x17, 0xed, 0x1c }, { 0xf0, 0xaa, 0x95, 0x73, 0x58, 0x93, 0xc1, 0xf8, 0x6c, 0x39, 0x4e, 0x38, 0xe0, 0x92, 0x2b, 0xd7 } }, +{ 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}, { 0x04, 0x97, 0x62, 0x37, 0x31, 0x84, 0x8d, 0x07, 0x5a, 0xfd, 0x12, 0x4a, 0xbb, 0xb2, 0x2c, 0xdb } }, +{ "\x31\x41\xd9\x02\x19\x1f\x18\xcd\x53\x19\x7d\x9b\xb6\x2a\x52\x8a\x19\xc3\x61\x1d\xea\x0b\x91\xff\x55\xa1\x85\x78\x63\x34\xa8\xc0\x06\x6d\x39\xd0\xd2\xe1\xd3\xeb\x3d", 41, { 0x9d, 0x34, 0xf1, 0x90, 0x30, 0xbb, 0x03, 0x0e, 0x65, 0xa6, 0xc9, 0x42, 0xaf, 0x01, 0xf2, 0xbb }, { 0xa3, 0x0a, 0xe4, 0x5c, 0x52, 0x36, 0xc3, 0x8c, 0x72, 0x62, 0x25, 0xf0, 0x97, 0x70, 0x0e, 0xb7 } }, +{ "\x1c\xc6\x89\xdd\xd1\x8a\x01\x75\xf4\x81\x86\xe8\x77\xa0\x5e\x2f\xc3\xd1\x31\x73\x27\x1a\x91\x6d\x59\xc0\xa1\xeb\x1a\x00\x6c\x98\xd5\xa9\xad\x03\xfd\xe4\xb4\x29\x73\xe6", 42, { 0xc9, 0xc4, 0xc3, 0xb4, 0xb4, 0x68, 0x02, 0x4c, 0xc1, 0xd9, 0xe0, 0x1e, 0x60, 0xf7, 0xe8, 0x5a }, { 0xbc, 0xaa, 0x29, 0x46, 0x7a, 0x19, 0xd9, 0x02, 0x31, 0xd8, 0x52, 0xbc, 0x82, 0x5b, 0x3a, 0x0d } }, +{ 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0x17, 0x45, 0x1e, 0xa5, 0xf7, 0x73, 0x13, 0xed, 0x23, 0x34, 0xe2 } }, +{ "\x66\x56\x81\x5c\xdc\xad\x16\x68\x5f\x91\xe0\xd2\x7a\xbc\x16\x77\x52\x2e\x75\x03\x04\x2f\x03\xa8\x6f\x7a\x8f\x14\x10\xbe\xf8\xac\x81\x91\x8c\xcd\xc7\xfe\x71\x36\x30\xaa\xa5\x3f\x8c\x2d\x1a\xe3\x70\x52\xb3\x3f\x8d\x5b\xdd\xbf\xbd\x4a\x6e\xdf\x96\xa9\x2d\xdd\x4c\x2b\x34\x3f\xa3\x2f\x48\xea\xe8\xf5\xfa\x9a\x20\xda", 78, { 0x0c, 0xe7, 0xfd, 0xdf, 0xa1, 0x93, 0x0b, 0xe7, 0xfd, 0x9a, 0x18, 0x85, 0xfd, 0xd6, 0x98, 0x94 }, { 0x50, 0x0d, 0xa2, 0xa2, 0xa3, 0xd4, 0xb4, 0x0d, 0x33, 0xb9, 0x82, 0x7e, 0x73, 0x14, 0xac, 0x93 } }, +{ "\xd0\x5b\xe8\x4a\x87\x67\x90\xb6\x4c\xdd\x6c\x22\x98\x73\x14\x72\xfe\xe4\xdd\x7d\xd2\x8c\x18\xda\x5d\x96\x19\x7f\x18\xdf\x6a\x85\x2d\x86\xfd\x7e\x7c\xa9\x0a\x4b\xa3\x49\xcd\xe1\x97\xba\x17\xfe\xbd\xde\x10\x5d\xde\x77\xe1\xfc\xd0\x0d\xce\x67\x42\xc6\xf3\xe2\x26\xd0\x6d\xa0\x4f\x9d\xc6\x7c\x36\x62\xb9\xbe\xcb\x5f\x48", 79, { 0xbb, 0xd2, 0x20, 0x47, 0x26, 0x1d, 0x8b, 0xe4, 0x02, 0x38, 0xc5, 0x98, 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86, { 0x5c, 0x6c, 0xfd, 0x87, 0x96, 0xa6, 0xf0, 0x56, 0xb9, 0xd7, 0xf9, 0x32, 0xa6, 0x00, 0x9d, 0x15 }, { 0x41, 0x49, 0xaf, 0xf5, 0x9e, 0x26, 0x53, 0x11, 0xb3, 0x23, 0x61, 0x1f, 0xd3, 0x3b, 0x29, 0xcc } }, +{ "\x8a\x1a\x6e\xa2\x5c\x72\x8d\xeb\xec\x43\x30\x44\xfa\xb1\x90\xb3\x17\x08\x9f\x56\xbf\xae\x60\xdc\x75\xe3\x60\xee\x2d\x76\x90\x2c\x7b\x88\x07\xab\x23\x78\xb8\x91\xbd\x82\x1a\x4e\x23\x75\xe0\xd2\x9c\x63\x16\xa5\xe0\x80\xc3\xa3\xcf\x9b\x3c\x76\xd5\x0a\x6e\xbb\xc6\x1d\x4a\x4a\x0b\x91\x63\xae\xe6\x72\xa7\xb6\x0d\xad\xc3\x08\x59\xc9\x77\xc2\x90\x82\x14", 87, { 0xf5, 0xbd, 0xc8, 0x1e, 0xa3, 0xf8, 0xa4, 0x8c, 0x7f, 0xc7, 0x9d, 0x41, 0x7b, 0x57, 0x4f, 0x1b }, { 0xef, 0x90, 0x9b, 0x10, 0x8d, 0xbf, 0x30, 0x34, 0xbe, 0x70, 0xfe, 0x82, 0xea, 0xb2, 0x37, 0x25 } }, +{ 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0xeb, 0xec, 0xe0, 0xa8, 0xcd }, { 0xb6, 0xc5, 0x79, 0xfd, 0x9e, 0x68, 0xeb, 0x72, 0x0f, 0xeb, 0x7d, 0x51, 0x0d, 0x4b, 0xfa, 0xc2 } }, +{ "\x38\xda\x7f\x9f\x3a\x41\x60\x66\xc5\x1a\xcc\xa1\xe9\xdf\xda\x2a\x0c\x6b\xf0\x35\xe9\x4b\x65\x5d\xff\x9c\xdc\x49\xbf\x03\x50\xc5\xee\xaf\xa2\xce\x9d\x6c\xe2\x97\x1e\xc3\x9f\xd1\xbf\xf7\x3a\x57\x43\x42\x68\xe5\xc1\x28\xf9\xae\x2a\x88\xdf\x60\x74\x87\x35\x0e\x13\x67\x61\x2d\x89\xa8\x15\xcc\x96\x19\xa4\xaa\x49\xa4\xc5\x4b\xea\xa9\xf1\x6f\x58\xeb\x7b\xc1\x46\x96", 90, { 0x93, 0xd7, 0xaf, 0xa6, 0x60, 0x6f, 0x4d, 0x0d, 0x72, 0x66, 0xc8, 0x22, 0x03, 0x2f, 0x99, 0x0c }, { 0x47, 0xb8, 0xeb, 0xa8, 0x63, 0x3b, 0x2a, 0xc6, 0xe9, 0xca, 0xff, 0x1a, 0x71, 0x96, 0x1e, 0x98 } }, +{ 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0x38, 0x0d, 0x5a, 0xd4, 0x9d, 0xff, 0xcf, 0x44, 0x22 }, { 0x2c, 0xad, 0xac, 0xaf, 0x28, 0xc6, 0x75, 0xd5, 0xde, 0xcd, 0xf2, 0x83, 0xe2, 0xe5, 0x58, 0xce } }, +{ "\x0a\x9d\x78\xdd\xba\x59\xf9\x69\x8c\x91\xbf\xf4\x05\x56\x9c\xba\xae\x2e\x1e\x5e\x07\x0b\x9a\x6e\x5b\x0d\xb3\x32\x1b\x82\x73\x0e\xc0\x3b\xdb\xa5\x2b\x11\x54\xd1\x72\x06\xa0\x22\x95\x6a\x76\x1d\xad\xb0\x92\x4d\xd6\x01\xc0\xb2\x63\x93\xdc\x0a\xde\x92\x27\xd9\x5e\xc3\x1b\x53\x40\xcc\x8b\x62\xa2\xda\x9b\x37\x99\x7b\x3f\x86\x83\x30\xc0\xe4\x3f\x8e\x49\xdd\x36\x15\x91\xa7\x75", 93, { 0x6d, 0xa6, 0x6f, 0xba, 0xb8, 0xfa, 0x1d, 0x4d, 0xc0, 0x98, 0x68, 0x3a, 0x2f, 0xc5, 0x4a, 0x76 }, { 0x58, 0x10, 0x82, 0x0f, 0x0d, 0x15, 0xff, 0x9a, 0x1d, 0x26, 0x3d, 0x1e, 0x29, 0x41, 0xfe, 0x69 } }, +{ "\xd3\x75\xf8\xb6\xb8\xd0\x54\xf6\xc1\x3e\x7e\xe7\x4a\x82\x65\x61\x67\x2c\xf4\x4a\x65\x86\x9d\x91\xf2\x65\x29\x58\x07\x43\x33\x76\xdc\x7b\x26\x28\xe9\x3d\x64\x15\x95\x68\x13\x4e\x7b\x7d\x2b\x3e\x55\x18\x99\xa7\xc3\xac\xfb\x0d\x42\x0d\xb6\xe3\x15\xa2\x59\xc5\x5f\xd0\x09\x65\x8f\xf1\xfa\xe9\x57\xc7\x81\x63\xcd\xd2\xcb\x35\x78\xcf\x6f\x9e\xc0\xd5\x09\x8e\x7f\x41\xe0\xdd\x77\x04", 94, { 0x9b, 0xa4, 0x1c, 0x36, 0x75, 0xa9, 0x36, 0xfe, 0x07, 0xab, 0x6a, 0x40, 0x95, 0xd4, 0x4f, 0xfa }, { 0x19, 0x8b, 0x81, 0x62, 0xaa, 0xee, 0x96, 0x9d, 0xd6, 0x36, 0x59, 0x1c, 0x33, 0x50, 0xe2, 0x9c } }, +{ "\x89\xa7\x8e\x6c\x00\x5a\xcc\xd9\x98\x8c\xe7\x8b\x5a\xbc\xb0\x0a\x50\xb7\x4c\xb5\xd1\x9a\x6f\x07\x1f\x71\x5c\x2d\x81\xf0\xef\x4f\x22\x0e\xd3\x85\x09\xed\x86\x5d\xff\xc0\x48\x68\x7c\x4a\x05\x89\x23\xc2\x8a\x67\xe3\x09\x8e\x21\x7e\xbd\xe8\x28\x9d\xc9\xf7\x4d\xb1\x25\xf8\x7e\xd7\xed\x98\xa1\x59\xd3\x2a\x80\xbb\xdc\xab\x28\x27\xaa\xa1\xbc\xa8\x0f\x1b\x5c\xbd\xfd\x5c\x78\xe0\xea\xea", 95, { 0xbd, 0xb8, 0x64, 0x36, 0x1a, 0xa4, 0x79, 0xcd, 0xf9, 0xb7, 0x0f, 0xb6, 0x97, 0x30, 0xb0, 0xdb }, { 0x85, 0x2f, 0x60, 0x62, 0x4c, 0x7a, 0xed, 0x1d, 0xaf, 0x72, 0xc6, 0xb5, 0x12, 0x42, 0x5e, 0xe4 } }, +{ "\x5a\x9b\xcf\xcb\x65\x9f\x54\x18\x69\x1b\xb3\xc4\x0e\xc7\xf5\xbb\x15\xb6\x93\xc0\xb3\x8a\x14\xf8\xdd\x6b\x53\x72\xfe\xc8\x61\x4e\xd2\xf2\xe2\xd8\xab\x5c\xcf\x1b\x99\xdf\xba\x4a\x89\x51\x5a\x56\xe0\x78\x3e\x90\x42\x0a\x44\xde\xba\xb6\x59\xbe\x72\x0b\xc7\xaf\x8d\x1c\xf6\x31\x6d\x42\x32\x71\x29\xef\x08\xbb\x7d\x41\x40\xf1\x74\xcd\x0c\xbf\xaf\x29\x54\x03\x6f\xc6\xaa\xc5\x94\x0e\xb6\xfc", 96, { 0x93, 0xef, 0x5e, 0x68, 0x9e, 0x5b, 0x68, 0xd3, 0xf3, 0x4a, 0x37, 0xee, 0x80, 0x31, 0x05, 0x20 }, { 0x13, 0x75, 0xfc, 0x6e, 0x10, 0xcc, 0x71, 0xd3, 0x8b, 0xca, 0x6b, 0x10, 0xab, 0xf9, 0x1b, 0x73 } }, +{ "\x25\x8b\x87\x6f\xc7\x2f\x36\xe6\xee\x32\x0a\x8b\x1a\xd7\xbb\x03\x94\x89\xe5\x3b\x07\xef\x7c\x59\x76\xb8\x95\xe9\x85\x6e\x91\x44\x56\x4d\xbd\xc0\xac\x3e\x58\x70\x69\xb8\xff\x21\x9d\x96\x1e\x1c\x23\xc1\xf8\x3e\x30\xbf\x92\x1f\x13\x73\x2b\xb4\xce\xfa\x01\xfe\x5b\x53\x71\xf4\xda\x2e\xf4\x62\xe1\x7c\xc9\x5c\xa6\x19\x62\x3c\xfd\xb6\x10\x5f\x9e\x98\xc2\x58\x2e\x44\x54\x0a\xfe\x68\x2d\x0c\x69", 97, { 0x7c, 0x27, 0x76, 0xab, 0xc4, 0x7e, 0x46, 0x4a, 0x47, 0xf2, 0x6e, 0xb1, 0x74, 0x7f, 0x92, 0x9a }, { 0x97, 0x0b, 0x2f, 0x24, 0xbc, 0xa4, 0x81, 0x55, 0xbf, 0x18, 0xb2, 0xc9, 0x33, 0x42, 0x85, 0xd8 } }, +{ "\x49\xf2\x38\x11\xe5\x36\x26\x46\xcc\xb4\xf3\xc9\x5e\x88\x9e\x1e\xf4\x05\xde\xda\xa2\x01\x69\x33\xe2\x2d\xae\xe4\x9e\xf9\x05\xff\x22\x6c\x33\xa9\x0e\xf0\x8a\x5d\x03\xc1\xbd\x27\x0e\x6a\x04\xe7\x22\x20\x08\x9a\x6a\xfb\x7e\x56\xb6\x92\x4f\x4a\x4a\x5e\xe5\x67\x14\x1d\xa7\xb3\x2a\xc9\x2f\x3a\xbc\x7e\xc1\x06\xd6\xb4\xb2\xc5\xa3\x58\x9f\xa5\xe4\x12\xd9\xbe\x54\x88\xd7\x67\x03\xc7\xb0\x14\x87\xb3", 98, { 0x3d, 0x5f, 0xb8, 0xda, 0x21, 0xd1, 0x98, 0x42, 0x4e, 0xe8, 0x3f, 0x75, 0xea, 0x57, 0x0d, 0x09 }, { 0x98, 0x6d, 0x42, 0x3a, 0x45, 0x5d, 0x8a, 0x25, 0x23, 0x55, 0xe5, 0x87, 0x13, 0xf4, 0xb2, 0xa6 } }, +{ "\x6e\x08\x0b\x18\x05\x67\x52\xc9\x83\xe9\x8c\x22\x92\x18\xd3\x4c\x6a\xd2\x2b\xeb\x86\x32\x19\xde\xd2\xeb\xeb\x0a\xe0\x8e\xf6\x51\x2e\x74\x89\x31\x34\x87\xa4\x16\xdf\xad\x38\x06\x21\xa9\xfb\xac\xa7\x95\xfa\xab\xa2\x75\x24\x4f\xee\x7a\xd4\x44\xde\x38\x8e\xb9\xff\x84\x62\xea\x09\xae\x9b\xee\x20\x52\xe8\x77\xd0\x86\x76\xe9\x87\x08\x54\x1f\x8b\xe1\x19\xdc\x74\x5a\x3e\x87\xb3\xca\x48\xf9\x34\xfc\xaf", 99, { 0x64, 0xea, 0x9c, 0x8a, 0x8c, 0xc5, 0x91, 0x22, 0x1f, 0x87, 0x92, 0x2f, 0x0f, 0x66, 0x5e, 0xc3 }, { 0xee, 0x4a, 0xcf, 0x8b, 0x5b, 0x91, 0xd5, 0xb3, 0x59, 0xe3, 0x1d, 0x8b, 0x9d, 0x7a, 0x93, 0x7d } }, +{ "\x21\x98\xd1\x60\x74\x74\xfb\xf2\x59\xee\x23\xc0\x96\xe0\x37\x4e\x7b\xe7\x2c\xf2\x0b\x3b\x11\x05\x4c\x24\xe2\xa3\x1e\xb5\xe2\xd4\x45\xd5\x15\x53\x86\x61\xce\x41\x71\xca\x37\xb0\xff\x01\xc2\xd8\xed\x92\xdc\xcd\xa8\xac\x0c\xc5\xf7\xd3\x90\xc3\x76\xf2\x89\xa8\x47\xc1\xc9\xaf\x7a\xb9\xd5\x27\xc6\xa4\x47\x97\x84\x0f\xc6\x26\x70\xc8\xe0\xc9\x73\x1d\xa9\x1d\x7b\xd7\x48\x13\x2d\x8b\xb9\xc2\x4c\x6a\x82\xaa", 100, { 0x40, 0x70, 0x3b, 0xdf, 0x06, 0xd4, 0x35, 0x4f, 0xc2, 0x28, 0x3d, 0x4f, 0xfd, 0x28, 0xba, 0x4e }, { 0xd5, 0xc5, 0x94, 0x94, 0xdb, 0x3d, 0xb8, 0x64, 0xd6, 0x94, 0x05, 0xc9, 0x2e, 0x79, 0x41, 0xcb } }, +{ "\xf5\xbc\x74\xd4\xbb\x82\x29\xc4\x97\x9c\xda\x4c\x40\x06\xef\x74\x11\xe1\x00\x84\x8f\x73\x0d\xc9\x15\xca\x01\x8e\xaa\x22\x37\xb0\x31\x72\x9e\x50\xed\xfc\x9b\xd0\x58\xb9\x2e\xb2\x2e\xbf\xd4\xeb\xed\x6d\x5d\x1d\x59\xf4\xef\xc7\xbb\x50\x44\xdc\xec\x41\x6a\xcd\xf5\x51\xe1\x3e\x21\x25\x62\xc2\x49\x46\x89\x3e\x38\x40\xd7\x8b\x27\xfa\xa8\x1a\xa0\x92\xdd\xe1\x4a\x0c\xc8\x17\x87\x9a\xf2\x10\xca\xc1\x78\xbb\x46", 101, { 0x4e, 0xcb, 0xf7, 0x9e, 0xef, 0x32, 0x54, 0xb2, 0x6d, 0x51, 0xc5, 0x9f, 0x3d, 0xc3, 0xaf, 0x6a }, { 0xa1, 0x05, 0xb1, 0xd1, 0x62, 0xb5, 0x56, 0x17, 0x62, 0xa3, 0x17, 0x81, 0x3e, 0x19, 0xcb, 0xc6 } }, +{ "\xdf\x15\xad\x13\x46\x04\x98\xc4\x4e\x7b\xb6\xc9\x10\xbb\x3f\x4e\xba\xd5\xf6\xac\x43\xc7\x23\x2c\x42\x91\x68\xb8\x21\x26\x62\xc8\x1a\x77\x5c\xb4\x6a\x95\xcb\x91\x81\x1a\xcc\x2c\x85\x0e\x38\x22\xd5\x4f\x81\xa2\xf4\x84\xf9\xac\x63\x42\xd0\x8e\x7b\x2f\xf8\xd5\xe1\xb4\xdb\xee\xca\x20\xfa\xc4\x10\xca\xb5\x30\xe0\x3f\x2d\xb8\x98\xb7\x9f\x3b\x42\x9a\x03\x6d\x34\xb6\x4c\x06\x4d\xcd\xe5\x5e\x4a\x97\x01\xdf\x8a\x5c", 102, { 0xc8, 0xe9, 0xbd, 0x0b, 0x8a, 0xcb, 0xa4, 0x0a, 0xeb, 0x1b, 0x0f, 0x3c, 0x9d, 0x4f, 0x4e, 0xcf }, { 0xa9, 0xfe, 0xbe, 0xbb, 0x36, 0xe8, 0xfc, 0x6f, 0xc6, 0x20, 0xb2, 0x4c, 0x68, 0x48, 0xd1, 0x9b } }, +{ "\x73\x6a\x92\x05\xf0\xcb\xfb\xc0\x1a\xb6\x23\xf0\x83\xcd\x5c\xbb\x6b\xe3\x50\xa2\x92\x5f\xce\x7a\x6d\x9f\xa0\x3e\x53\x11\x19\xb5\x53\x07\x6e\xa9\xa8\x90\x76\x1c\x62\x0c\x40\x65\xc5\x05\xd2\xfa\x8b\xdf\xef\xd6\xa2\xbd\x1a\x67\xfe\x09\x5a\xa5\x73\x8d\xa0\xca\x3e\x8c\x17\xac\x93\xa5\xdf\xd1\x10\xc1\x41\x36\xb9\x5e\x2d\x20\x05\x98\x97\x3e\x1c\x72\x02\xb6\x4d\x90\x61\x9e\x43\xcf\xf9\xf8\x6e\xce\x7e\x95\x68\xbb\xcb", 103, { 0xca, 0xfb, 0x6e, 0x64, 0xa3, 0x96, 0x39, 0x31, 0xc1, 0xce, 0xa9, 0x41, 0x32, 0xfb, 0x55, 0x0a }, { 0x92, 0x05, 0xe4, 0xdd, 0x0a, 0xaf, 0x97, 0xb6, 0x2e, 0x65, 0x86, 0x71, 0xbe, 0x41, 0x04, 0x8a } }, +{ "\xa7\xec\x1c\x8e\x64\x98\x04\x5b\x7f\xab\x59\xf4\xc8\xe8\x9b\x74\x63\xcd\x6f\xf5\xc5\x35\xee\x31\x37\x4a\x0c\x4f\xb6\xa6\x21\x84\x2d\xb3\x18\x65\x75\x87\xfd\x7d\x33\x84\x49\x45\x84\x43\xff\x3e\xde\xdd\xbc\xb7\x21\x54\x78\x63\x7c\x03\xfa\xa7\xf3\x4f\x09\xb2\x7e\xb1\x1e\xe7\x2f\x53\x17\xe6\x8d\x95\xba\x47\x0e\x83\xa7\xa1\x2d\x4b\x7f\x32\xb8\x29\xc9\xcb\x1a\x7c\x3b\xc0\xad\x8f\x50\x95\x80\x3c\x47\x65\xd1\x97\xc3\xcb", 104, { 0x12, 0x3f, 0xcb, 0x6c, 0xf1, 0xe8, 0xe7, 0xcc, 0xbb, 0x70, 0x9f, 0x0d, 0xee, 0x69, 0x11, 0xc8 }, { 0x3b, 0xfc, 0xc1, 0x19, 0xf2, 0xe9, 0x78, 0x87, 0x19, 0xf5, 0x9a, 0xe7, 0x58, 0x99, 0xe0, 0xb2 } }, +{ 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"\x93\xaa\x56\x89\xd9\x0f\xdc\x48\x90\xf0\x8e\x49\x1a\x3e\x81\x65\xf2\xbd\x90\xd5\x76\xe7\x4d\x24\x56\x95\x74\x73\x4c\x19\x03\xf5\x5a\x28\x76\xad\x2b\x93\xdf\x6e\x9e\x96\xf0\x15\x8d\x76\xdd\xe2\x33\x79\x3c\x7f\x18\x52\x40\x72\x7f\xbd\xb6\x5c\xe0\xec\x32\x7f\x66\xf1\x13\x04\x24\x4b\xcd\xfe\x79\x60\xf7\xd8\xcb\xa9\x5c\x55\xe8\xde\xb3\x58\xbc\x34\xce\x2f\x17\x18\x62\x7e\x7b\x4f\xf3\x03\xf3\x34\xb1\x0b\x3e\xc8\x0a\x87\x87\x16", 106, { 0x85, 0xbd, 0xd7, 0xa1, 0x6f, 0x73, 0x7c, 0x93, 0xdc, 0x97, 0xbd, 0x21, 0xf1, 0xf2, 0x3f, 0x20 }, { 0x75, 0xa4, 0xb3, 0x59, 0xc7, 0xf5, 0xaf, 0xca, 0x5b, 0x8e, 0x20, 0x62, 0xc4, 0xba, 0x7f, 0xe0 } }, +{ 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"\xc8\x5c\x79\xbf\x38\x9e\xe1\x32\x1f\x8d\x08\x3e\x2a\x0d\xa5\xd4\xdc\xfc\xac\x46\x9d\xd0\xaa\x9c\x80\x3d\x7c\xda\x23\x57\x7d\xcf\x82\x14\x9e\xc2\xb0\x46\x5d\xb2\xae\x0a\x80\x8e\x04\xc5\x73\xca\xa7\x40\xe1\xcd\xc0\xee\x20\x60\x51\x32\x60\x44\xd1\xf5\x17\xb3\x9a\x13\x63\xdb\xba\x17\x48\xa4\xad\xf2\x8b\x83\xa1\x05\x82\x17\x52\x48\x54\x6e\xa4\xdd\xdd\xda\x10\x28\xab\xfb\xa3\xf0\x47\x32\xf4\x9c\x3b\xa8\x99\xb9\xf1\xf9\x91\xc3\x69\xa5\xb6", 109, { 0xa3, 0x18, 0xb0, 0xd4, 0xd1, 0x63, 0xf6, 0x1d, 0x3a, 0x08, 0xd8, 0xc0, 0x56, 0x6a, 0x63, 0x57 }, { 0x85, 0xaa, 0x84, 0xf9, 0x70, 0x8c, 0x3e, 0x4e, 0xfb, 0xf7, 0x15, 0x7b, 0x46, 0x39, 0xc5, 0x78 } }, +{ "\x8e\xc5\x60\xc0\x5b\x7b\xc1\xa7\xae\x6b\x4c\xf0\x76\x1c\xf6\x6d\x8e\xeb\x40\x94\x5b\x63\x0e\xce\x7c\xbf\x60\xbe\xc0\x12\x1b\x4f\x8b\x57\x3f\x86\x2f\x43\x86\x20\x3e\xec\xa9\xdd\x66\xe5\x38\x99\x36\xb5\x3d\xdc\x1a\x19\x7b\xff\xec\x3b\xe3\x8e\x5c\x22\xef\xb0\xbe\x19\x8b\xee\x98\x03\x15\x4c\x6c\xe6\xf4\x52\x1e\x82\x7c\xd5\x1a\xbf\x73\x4f\xd0\xec\x34\x54\x30\x98\xcb\x4e\xae\x9d\xe1\x3d\xa0\xb7\x1b\x1b\xb4\xe9\x5d\xf6\xf2\x4e\xd9\x2e\x32\x75", 110, { 0x92, 0x9a, 0xe2, 0x8f, 0xff, 0xc2, 0x02, 0x63, 0x79, 0xd1, 0x4b, 0xf8, 0xd3, 0xc1, 0xa5, 0xff }, { 0xf7, 0xa2, 0x15, 0x28, 0x2c, 0xb0, 0x6a, 0x29, 0xee, 0xd0, 0xcb, 0x2f, 0x2f, 0x9b, 0x95, 0x97 } }, +{ "\xe9\x37\xb0\x28\xaf\x84\x4f\x79\x1f\xd7\x58\xb9\x0b\xa7\x7a\xcf\x36\x05\xe8\x13\x42\xb6\xae\x46\x0c\x07\xba\x9b\x32\x01\x57\x59\xe9\x34\xea\x8c\x57\xcd\xcd\x15\x7f\x8b\xa6\x4a\xe9\xfa\x04\x81\x13\x88\xcd\x42\xcd\xf1\x50\xcb\x76\x6b\xab\xdc\x8d\xd8\xed\xfe\xb9\x54\xed\x61\xc3\x68\xef\x4e\x8c\x16\x57\x85\x0e\xfa\x94\xaa\xea\x2f\xe0\x75\x7e\x77\xa5\x4b\x29\x01\x27\x20\xf4\xbb\x5c\x82\xb1\xe0\x0e\x9b\x95\x55\x90\x64\x34\xff\xbc\x8a\xe0\x85\x13", 111, { 0x7c, 0x77, 0xe4, 0xd4, 0x39, 0x82, 0x3d, 0xcf, 0x7d, 0xec, 0x81, 0xf8, 0x85, 0x37, 0x80, 0x48 }, { 0xe6, 0x98, 0x7b, 0xbe, 0xe8, 0xbd, 0x31, 0xed, 0x0d, 0xcc, 0xe9, 0x2f, 0x9a, 0x65, 0x27, 0x2c } }, +{ "\xa8\x1f\x47\xf8\xa8\x96\x24\x46\x6b\xaa\xac\x56\x93\x7e\xd5\xd7\x6d\x85\x9f\x1a\x6c\x16\x1d\xb4\x46\x67\x66\xf3\x02\xb3\x86\xe2\x3f\x80\xfe\x62\x5f\xb9\x4d\x36\xe4\x0f\x80\xc5\x81\xa9\xdb\xd1\x70\xca\x5e\x1f\xb3\x6c\x30\xba\x8b\x23\x01\x56\xed\x57\x3c\xc7\x2c\xe0\xe4\xab\xaf\xd8\x80\x59\xc0\xb6\xa0\x55\xdf\x98\xdc\x07\x1c\xdd\xba\xbf\x51\x9a\x12\x5d\x40\x78\xe5\x50\xf1\x76\xc3\xf3\xd2\xa7\x10\x1e\xac\xd6\xa0\xe2\x8b\xa3\x8b\x4b\x0e\x29\x3c\x1c", 112, { 0x0e, 0x58, 0xc9, 0xd9, 0x76, 0x5d, 0x80, 0xd7, 0x48, 0xdb, 0x22, 0x18, 0x55, 0x29, 0xe2, 0x08 }, { 0x81, 0xd2, 0xb7, 0x8f, 0xd1, 0xba, 0x01, 0x6f, 0x10, 0xff, 0xc3, 0xf9, 0xaa, 0x31, 0xd7, 0x5d } }, +{ "\x5b\x1b\x7d\xe6\xb0\xa7\xa8\x0b\xae\x6a\x7c\x69\xae\x67\xad\x1f\x14\x74\xb7\x9f\x76\xc0\xcc\x5d\x35\x0b\xb9\xab\xd7\xf5\x50\x27\x55\x61\xd6\x19\x87\x50\x86\xe1\x4d\x6c\x04\xe8\x0e\xea\xe2\x75\xcf\xcc\xbe\x8e\x3e\x86\x5d\xa5\x5d\x77\xba\x16\xf3\xfd\x16\x91\x31\xcb\x95\xaf\xbd\x0c\x15\x2d\x7e\xd8\xcf\x6a\xab\x69\x42\x8e\x09\x56\xd2\xc7\x73\x77\x34\x36\x63\x8d\x08\x4b\x14\x9d\xbc\x93\x39\x5e\xc2\x48\xc2\x07\x9c\x96\x6a\x64\xf5\xfa\x99\x5c\x85\x67\x2c", 113, { 0x4d, 0x5f, 0xb5, 0x5c, 0x21, 0x64, 0x68, 0x90, 0x5c, 0xa4, 0x30, 0x3a, 0xd1, 0xfd, 0x0e, 0x43 }, { 0x6d, 0xdd, 0x39, 0xf8, 0x55, 0x6f, 0x04, 0x20, 0x94, 0x12, 0x99, 0x96, 0x63, 0xbf, 0xa8, 0x37 } }, +{ "\x57\x11\x50\xf4\xb8\x84\xc5\x17\x1e\x57\x99\x0c\x14\x1b\x74\x21\xbf\x07\x68\x7c\x0b\x7e\x21\x62\xa9\x1e\x1b\x12\x05\xa1\xf7\x87\xf8\x89\xce\x63\x92\xb2\xcb\x4a\x33\xdc\x1b\x3c\x60\x43\xcb\x67\xcf\x65\xf4\x83\x5b\x65\x90\x90\x57\x7c\x54\xbd\x6f\xe1\x60\xe4\x23\xff\xa0\x9a\x25\x32\xa8\xfd\x95\x5c\xb6\x9a\x78\xb3\xd9\x99\x0f\xfa\xec\x0b\x9d\xd2\x37\x68\x02\xdc\x2e\x09\x59\xaf\x14\x2f\xaf\x19\xbe\x61\x22\xf2\x73\xed\xf3\xb0\x3d\x78\x16\xed\x8a\x49\xbc\x45", 114, { 0xe9, 0x60, 0x93, 0x9c, 0x8b, 0xb3, 0x29, 0xe6, 0xf9, 0xee, 0xdd, 0xda, 0xa2, 0x08, 0x5c, 0x42 }, { 0xc0, 0xe3, 0x51, 0xc2, 0xaa, 0x5e, 0x9e, 0x04, 0x33, 0x65, 0x9e, 0x17, 0x07, 0xf6, 0x50, 0x29 } }, +{ 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"\x8c\xd6\x20\x4f\x0b\xd4\xaa\x7e\x25\xeb\xb7\xfd\x07\x36\xfd\xb4\x94\xf1\x11\x44\x5f\x7e\x8c\xa0\xa4\x49\xd5\xce\xca\x6f\x72\x84\x53\xac\x20\x47\x76\x64\xed\xd8\x79\x7d\x92\xcf\x1c\xec\x97\xe9\x78\x85\xa9\x72\xad\xf1\x49\x87\xde\xfc\xbd\x56\x2b\xfd\x5a\xf6\x0e\xed\xcd\xa4\xb4\x4b\x54\x20\xca\xae\x4c\x19\x11\x09\x6a\xfd\x79\xd0\x98\x98\xd6\x46\x33\x0b\xa2\xab\xf7\xb5\xb0\x63\x75\x20\x72\x36\x9d\xb0\x53\xfa\x72\x15\xcf\x7b\x65\x66\x3d\x47\xe6\xd5\xb9\x1b\x23\x1e\xe8", 117, { 0xe4, 0xc0, 0x97, 0xc9, 0xe4, 0xeb, 0xef, 0x0d, 0x95, 0xf3, 0xd1, 0x27, 0x68, 0x6a, 0x8c, 0x19 }, { 0x38, 0x66, 0xcb, 0xec, 0xb4, 0x04, 0x81, 0xf4, 0x8e, 0xbf, 0x9b, 0x45, 0xf4, 0x18, 0x30, 0x7d } }, +{ "\xfe\xf0\x75\xa1\xee\xc2\x26\xa4\x5b\xc9\x06\xba\x6c\x66\xc5\xc7\xe4\x39\x53\x74\x0b\xa9\xb6\xbf\xf5\x00\x06\x37\xab\x20\x55\x29\x3b\xb1\x6e\xe7\x57\x2c\x83\x24\xc9\x6d\xd0\x51\xc4\x61\x72\x5d\x80\x34\x0a\xcc\xde\x25\xbe\xf1\x31\x4c\x76\x99\xd0\x7e\x6b\xa7\x41\x50\x36\xeb\xff\x39\xf6\x5b\x3a\xff\xb1\x3e\x92\xeb\x7a\x37\xff\x63\x9b\x82\x87\xda\x36\xb3\xdd\x7d\x6a\x91\x4f\xd1\x2e\xbb\x96\x6e\x0f\x94\x95\x35\x67\xa9\x82\x70\x25\x85\x4d\xe4\xac\xac\x3a\x38\x45\xe3\xf4\xba", 118, { 0x6d, 0x68, 0xf6, 0xd9, 0x42, 0x2b, 0x76, 0x88, 0xe2, 0x64, 0xd7, 0x59, 0x71, 0xb7, 0xb2, 0xef }, { 0x6d, 0xd2, 0x4a, 0xed, 0xd7, 0x58, 0x6a, 0x97, 0x89, 0x8a, 0xdd, 0x43, 0x63, 0x63, 0xcc, 0x8a } }, +{ "\x3b\xf8\xf2\x89\x6f\xa1\x5e\x1b\x68\x22\xb7\x7c\x60\xaf\xd8\xe7\xd3\x6c\x2d\x5f\x73\xd9\x53\x12\xb9\x43\x64\xa8\x02\xeb\xce\x5a\x8c\x06\x72\x7a\x0f\xac\x63\xc5\x5a\x67\x67\x6e\xf4\x01\x89\x8c\x3c\xd8\x60\xa1\xa1\xb4\xcf\x38\xcc\x13\xf6\xda\x71\x5c\x4a\x60\x78\x93\xe6\x1e\xe5\xc7\x92\x7a\xa4\x10\x26\xd2\x9e\x6c\x21\x50\xaa\xe2\xbf\x60\x4c\xf8\x37\xb0\xfd\x3f\xc1\xb9\xcb\xe1\x73\x8d\xe4\xdf\x87\x53\x68\x27\x9d\xa4\x22\x80\x86\xa7\x19\x4c\x29\x8d\x5c\x4f\xa4\x00\x3f\x27\x0f", 119, { 0xbb, 0xa3, 0x80, 0x47, 0x04, 0xb1, 0x9d, 0xd2, 0x90, 0xd0, 0x99, 0x9b, 0x96, 0x3e, 0xa8, 0xe2 }, { 0x42, 0x92, 0x10, 0x85, 0x8d, 0x35, 0x05, 0x34, 0x95, 0xcb, 0x5f, 0xb8, 0x55, 0x3a, 0xab, 0xb0 } }, +{ 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"\x8f\xdd\xaa\xe4\x5e\x4b\x1b\xd5\xc5\xb6\x00\x8f\xcc\x98\xbf\x25\xfb\xe1\x8c\xd6\xa0\x08\xff\x2e\x95\x39\x9d\x67\x2a\x3f\x57\x75\x1e\xf3\x2d\xbd\x4b\xb4\xb2\x9f\xed\x68\xb2\x4f\xb9\x58\x80\xee\xdc\xf9\x90\xc8\x3e\x85\x25\x0e\x29\xb8\x6c\xf8\x81\xd1\xdc\x1e\x99\xda\x2d\x32\x99\x6b\x7e\xe7\x36\xd8\xe4\xec\x43\x43\x54\xe7\x36\x11\x15\x1d\xa9\x39\x85\xbe\x36\x28\x2b\x01\x72\x14\xc6\xa1\xb7\x8e\x6f\x01\x2d\xcc\x88\x04\xcd\xbc\x90\x11\x00\x20\x17\x3f\xab\x45\x6d\x3e\xba\xe1\xe3\xa2\x04\xbb\x76\x4e\xac", 125, { 0x40, 0xc7, 0x8a, 0x6e, 0x9c, 0xa0, 0xee, 0x0f, 0xbb, 0xff, 0x0e, 0xe4, 0x14, 0xf0, 0x15, 0x1e }, { 0x73, 0x48, 0x2b, 0x0f, 0x0c, 0x8e, 0x94, 0x41, 0x03, 0x16, 0x3d, 0xef, 0x5c, 0x79, 0xbc, 0x19 } }, +{ "\x83\xf7\x7a\x11\x74\xff\x88\xd1\xab\x46\x62\xdd\x33\x18\x90\x5a\x74\x9c\xe6\xcc\x62\xf0\x37\xdb\xe1\xcb\xb4\x9b\x88\x42\x83\x7e\xbe\x57\xa9\xee\xcf\x26\x8f\x23\x21\x91\xb4\xf8\xf0\x4a\xa1\x0f\x26\x32\x98\xd6\xaf\x1b\x62\xcf\x7b\xf3\x0a\x43\x42\x49\x2d\x31\x51\x1f\x40\xf9\x3d\xae\xee\x68\x5b\xfe\xe2\x4a\x25\x39\x3b\x26\x73\x3e\x6e\x0c\xfc\xf3\xb6\x8a\xa2\x41\x10\x34\x5d\xc8\xec\x96\x3e\x51\xaf\xf6\x99\xed\xb1\x71\xcd\x34\x95\x82\xa9\xb5\x15\x89\x9f\x93\x3d\x42\xb8\xcc\x53\x36\xb7\xef\x46\x19\xfa\x20", 126, { 0x23, 0x81, 0x6f, 0x24, 0xc2, 0x9c, 0x13, 0xaa, 0xf8, 0x7b, 0xc6, 0xe4, 0x5f, 0xae, 0x6b, 0x8a }, { 0xd5, 0xa0, 0x37, 0xfa, 0x13, 0xc3, 0x93, 0x5c, 0x5e, 0xc8, 0x4a, 0x2b, 0x00, 0xdc, 0x71, 0xf9 } }, +{ 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"\x23\x4d\x86\x50\x1d\x69\x3b\xa6\xfd\xa6\x59\x04\x95\x4b\xa1\x0c\x28\xf8\x0a\x79\x65\x86\xdd\xff\x2b\x11\x0a\xce\x32\xcb\xb1\xd6\x71\x81\x89\x24\x30\xb4\x94\x5b\x22\x22\xcf\xb0\xe4\x99\x03\x03\x38\x78\xdc\x80\x3c\xe3\xc9\x99\x38\xac\x7f\xe9\xd7\x2e\x4b\xc8\xf0\xde\x5e\x7a\x96\xc7\xbd\xbb\xd0\x27\xfd\x25\x30\x31\x73\xe4\xc2\x2c\xe7\x93\xdb\x2f\x13\xba\x87\x04\xf8\xd1\x03\x18\x28\x75\x6c\xf1\x84\xa7\x2c\x7f\xcf\x98\xc0\xf0\x47\x1c\x79\x77\xd3\x2a\xf9\xca\xa7\xee\x6a\x5b\xfa\x3b\x90\x2f\x3e\x85\xd2\x9f\x6f\xe8", 128, { 0x63, 0xd9, 0x40, 0xcb, 0x96, 0xa1, 0x08, 0xd2, 0xd5, 0x2f, 0x3e, 0x2c, 0x87, 0x06, 0xdd, 0xb7 }, { 0x40, 0x5f, 0x91, 0x34, 0x43, 0x5c, 0x30, 0xbc, 0x8c, 0x0e, 0x6a, 0x81, 0x61, 0xec, 0x47, 0x7b } }, +{ "\x7c\xcf\x0b\xcb\xf2\xb5\xb0\x32\x87\x5f\x81\x55\x94\x21\xb7\xe5\x75\xf9\x62\x24\xcf\xb2\xb6\x67\x56\xc8\x71\xb9\x80\xb9\xc2\xdd\x69\xfc\xb0\x55\xc4\x75\x02\x59\x5c\x45\x37\xfb\x4b\x1b\x34\xcf\x90\x9f\x68\x97\x83\xa0\xa1\xd8\xe2\x21\x39\xa3\xb8\x9c\xe8\x78\x43\x62\x04\x6c\xd5\xa0\x55\xff\x51\x80\x2d\xb1\xf4\x8e\xb9\x4a\xb2\x7f\xc4\xd5\x0c\xbf\x25\xa3\xd8\x37\xb8\xd8\x00\x63\xc8\x3a\x53\x85\x36\xa1\xac\x5c\x56\x83\xa8\xab\x54\xac\xd5\x33\x46\x41\xed\x9e\xa4\x13\x73\xbe\x45\x45\xe3\xe5\xf5\x22\x52\xb2\x06\x0b\xa3", 129, { 0x5e, 0xbe, 0xfb, 0x58, 0xd0, 0xc3, 0xa6, 0xfb, 0xd3, 0xda, 0xab, 0x60, 0xcb, 0x9e, 0xff, 0xa9 }, { 0x67, 0x26, 0xb3, 0xaf, 0x7d, 0x35, 0x4d, 0x43, 0x7e, 0xb7, 0x4d, 0xe8, 0xc1, 0x73, 0x28, 0x4e } }, +{ "\x4d\x67\xa3\xe2\x37\x02\x4f\x45\x24\x73\x61\xf6\xc1\x6d\x74\x4f\x91\x8f\x96\x11\x28\xbe\xc1\x15\x2f\xdd\x1c\x0d\xfa\xee\xac\x76\xd9\xe3\xe2\x95\x5f\x4b\xce\x0b\xf2\xd1\x77\x44\x6c\x51\xa1\x0c\x31\x5a\xb4\x5c\x7e\x2d\x70\x60\x36\x8f\xe7\xe6\xf1\x94\xf3\x28\x69\xd2\xad\x8c\x5c\x91\xfe\x72\x1e\x79\xb1\x78\x20\x01\xac\x73\x82\xf8\xce\xec\xef\xc6\xa8\xcb\x74\x67\x07\x5b\x52\x19\xed\xc2\xfd\xe0\xd4\xff\xb9\xb1\x04\x20\xfb\xb6\x91\xbc\xcb\x5b\x76\xa8\xf0\xe9\x5c\xa9\x91\x95\xcb\xad\x36\x6a\xbc\xec\x65\xd9\xc3\xb5\x30\xcb", 130, { 0x14, 0x88, 0x74, 0x20, 0xfd, 0xd8, 0xa4, 0x61, 0x05, 0xc8, 0xe1, 0xab, 0x0e, 0x96, 0x22, 0x46 }, { 0x5e, 0x3b, 0x39, 0x11, 0xe6, 0x19, 0x50, 0x2b, 0xbd, 0xd3, 0x14, 0x98, 0x9c, 0x9d, 0x70, 0x1d } }, +{ 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"\xdf\xa1\x35\xda\xfe\xd5\xd4\x37\xe7\xb4\x9f\x16\xaa\x63\x2d\x93\x5c\x5c\x2d\x24\x03\xa4\xa1\x4e\x21\x7a\x94\xd1\x03\x40\x3f\x95\x0f\xc1\x34\x96\x7d\x50\x11\xa6\x28\xa8\xe3\xd2\x23\x12\xa0\x50\x31\xba\x4c\xee\xe0\x65\x92\x48\x5d\x3e\x92\xe1\x73\x2d\x55\xd2\x86\xe2\x53\x82\x4d\x86\xe6\x76\x95\x26\x16\xd9\xbc\x39\x6a\xbe\x7b\xcd\x79\x91\xaf\x09\x58\x10\xb9\xe7\x4d\xc7\xdf\x1e\x9f\x05\xe3\x11\xcd\x01\xc1\xfc\x34\xe4\xd8\x59\xb0\xd1\xd2\x17\x43\xb0\xd9\xa1\x7f\x11\x9c\xc9\x0a\x81\xf9\xd5\x8d\xba\x38\x97\x62\xd5\x3c\xe4\x7f\x6e\x1e\x9b\xa1\x88\x8f\x50\xf9\x8c\x3b\x6e\x15\x31\x97\xfe\x83\xbc\x19\x23\x72\xcc\x31\xad\x89\xdb", 156, { 0x97, 0x3d, 0x39, 0xd3, 0x7b, 0x86, 0x31, 0x39, 0x1c, 0x5d, 0xbc, 0x5f, 0xd0, 0xfa, 0xb6, 0x1a }, { 0x2e, 0xc0, 0x73, 0x05, 0x36, 0x7b, 0xd2, 0x12, 0x38, 0xb1, 0x7f, 0x41, 0xb1, 0xb3, 0x8d, 0x68 } }, +{ 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"\x2c\x0b\x25\x5f\x6f\xbf\x52\x20\xe4\xe3\x35\xf0\x9d\x66\xe4\x12\xe8\x0a\xda\x3d\x16\xc2\x3b\x28\xb7\x27\x49\xe2\x55\x57\xc7\xd4\xbb\x35\x18\x6a\xa1\x4b\xaa\xf2\x43\xe1\xa6\x4a\xb5\x06\x09\xa2\xc0\xab\x76\xc4\x7d\x56\x15\x36\xba\x15\xfb\xcf\x72\x30\x29\x7a\xe0\x75\x07\x13\x47\xb3\xb3\x19\x2a\x9d\x53\xf4\x72\xd9\xab\x0a\xa7\x9d\x7c\x51\xb1\x88\x42\xf6\x21\xc9\x44\x02\x16\x80\x21\x7c\x96\x62\x9f\x11\xe5\x35\xf6\x29\x5e\xbb\xbc\x49\xa3\x01\xa4\xe2\x42\x10\x9c\xca\x00\xe6\x9d\xe0\xb7\xdf\x66\xcb\xed\x95\x1e\xc2\x1b\x8b\x48\x41\x07\xf4\x27\x37\xd9\x2a\xf5\x54\xfc\x86\x5c\xe4\x51\x14\x2d\x1e\x6b\xfd\x66\xd6\x1a\x9f\xeb\x60\x89\x04", 158, { 0xf6, 0x14, 0x7f, 0x8b, 0xdc, 0xfb, 0x43, 0x7c, 0x26, 0xb6, 0x12, 0x57, 0xa8, 0xc4, 0x63, 0x74 }, { 0x9d, 0xc9, 0x66, 0x51, 0xf5, 0x7f, 0x9f, 0xa8, 0xbc, 0xee, 0x6d, 0x71, 0x13, 0xb7, 0x52, 0xd5 } }, +{ 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"\x3b\x58\x7d\x79\x4e\x16\xed\x5a\xfc\xec\xca\x30\x5a\xd8\xb0\xa0\x0f\x11\xdc\xb8\x68\xe0\x2a\x7b\x02\x5c\xad\xfd\x66\x98\xd2\x38\xe1\x69\x2f\x5f\xa7\x2c\xe6\x63\xb8\xa4\x3f\xf4\xaf\x2b\x53\x64\x8e\x0c\xd7\x7e\x17\x2e\xaa\xb4\xb7\x3a\xda\xa6\x0a\x26\xec\x46\xf1\x30\x95\xaa\xe8\x10\xe2\xbc\x0d\xcc\xfc\xca\xfd\x51\xa1\x55\xd3\x00\x46\xe7\xaa\x24\x5d\xa8\x06\xb8\x6d\x6b\x62\x38\xa8\xf3\x35\x7f\x19\xb6\x2f\x79\xbf\xd7\xb9\x0d\xd7\x7b\x0d\xf0\xeb\x1a\x3e\xe4\xa6\x78\xe0\xb1\x20\x96\x73\x40\x91\xd5\x32\x17\x41\x9f\xcc\x8a\x9b\x3d\xcf\xfd\xce\x1f\xbc\x69\x3b\x6b\xc4\xc9\x58\x67\x49\x0c\x93\x10\x83\xd7\x84\xfe\xcd\x06\xc7\xb1\xa5\xf7\xe2\x94\x54\x12\x34\xe1", 164, { 0x38, 0x09, 0xb9, 0xe3, 0xf6, 0x26, 0x94, 0xc0, 0xcb, 0xab, 0x88, 0x1f, 0x8e, 0xcc, 0xee, 0x0e }, { 0x23, 0x33, 0x18, 0x61, 0xc0, 0xd2, 0x53, 0xea, 0x21, 0xbd, 0xe5, 0x3c, 0xe9, 0x7d, 0x98, 0x91 } }, +{ "\xaa\x3c\x37\xaa\x8e\x04\x82\xeb\xbd\xde\x1b\xe1\xbc\x6c\xcf\x1b\x35\x90\x48\x59\x8e\xa7\x36\x46\x3e\xad\xc6\xd5\xd9\x63\xf5\xf1\x2e\xcd\x93\xa5\x2a\x33\x3c\x80\xf3\x0b\xb5\x76\x10\x34\x33\xe8\x90\xc3\x2d\x6e\x40\xf9\xec\x2f\xb0\xf8\x6b\x07\x49\xac\x69\x3b\x7b\x7d\x66\x88\x4c\x66\x19\x1a\x06\x14\x27\xd1\xa5\xfa\x56\xa3\xb1\xa0\xaf\x46\x17\xe6\xbd\xdc\x60\xa6\x2d\x58\xba\x9e\x8b\xe5\x54\xb3\xb0\xc7\x99\xeb\x1c\x79\x6f\x58\x68\x5e\x9a\xe0\xa4\x77\x8a\x9a\x3c\xe9\xc1\x68\x07\xf6\xd2\x3f\x21\xef\xb3\xbc\xac\x1a\x31\xd9\xe8\x32\xd0\x68\x81\xc3\x1f\x87\x6f\x3c\xb8\xd9\x1c\x2c\x24\x83\x1d\x63\x02\xbc\xd6\x25\x69\x9b\x1e\x85\x52\xa2\xfc\x33\x5f\x5d\x31\x5f\x54", 165, { 0x58, 0x65, 0xa2, 0xec, 0x0a, 0x35, 0x24, 0x6d, 0xe8, 0x5d, 0x0c, 0x79, 0x9c, 0x74, 0x48, 0x52 }, { 0xa9, 0x23, 0x74, 0x7f, 0xf9, 0xd4, 0x55, 0x7a, 0x75, 0x92, 0x8b, 0x3e, 0x58, 0xb0, 0x3b, 0x19 } }, +{ "\xae\x8d\x50\xc3\x3d\x7d\x56\xea\xfc\x23\xfc\x7f\xf5\x90\x3c\xbb\x88\xa8\x03\xb6\x04\xbe\xf0\x83\x57\xc9\x74\xd4\x66\xc4\x72\x42\x9f\x8f\x87\x52\x77\x15\x52\xd4\x6d\x94\xc1\x24\x5a\x96\x41\x8c\x6e\xaf\x92\xa4\xd3\xcc\x1d\x91\xb9\x4c\x32\x5b\x75\x33\x38\x75\x7e\x9a\xc7\x18\x37\x87\xa1\x44\xe3\x1e\xd0\x0a\x03\x60\x6b\x1e\xbc\xe0\xf8\xe8\x57\x93\x66\x86\x0f\xb3\x2e\x01\x60\xc3\x61\x40\x42\x0c\xce\x9a\xac\xba\x24\x77\x34\xf2\x18\xf4\x78\x6f\xab\x45\x8d\xe7\xad\x52\x11\x55\x28\xf7\x0e\x99\x01\xf7\x31\x8e\xf3\x92\xab\x43\x43\xe0\x4e\xf0\x2c\xed\x1e\x55\xa2\x36\x77\x24\xf8\xad\x4b\xfc\xe8\xd5\xce\x50\xba\x37\x00\x0a\x55\x8b\x12\x85\xe7\xe9\xd0\x1e\x9e\x41\xe5\x44", 166, { 0xd1, 0x05, 0x39, 0xa3, 0xfc, 0x7f, 0xa9, 0x33, 0x8b, 0xa4, 0x22, 0x4c, 0x62, 0xac, 0x85, 0xa5 }, { 0x8d, 0xf7, 0x9e, 0x57, 0xdf, 0x28, 0x42, 0xab, 0x05, 0x3b, 0xe0, 0x0d, 0xa1, 0x7d, 0xbe, 0x41 } }, +{ "\x09\x5c\xd0\x07\xc8\x3b\xba\x9c\x5a\x55\x30\x75\x4c\x79\x45\xe5\xa1\x52\x05\x9f\xc8\x13\x2b\x47\x71\xc7\x3a\xa1\xcd\x6b\xf4\x9c\xc4\x7a\x94\x38\x27\xf4\x6b\xb4\x46\xed\x5b\x6d\xf6\x19\xc9\xac\xa6\x6c\x39\x48\xbc\x22\x54\xd4\x16\xbb\xed\x95\x7f\x92\xf5\x5a\x9b\x49\xd8\xcc\x63\xce\xae\x08\x88\x12\xa5\xa2\xee\x54\x11\x19\x7d\x88\x1c\x48\xd0\x9e\xf9\x72\x86\x64\x27\x32\x38\xdf\x29\x25\x06\xcc\x69\x00\x70\x0c\xb2\xa4\x90\x9c\x1d\xac\x0b\xf1\x30\xea\xbc\xbc\xd2\xa0\xf2\xe3\x16\x05\x74\xbc\xab\x73\x03\xaa\x61\xe4\xf6\x67\xca\x8b\x76\x8a\xc1\x99\xb3\x95\x55\x8c\x49\xe9\x18\x67\x40\x01\x6c\x6e\x65\x8e\xbe\xe3\x99\xf7\x6c\xe9\x78\x40\x84\x72\xd6\xa2\x22\xb6\xf0\x9d\xcb", 167, { 0xfc, 0x98, 0xb5, 0x00, 0x64, 0x60, 0xa6, 0xee, 0xdf, 0x9a, 0x1b, 0x91, 0xbb, 0x5f, 0xdf, 0xf0 }, { 0x56, 0xf2, 0x7d, 0x58, 0x64, 0x53, 0x85, 0xed, 0x3f, 0x08, 0xc5, 0x8f, 0x3e, 0xa9, 0x04, 0x84 } }, +{ "\x85\x79\x46\x85\x23\x61\x02\xcc\x7c\x35\x50\x73\x71\xb0\x83\xf6\x16\xdd\x30\x8f\x1e\x46\xb8\x26\x0d\xec\x0a\xb7\x71\xe3\xfa\x9e\xd2\xb5\x99\xa0\x4e\xe9\xb3\xf9\x72\xf5\x97\x8d\xd5\x64\xbe\x79\x91\x6f\x02\x4b\xde\x4f\xee\x0d\xd2\x48\x96\xa1\x17\xbb\xc4\x44\x01\x85\x43\xe9\xdd\xff\xd7\xee\xf5\xbb\x2b\xb3\x34\x51\x1e\x73\x87\x89\xa3\xf7\x30\x4e\x34\x0d\xd8\x8b\x8d\xc9\xee\xb1\x21\xec\xc6\xde\x1a\x70\xd7\x06\x5e\x6e\x8a\x1b\xea\x7c\xe0\x68\x53\x40\x2d\x97\x7b\xee\xae\xad\x85\xac\xaf\x37\x37\x4e\xc1\xca\x06\xb6\x35\x59\x82\xac\x0d\x8e\x34\x5d\xb7\x00\xa8\xf4\x7d\xa9\x88\x54\xb2\x3b\x36\xa6\xf6\x6a\x17\x0e\x4d\x0e\xab\x41\xe2\x01\xce\xf0\xaf\xbe\x65\x86\xd9\xfe\x7e\x47", 168, { 0x0b, 0x7d, 0x4d, 0x11, 0x51, 0x6b, 0x1e, 0x88, 0x9d, 0xc1, 0x91, 0x9a, 0xaa, 0x81, 0x0f, 0x3d }, { 0x02, 0xc8, 0x58, 0xc2, 0xfa, 0x69, 0xbf, 0x2c, 0x1c, 0xb2, 0xc3, 0x7b, 0x6c, 0x7f, 0x52, 0xef } }, +{ "\xce\x3a\x82\xfb\x1d\x7d\x53\x75\x9d\x82\xea\xb3\x2b\xd4\x12\x2e\xde\x39\x5d\xa6\xd4\x06\xe8\x71\x17\xdd\x6e\xb6\xf3\x0c\x0c\xd3\x2a\xe0\x03\xd5\xe8\x6b\x16\xbe\xb4\xcf\xef\xca\xb7\x5b\xed\xd3\x04\x91\x3e\xf6\xe1\x36\xe0\x87\x32\xf7\x16\xcd\xe5\x66\xf5\xa0\x33\x69\xfe\x7a\xf1\x2c\x2d\x10\x2f\x81\xfe\x67\x8e\xe1\x87\x13\x08\x31\xe9\x57\x74\x91\x18\xca\x5c\x8d\xeb\x81\x09\x4f\x2b\x69\xc0\x41\x98\xdb\xf3\x80\xa4\xae\x29\x3a\xdf\x34\x93\xf8\xbc\x18\xe6\x81\x68\xff\x9b\x6d\xaf\x0a\x25\x3f\x40\x28\xd5\x33\xd0\x95\xba\x34\x17\x17\xce\xd6\x3d\x46\x01\x20\x59\x41\xfa\x59\x56\x9a\x48\x79\xf6\xa1\x6b\x7b\xb4\x33\xc2\x90\x1e\x2e\x39\x45\x65\x3e\xf7\x5b\x59\xfb\x2e\xed\xd1\xa1\xde", 169, { 0xeb, 0x46, 0x7f, 0xcd, 0x71, 0xb8, 0xf6, 0xdf, 0x29, 0x20, 0x7b, 0xee, 0xb8, 0x16, 0x91, 0x77 }, { 0x39, 0x69, 0x26, 0x50, 0x9e, 0x9e, 0x13, 0x00, 0x45, 0xed, 0x4f, 0xac, 0x64, 0xd5, 0x04, 0x2a } }, +{ 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"\x9d\x97\x54\xad\xdd\x0a\x59\xbd\x60\x7d\x64\x94\xfd\xa8\x6e\x8d\xfc\x6f\x34\xc4\xe5\x41\x7d\xc5\xb5\x4b\x66\x0b\xf7\x62\xc6\x77\x6c\x72\x7e\x66\x3f\x13\x69\xec\x16\x4b\x51\xd2\xce\xdf\xad\x55\xdd\x4c\x8f\x67\xa0\xc3\x82\x0c\xfc\x4f\x55\x84\xb0\x50\xa8\xf4\x7e\x19\x7d\x84\xae\x97\x20\x5c\xc9\xdf\xa7\x3c\x09\xec\xde\xe6\xa7\xd5\xf1\x28\xc6\x10\x3c\x71\x88\xe6\xd5\x4d\x15\x9c\x92\xd1\xe7\xd7\x71\xde\xe8\xc8\xdf\xa5\x19\x6d\x58\xfd\x76\x7e\xa6\xc9\x03\x80\xa0\x40\x7f\x2a\x62\x86\xcb\x9a\x0c\xd2\x40\x08\x8d\xc9\xcd\xb3\x2d\x0f\x08\xc9\x60\xf9\xf9\xf5\xec\x9f\xf3\xe5\x1b\x7f\xcb\xee\x00\xe9\x1f\x8d\x83\xd0\xe0\xd5\x66\x3e\xa3\x09\x23\x2c\x26\x7d\xe2\x76\x19\x81\x3a\x19\xc8\x16\x8c", 171, { 0x98, 0x73, 0x84, 0x64, 0x84, 0x21, 0xeb, 0xaf, 0xa0, 0x16, 0x6a, 0xf6, 0xb0, 0xff, 0xb4, 0x87 }, { 0x14, 0xd5, 0x82, 0xbd, 0xcc, 0xd9, 0x80, 0xb7, 0xb0, 0x88, 0xf4, 0x8d, 0x34, 0x81, 0x99, 0x40 } }, +{ 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"\x7c\x7a\xd2\xe2\x03\x5b\x70\xb8\xa8\x0d\xd0\x85\xe1\x4a\x6e\x4f\xd2\x50\xa2\xf6\x0d\x9a\x9f\x26\xa6\x1c\x46\x26\xa2\xc0\x11\x72\x1c\x7d\xc7\x9e\xcd\xb9\x7d\xac\x8d\x55\xba\x74\xf5\x7e\x08\x29\xb3\x17\xd1\x97\xf8\x00\xdf\xc4\x1e\x32\x8c\x58\x6e\x7a\xfc\x9b\x8e\x3c\xd0\xe6\x5f\xd9\x65\xbd\x78\x60\x3c\xa2\xda\x62\xce\xab\xb6\x33\x9c\x94\x14\x4b\x12\xb9\x44\x0a\xc4\x57\xb8\xa0\xaa\x5b\x45\xed\xff\x4c\xe9\x12\x81\xd1\x21\xf1\x7e\x9e\x35\x3e\x6d\x99\x76\x8d\x81\x3c\x8b\x98\x0d\x1c\xaa\x23\x0f\x3d\xbc\xf3\xb8\x44\xc3\x17\xe8\x12\x78\x82\x87\x14\xcb\xa8\xe3\x7e\x25\xb5\x34\x2e\xfe\xf9\xf6\x2f\x0c\xc2\x0b\xe5\x62\x8a\xc2\x8c\xb3\xb6\x4e\x90\x88\x21\x1d\x66\x4d\x02\xf2\x47\x05\x80\xfd\xa1\x05", 173, { 0xa7, 0xfd, 0x48, 0x51, 0x1a, 0x10, 0x99, 0x46, 0xa4, 0xb4, 0x72, 0x33, 0x63, 0xb3, 0x15, 0xd1 }, { 0xec, 0x3a, 0x33, 0xcd, 0x02, 0xa2, 0x1d, 0xa4, 0xc7, 0xf2, 0x98, 0x31, 0x3a, 0x62, 0xb8, 0x69 } }, +{ "\xc1\x8c\xb8\xbd\x69\x3d\x99\xe6\x31\xc9\x07\x13\x13\xb6\x99\xb1\xba\x3e\xe6\x47\xbe\x0c\x48\x10\x1b\xd0\xf8\xfd\x93\x98\x93\x4a\xc6\x8d\x20\x94\xe8\xa2\x69\x34\x91\xa4\x0f\x1a\x93\x55\xd1\x74\xbd\x49\xb5\xe1\x10\x67\x80\x49\xae\xd5\xa6\xb7\xe2\x40\x17\xa1\x9f\x76\xcc\x35\x4d\x98\x95\xa1\xb5\xca\x30\x2f\x2c\x3c\x52\x04\x21\x72\x35\x4a\xac\xa7\x1a\x8f\x8e\x28\x6d\xb0\x22\x15\x0f\xc7\x9e\x2d\x19\xa9\xac\xc8\xde\xde\xa5\x16\x57\xd2\xb1\x88\x80\xf3\xf8\xc9\x01\x39\x51\xa5\x0a\x8d\xc8\x13\xa8\xad\xab\xd2\x7b\x4e\x8d\x81\x8a\xf2\x41\x9d\x9e\x4b\xfc\x3e\x6a\x3d\x49\x36\x1c\xeb\x06\x90\x2e\xcb\x86\x35\x1d\x84\xa4\xa6\x71\xb9\xb3\xc9\xd4\x67\x2d\x40\x76\x4d\x73\xa9\xd2\x45\x80\xf5\x85\x5f\xa2\x0b", 174, { 0xbb, 0xb8, 0x40, 0x0d, 0x1c, 0x63, 0x6d, 0x45, 0xff, 0xfd, 0xcc, 0x95, 0x50, 0x8c, 0xbc, 0x33 }, { 0x2a, 0x0d, 0x13, 0x44, 0x90, 0x96, 0xee, 0xfd, 0x4d, 0x18, 0xeb, 0x10, 0xe4, 0xed, 0x10, 0x53 } }, +{ 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"\x1e\xe2\x80\xc8\xb6\x0e\x1b\x60\xbf\xe1\xa2\x54\x02\x14\x25\x58\xc9\x19\x92\x31\x82\x62\x79\x5e\x48\x27\x48\xab\xa1\xaa\x6f\x0a\x8a\x29\x8f\x74\xd8\x42\x37\xeb\xd8\xab\x69\xab\xf3\x65\x34\xec\x52\x43\xd7\x02\x93\xf5\xe1\x3c\x94\x74\x61\x3e\x1c\x02\x38\x76\x9c\x54\xfd\xbb\xc4\xd5\x78\x94\xee\x17\xfd\xcd\x8b\xa4\x51\x71\xfb\xa0\x94\xa7\xea\x63\x33\xfe\x7b\xf8\xbe\xf5\x84\x05\x1b\x73\xbe\x7d\x56\x06\x19\x2c\x17\x28\x00\x33\x69\x94\x6e\x7c\xed\xa9\x64\xfb\xb5\x65\x55\x2c\x98\xa7\xd9\x53\x53\xbe\xea\xf2\x2e\x71\x07\xff\xcd\x94\x42\xe7\x4f\x0d\xa3\x27\xff\x6d\xc5\x25\x18\x07\x2e\x1b\x43\x41\xe4\xbb\x6b\x3f\x16\xbc\x04\x21\xa5\xa4\x5a\x25\x7d\x5b\xb4\x3a\xb1\xad\x75\xce\x2c\xe8\x43\x48\xa0\xe6\x84\x70", 176, { 0x06, 0xc5, 0x30, 0xd0, 0xbc, 0x03, 0x3a, 0x2b, 0x4d, 0x57, 0x4b, 0x11, 0xd4, 0x1a, 0xdd, 0x10 }, { 0xb1, 0xdf, 0x84, 0xbc, 0x09, 0xb9, 0xe9, 0xb2, 0x60, 0x35, 0x1e, 0x13, 0xd6, 0x9c, 0x14, 0x43 } }, +{ "\x7c\x52\xbc\x3b\xd1\x4a\xff\x1f\x62\xbc\xf2\x23\x08\x6c\x1f\xa8\x7f\xb9\x4c\x4e\xde\x92\x13\x09\x7a\xe6\xf1\x0a\x7c\xb8\xfc\x70\x8b\x35\x6e\x6a\x19\x4f\x8a\x02\x9e\xe0\xde\x66\x60\x99\x06\x06\xd1\x8d\xde\xc3\x28\x1a\x8a\x3e\x18\x5b\x79\x4a\xe9\xb7\x9e\x82\x39\x7a\x9b\x22\xc2\x91\x78\xb1\xf6\x9e\x72\xf5\xb8\x23\x33\xbf\x6f\xe1\x2c\xc1\x05\x92\x26\x54\x5c\x55\x54\x7f\x3e\x34\x15\x85\x20\x64\xc0\x9d\xdb\x3c\x5d\x91\x85\x45\xe7\x47\x26\x94\xa5\x01\xc0\x01\xaa\x07\x49\x1f\x5a\x6b\x96\xa3\x94\x85\x79\xa1\xb6\x6e\x1b\x44\x11\x31\x08\xe6\xb7\x62\x27\x87\xb5\x56\xfc\x15\xb1\x2f\xb7\x32\xdc\xeb\xb1\x17\x35\x91\x48\x0d\xe1\x7d\x3e\x15\xfd\xab\x71\x92\xd7\x8c\x4e\x70\xc1\x0f\x79\x35\x09\x71\x16\x2a\xc1\x93\x46", 177, { 0x31, 0xd0, 0xdb, 0x15, 0x70, 0xeb, 0x03, 0x96, 0x21, 0x81, 0xab, 0x8e, 0x10, 0xc8, 0x6f, 0x20 }, { 0x66, 0xad, 0x69, 0xad, 0xe3, 0x65, 0x14, 0x1f, 0xdf, 0x05, 0x8c, 0x86, 0x33, 0x24, 0x92, 0xe6 } }, +{ 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"\xcc\x04\x3f\x70\xa8\x40\x5a\x98\x90\xc7\x45\x30\x8c\x44\x66\xa9\xe7\x23\x55\x3f\x58\xcc\x25\x67\x39\xc1\x72\x17\x06\xae\x55\x8a\x31\xf9\x40\x8a\xed\xb2\x14\x5f\x99\x47\xa0\x1a\x36\x47\x91\x84\xeb\xd9\x46\x08\xbf\xb9\xa3\x21\x73\xfb\xbe\xd2\x05\x47\xcb\x4b\xe8\xc3\xcb\xc8\x76\x28\x16\x8a\xb2\x14\xa9\x31\x3b\x90\xcc\xd8\xaf\xe3\x2e\x1e\x1a\x58\xfb\xd0\xf8\x88\x57\xba\x5a\xa0\x29\x1c\x5b\x7d\xed\xf5\x05\xb4\xf3\x15\x60\xe4\xd7\xdf\x0a\x1d\x3b\x8f\xfe\x7f\x59\xdd\xca\xa6\x98\xaf\xec\x25\x74\x61\x64\x71\x9f\xec\xfd\xab\x8f\x21\xb3\xe5\x9b\x53\x2a\x0f\x9a\x58\x01\xc4\xd6\x8e\xf4\xb1\x52\x35\xa3\xb3\xd4\x07\xa5\x7b\x8d\xe2\x94\x81\x18\x61\xf2\x0c\x66\x09\x70\x5b\x4b\xf9\x9d\x4d\x78\x8e\xb3\x82\x38\xa6\x8c\xa5\x8b\xa0", 180, { 0x86, 0x97, 0x2f, 0xc7, 0x6d, 0x98, 0x7e, 0xfc, 0x47, 0x51, 0x41, 0x6e, 0x1e, 0x4d, 0xda, 0xe2 }, { 0xe3, 0x2c, 0x31, 0x30, 0x1b, 0xad, 0xbb, 0x6f, 0xc1, 0xc2, 0x4d, 0x0a, 0x61, 0x08, 0xaa, 0x80 } }, +{ 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"\x01\xad\xfd\xa7\xb2\x5e\x42\x8b\xb3\x6b\x13\x8a\x7c\x79\x5d\x0f\x44\x70\x0b\xda\x30\xe0\x18\x63\xa0\x42\x3e\x76\xd1\x2c\xdd\xbb\x8d\xff\xbc\x70\x5a\xbf\x18\x2e\x51\xa0\xe9\xfe\xcd\x07\x32\x0f\x4f\xac\x7d\xfe\x68\xb0\x09\xff\x3f\x6a\xb9\x80\x6e\x10\x72\xec\xa0\x22\xd2\xe7\x03\x8d\xf8\x1d\xe3\x72\xb4\xe9\x00\xe2\x46\x26\x8c\xb6\x9f\x00\x33\xc4\xcc\xeb\xaa\x90\x2d\xb3\x11\x6b\xaa\xb4\x2a\x90\x10\x3f\x4a\x81\xaf\x3a\x82\x3b\x8a\x93\x40\x31\xc6\x63\xbc\xee\x88\x19\x29\xb4\xd0\x64\x4d\x48\xed\xb5\x17\xa6\xe0\x4c\xa1\x36\xa7\x73\x22\xa7\xd5\x7e\xf4\xe3\x7e\xaa\x1d\xcf\xed\x0b\xf0\x0d\x52\x5c\x51\x1a\x61\x30\x58\x44\x46\xbd\x9d\x3c\xd4\x73\x40\x56\x10\x1b\xc3\xf1\xa8\x4f\x0c\xaa\x17\xe7\xee\x34\xd8\xe6\xcc\xd8\x0d\xb4\x71\x8f", 182, { 0x11, 0x5a, 0x4f, 0x6c, 0xbd, 0x9d, 0xb5, 0x27, 0x1f, 0x55, 0xdc, 0x94, 0x95, 0xae, 0xb7, 0x37 }, { 0x28, 0x0b, 0x50, 0x5c, 0xe5, 0x2f, 0x29, 0xdb, 0x93, 0x6d, 0x7c, 0x32, 0x2b, 0x7c, 0xc2, 0x92 } }, +{ "\xa1\xcd\x07\xdd\xa7\x2b\x89\xd5\x5d\x7d\xb6\xe9\xc0\x43\x20\x9c\xcb\x59\x5e\xd3\x88\xf2\x01\x1c\x66\x3a\xdb\x42\x28\x4c\xfa\xf8\xde\xfa\x82\xc4\x2f\xb3\xef\x01\x0c\x8a\x06\x63\xc4\xb3\x31\x61\xf4\x91\x4b\xa7\xeb\xa0\x45\x64\x08\xb9\xa1\x05\x47\x06\xdc\xe2\x1d\xd5\xe8\xc7\x8f\xc7\x86\xdd\xcc\x50\xd1\x35\xce\xa0\x36\xce\x65\xd5\xd3\x1f\xe2\xa0\xe5\x47\xd2\xbf\x74\x7e\x5f\xc6\xa3\x05\xb8\x0c\xe8\x53\x00\xb3\xb1\x95\x8d\x0f\x0a\xb1\xd2\x46\x0e\x35\xed\xd5\xf5\x78\x85\xb9\x5e\x8b\x5d\x0d\xbf\x83\x0b\x9c\x5d\xa1\xf0\x86\xd3\x96\xf3\x32\x11\x1b\x3c\xa2\xb4\x50\x09\xd6\x02\x52\x70\x5e\x49\x5d\x3d\x96\x88\x13\x58\x11\x25\x92\xd5\x7c\x9c\x9c\x67\x48\xcf\x72\x31\x98\x48\xc2\x43\x65\xc6\x5e\xe5\x89\x1b\x54\x3a\x62\x57\xda\x04\x6f\xf3", 183, { 0x81, 0xde, 0xff, 0xbd, 0x8a, 0xfb, 0x08, 0x84, 0x7e, 0xc5, 0x9a, 0x2f, 0x6b, 0x05, 0xaa, 0x4b }, { 0x3a, 0x2c, 0x59, 0x1a, 0xe7, 0x95, 0x4a, 0x54, 0xd9, 0xc1, 0x0f, 0x28, 0x73, 0x66, 0x16, 0xb7 } }, +{ "\x0d\xce\xd4\x6d\x9f\xb5\x86\x12\x8a\x2f\x8a\x45\x29\xdc\x7e\x9a\x9f\xde\x79\xb9\xae\x49\x85\xc7\x2a\xfd\x14\xd7\x8b\x3f\x03\xa8\xf2\x6b\xdb\x89\xa6\xbe\x69\x4e\xa4\x94\x0b\x7e\xd4\x3a\x48\xe0\x1f\x36\x09\x51\x99\x78\x04\x8f\x57\x3b\x66\xee\x5a\xc5\x9f\x73\x08\x5a\x63\xdf\xd1\x8c\x60\x25\xa8\x8f\xb3\xd3\x43\x96\x99\xeb\x56\x5d\xb4\xb6\x4f\x22\x9e\x0b\x78\x37\xef\x89\x5b\xe7\xd1\xbb\x26\x15\x21\x13\xf7\x17\x82\x8b\x5a\x52\x54\x41\x9c\x96\x8c\x5f\xf9\x31\x3a\xfb\x7f\xf3\x47\x33\x5d\xd2\xc2\xb1\x4a\x10\x22\x80\x80\xe5\x5c\xa4\x46\xef\xa2\x61\xbd\x1d\x09\x3d\x20\x28\x19\x60\xb3\x8e\x5c\x74\xb3\x8f\x2e\xa0\x4d\x3d\x3b\x88\xb3\x6b\xf0\xda\x62\x7b\xf2\x45\x61\xf8\x00\xd2\x0d\x8c\xab\x17\x3b\xc0\x16\xb1\x13\x22\x32\xac\x03\xf3\x2a\x75", 184, { 0x6a, 0x37, 0x5d, 0xd8, 0xaf, 0x5b, 0x3d, 0x10, 0x01, 0xa0, 0x45, 0x98, 0x36, 0x89, 0xd9, 0x24 }, { 0x70, 0x13, 0x76, 0xa3, 0x31, 0x31, 0x5e, 0xc8, 0x7a, 0x0b, 0x06, 0x9d, 0xc1, 0xce, 0x27, 0xa4 } }, +{ "\x2e\x90\x8a\x4a\x3b\xfc\x39\xa9\x45\xdf\x57\xf1\x36\xcd\xfc\xf7\xf3\x32\xf2\x84\x85\x8c\x97\xc4\xe8\x42\x6c\xc5\x7f\xd9\xb9\x4a\x53\xf6\x4a\x56\xd6\x31\x90\xce\x5f\x49\xee\x43\x28\x48\xe4\x69\x9c\xda\x41\x7e\xd9\x0c\x05\xa7\xb2\x02\x17\xc7\xdb\xfb\x66\xde\xc4\x28\x93\xf8\x00\x61\x3b\x7c\xe0\xa5\x99\x4b\xa6\xd6\x7c\x12\x1e\x4f\x94\x58\x84\xeb\x67\x12\xc5\xb2\x73\xd8\x0f\xf3\x59\xa5\xa8\xf2\x52\x24\x0d\x8c\x77\x9e\xd9\x3c\xb4\x8a\xb5\x39\x7b\x10\x19\xfb\x25\xe9\x45\xd8\xae\x1a\xd6\xb5\x6c\xc3\xf7\xdc\x69\x3c\x57\xbe\x15\x0a\x46\xe3\x0d\xec\xd4\xf8\x22\x37\x09\xba\x16\xa2\x14\xa3\xbb\x3f\xff\x11\xdb\x8b\x01\xb2\x54\xbe\x75\xc3\x0b\xea\x59\xbb\xe3\x9d\x18\xaf\x43\xb4\x5a\xf0\xbf\x62\xc8\x5b\x42\x1b\xe0\xc3\xbd\xb1\x1c\x42\xa9\x8b\x74", 185, { 0xb5, 0xf7, 0x27, 0x27, 0xea, 0x2d, 0x81, 0xab, 0xa6, 0x36, 0x64, 0x54, 0x90, 0x42, 0xc3, 0x52 }, { 0x0c, 0x4c, 0x67, 0x1b, 0xbc, 0x76, 0xa5, 0x8d, 0x08, 0xee, 0x49, 0x8a, 0xd8, 0x5a, 0xf7, 0x6e } }, +{ "\xa7\x39\x43\xfb\x06\xcd\x8f\xea\x6a\xaf\x05\x16\x98\x28\x11\x03\xb1\x0f\x7a\xa2\xf2\x23\x9a\x6c\xec\x77\x38\x4f\xc6\x39\x83\x5b\xf7\xf1\x18\x9b\xda\x1a\x57\x75\x0b\x1e\x81\xe2\xee\x88\xff\xec\xeb\xe0\xcb\xaa\x59\xf3\x09\x6e\x17\x4d\x2c\x18\x8a\xce\xe0\x7b\xa2\x98\x08\xfa\x92\xef\x1d\x7d\x6b\xf5\x24\x62\xf3\xf0\x76\x98\x7e\xa4\x57\x6e\x22\x68\x0b\x33\x39\xa2\xd9\xc0\x13\xd4\x6f\xc1\x43\xf9\x8a\xea\xed\x65\xcc\x62\x9f\xe2\xf1\x14\xd6\x48\x76\x7d\x02\x27\x6c\xba\x1b\xaa\xea\xde\xa0\xb7\x28\xb2\x06\x30\xc7\xa8\x97\xf3\x58\xe5\x00\x3f\x7e\x42\x7d\x73\x0e\xe7\xbd\x57\x46\x71\x8f\x7e\x98\x6a\xe8\x22\x94\x66\xe1\x2a\xa1\x66\xcb\xa8\x15\xa7\x88\xfd\x5f\x8f\xd4\x38\x97\xa7\xa2\x59\x18\xaf\xbd\xa6\x92\x29\x53\x77\x90\xd2\x47\x63\x18\xa3\x94\x70", 186, { 0xbb, 0xda, 0x1a, 0x9b, 0x79, 0x8b, 0x8f, 0x7a, 0xd1, 0xb2, 0x14, 0xa5, 0xf5, 0xb9, 0x53, 0x4f }, { 0x01, 0x85, 0x08, 0x8f, 0x09, 0xab, 0xb6, 0x69, 0x71, 0x38, 0x1f, 0x13, 0x1d, 0x8d, 0x19, 0x73 } }, +{ "\x77\x32\x72\x7d\x82\x92\xdd\x5b\xbe\x45\x5b\x97\xfe\x46\xc0\x10\x91\xe6\xf9\x58\xc0\xcd\xa3\xa0\x3f\x6e\x98\x12\x14\xdb\x96\x9a\x1d\xb7\x2d\xd3\xd5\x75\xc5\x58\x7c\x5d\x7e\x71\xae\xa5\x56\xf6\xc8\xe2\xb6\x49\xef\xac\xc6\x3d\x2e\x40\x39\x03\xba\x64\x0b\xde\x20\x7e\x5e\x38\x9f\x49\x85\x3f\xe4\x08\xfe\x88\xc9\x76\x3d\x2a\x80\x01\x56\x0a\x9e\x06\xa9\x36\x2c\x67\x89\x0f\x2b\x34\x1d\x03\xe7\x38\x75\xaa\xd2\x6d\x18\x7e\xeb\xb0\x8f\xf8\x7f\x65\x56\x6b\x75\x12\xf2\x2a\x08\x23\x7b\xb9\xa4\x3a\xfc\x30\x25\xc5\x2e\xc7\x9e\x53\xf6\xe5\x37\x6a\xf2\x5a\x90\x2a\xc8\x17\x96\xb5\x95\x83\x32\xc9\x49\x1b\x52\x0d\x24\xb3\x2a\x75\x07\x0e\x00\xb7\x93\x55\xba\xfc\xb4\x26\x70\x79\x59\xc1\x98\x2d\x22\xc1\x42\x90\xde\xab\xb3\xa7\x32\x6a\x29\x81\x89\xf4\x36\xff\xb4", 187, { 0x7f, 0x8c, 0xaa, 0xc1, 0x61, 0xc0, 0xfc, 0x18, 0x32, 0x87, 0x36, 0x0c, 0x8d, 0x1e, 0x0a, 0x58 }, { 0xe7, 0x4f, 0x8f, 0xeb, 0x41, 0x10, 0x25, 0x9a, 0xbc, 0x81, 0x45, 0x8c, 0xcf, 0x90, 0x88, 0x09 } }, +{ "\xd1\x7b\xca\x69\xbc\x97\xf3\xfb\xa2\x42\xbb\x7b\xbb\xd4\x16\x4e\x3e\x6f\x58\x56\x5d\x20\x0c\xc6\xcc\x76\x3a\xf4\xc8\xbd\xe6\xe2\xc4\xa9\xe3\x2d\x1c\x12\xc5\x0e\xd3\x55\xfe\xd3\xb8\xd9\xa2\xcf\x91\xfb\x69\x7b\xd3\xe6\xe3\xa0\x66\x2e\xba\x75\x41\xb1\xd7\xd2\xa8\x9d\xb4\x18\x44\x5e\x82\x69\x28\x27\xeb\x11\x39\x21\xff\xb5\xdb\x6c\x4d\x50\x18\x48\x97\x93\xcc\xb8\x06\xb6\x8a\xae\x7f\x0e\xf2\x26\xab\x71\x98\xb0\x93\x14\xa5\xac\x6f\xdc\x06\x64\x30\xb9\x75\x73\x65\xe2\x92\xc8\x3a\x77\x5c\x5f\xb2\xa3\xcf\x73\xee\x61\xa1\x29\x73\x13\xdb\x53\x90\xf9\x40\x33\x9d\x6d\x98\x87\xda\xc4\x09\x84\x20\x31\x5f\x98\xa6\x57\xfd\x51\x0d\x3e\x93\x9a\x57\x7b\x43\x7b\x2c\xcf\x9a\xb0\x61\xf4\x0a\x3f\xcc\x9b\x6f\x61\xa7\x26\xab\xef\xc6\x21\xfa\x7d\xf0\xb1\x6b\xe6\x40\x4e", 188, { 0x3a, 0x21, 0x3f, 0x4b, 0x3d, 0xf5, 0x06, 0x1a, 0xc5, 0x64, 0x9a, 0xd2, 0x7f, 0xad, 0xff, 0x6e }, { 0x1d, 0x2f, 0x3e, 0x42, 0xc2, 0x98, 0x1e, 0xac, 0x65, 0xa9, 0x3e, 0x89, 0x70, 0x16, 0xce, 0x10 } }, +{ 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} }, +{ "\x47\x23\xde\xaa\x84\x0d\xcb\xa3\x84\x43\xa6\x99\x72\x59\x33\x1b\x29\xfe\x66\xf0\x00\xb6\x69\x6b\x6a\x49\x92\xa5\x62\x38\x69\x6b\x13\x90\x71\xa0\x89\x75\xff\x1f\x53\x34\xb1\xcc\x5b\x31\x43\x2f\x53\xd5\xce\x98\x96\xe5\x2a\xf8\x1a\xba\xa9\xf4\x65\x29\x16\x62\x5a\x8d\x0f\xc1\x5e\x44\x30\xe8\x00\xb4\x50\xd9\x6b\x79\x9d\xf4\x46\x11\xac\x4b\x6c\xfe\x8b\xd9\x5d\x94\xbf\xda\x36\x3a\xef\xb5\x15\x97\x72\xe0\x99\xa3\xd1\xff\x6a\x44\x1d\x13\xb9\xc8\x2b\xa4\xfb\x8f\x3b\x2b\x0d\xe3\xc2\x89\x87\x36\xf8\x3f\x66\x81\xc6\x31\xea\xc2\xf0\x3a\xa0\x16\x94\xf1\x54\x11\xe4\xc8\xd1\x6a\x17\x2c\x35\x5e\xed\x34\xd1\x34\xcf\x80\xcd\xc0\x6b\x7f\x59\x4d\xe5\xd1\x96\x80\x55\xf8\xd4\x09\x7a\x63\x72\xee\xec\x0a\x4c\xb2\x60\x74\xfc\x98\xc0\x79\xb8\xf7\x66\xa4\xa9\x66\xbd\xb1\x91\xb2\xe8\x68\x31\xa9\x14\xe4\xfc\xe0\xcd", 199, { 0xdb, 0xad, 0x46, 0x4a, 0xd2, 0x29, 0xcd, 0xc6, 0xd9, 0x08, 0xa1, 0x9c, 0x8d, 0xbe, 0x56, 0x5d }, { 0x4f, 0xda, 0x20, 0x19, 0xfb, 0xf5, 0x19, 0xa6, 0xab, 0xe9, 0x38, 0x5b, 0xb4, 0x5e, 0x87, 0x53 } }, +{ "\x46\x60\xb6\xd8\x59\x4d\x79\xa6\x8a\x73\x52\xc4\x65\x8d\xa2\xeb\xbd\x4a\x61\x4f\xf0\x3c\xd3\x2f\xc7\xa3\x44\x9b\x4f\xc9\x21\x6b\x67\x00\xeb\xbe\x28\xef\x3f\x08\x6d\x3c\x02\x6c\xbf\xdb\x34\x13\xad\x07\xb7\x78\x0f\x84\x77\xc7\x3d\x60\xb5\x0d\x3d\x63\x7f\x83\xc3\xf7\x56\x16\x06\xa6\x77\xe2\x11\x8b\x84\x0d\x01\x32\xfe\xf2\x9c\x0f\x88\x3a\xa8\xa5\x6a\x24\xdb\xb2\x25\x18\x98\xfb\x56\x92\x01\x75\xcf\x0e\x70\x29\xb9\x69\x7a\x76\x8b\xc5\x91\x71\xd3\x76\x38\xd7\x6d\x6b\xca\x42\xa3\xb7\xf5\xf0\xd5\x81\xd7\x71\x60\x58\x13\xbe\x95\x0a\x79\xa1\xa5\x63\xb6\xf8\x0b\xda\x50\xe3\x80\x61\x40\x33\x22\xb6\x08\x0e\x9b\xbc\xc1\xc4\x75\x17\x3a\x48\xf7\x4f\xa3\x9b\x48\x72\x2f\x24\x63\x0f\xbf\xc3\x7a\x58\xa4\x6a\xa8\x8a\x25\x4b\x25\x34\x6b\xb6\xbd\x96\x52\x2a\x71\x30\xe2\xba\x9a\x79\xc8\x4d\x41\x30\x9a\x65\x89\x5e", 200, { 0xe6, 0x3d, 0x59, 0xee, 0x8c, 0x74, 0xb4, 0x35, 0x7d, 0xe8, 0x17, 0x21, 0xf9, 0x63, 0x3f, 0x2c }, { 0x27, 0xcf, 0x20, 0x07, 0x55, 0x5a, 0x41, 0xa4, 0xe9, 0xaa, 0x88, 0xd6, 0xb1, 0xe0, 0x58, 0x49 } }, +{ "\xf8\xad\x6b\xf1\x56\x3c\x7f\x94\x4b\x1e\x02\x3b\xd3\xc1\x9a\x53\x75\x73\x16\x49\xcc\x67\xcf\xff\xf7\xed\xb8\xb1\x0c\xb6\xbb\x9a\xc9\xf7\xb3\x63\x64\x72\x8c\x79\x9d\xc6\x1c\x37\x11\xb1\x6b\x19\xc7\x28\x93\x11\x59\x6c\x24\xc6\x6b\x67\x7e\x18\x62\x63\x1c\x12\xf6\x69\x3e\x20\x6b\x52\x31\x94\x43\x2e\x07\xc2\x21\x89\xa7\x58\xdb\x15\xb4\x52\x61\x8f\xfc\xbe\xe8\xf3\x63\x07\xf8\x3b\xba\xd5\x9e\x37\x90\x3e\xeb\xf2\x16\xd6\x07\x84\x59\x60\x74\x57\xd9\xa9\x24\xec\x6a\x9c\x14\x0e\x86\x5f\xf6\x35\x50\xb4\xbf\x17\xc3\xa3\x2f\xa7\x65\xf2\x02\xc6\xc4\x89\xdd\x87\x90\x33\xe5\x7c\x11\xae\x5d\xfd\xce\x45\x20\x03\x1a\x12\x59\xb0\x5f\x53\x95\x7e\x35\xee\xae\xbd\xde\x80\xbd\xe3\x8f\x67\x0a\xc4\xf4\xaf\x03\xda\xd4\xa7\x16\x3a\xa7\x5b\xb5\x83\xd1\x56\xfb\x25\xaa\x26\x9f\x82\xb3\x56\xe0\x05\x69\x19\xd9\x15\xcb\xdc\xf9", 201, { 0xa6, 0x84, 0x80, 0xd5, 0xe2, 0xbb, 0x98, 0xf1, 0xda, 0x70, 0x99, 0xb9, 0xf6, 0x10, 0x4e, 0xa8 }, { 0x2f, 0x3b, 0x98, 0x86, 0xef, 0xb1, 0xc9, 0xe8, 0xd4, 0xbc, 0x4f, 0xdf, 0x80, 0x65, 0xb0, 0x3e } }, +{ "\x97\x4d\x99\xf9\x61\xba\x43\xf5\xc9\x4c\xb9\x5a\x07\x8a\xcb\xa3\xd9\x7d\x8c\x7c\xa9\xcc\x98\xc9\x0b\xe3\xb3\x6d\x98\x88\xd5\x31\x21\x23\xaa\xcd\x4d\x64\x8f\x71\x6d\x64\x8d\x1b\x88\x36\xf5\xf5\xe7\x32\xb9\x76\xd4\x6e\xbb\x02\xbf\xba\x5e\x4f\x07\xa6\x2b\x8b\x21\xa1\xa3\xef\x76\xc2\x02\x70\x98\x11\x63\xf6\x7b\x6b\x61\x55\xb8\xdb\xd5\xd2\x03\xb2\x27\x3b\x50\x95\x5a\x09\x95\x08\xbb\xdf\x87\xd6\x2f\x29\xea\xb7\x00\x58\x58\x0b\xbb\xe1\x7d\x0f\xf6\xc9\x1b\x0c\xe2\x2b\x9e\xb2\x65\x73\xfb\x50\xfa\x68\x09\x88\xa9\xce\xa6\xa8\xd8\x7a\x87\xb4\xd8\xce\x73\x86\x3e\xff\xcd\x4c\x8b\xba\x5c\x12\x15\xd7\x0e\x9e\x26\x62\x9c\x04\x08\xb7\xb4\x74\xbd\xff\x8b\xa2\xc1\xa4\xf4\x73\x89\xd2\xb6\xe9\x66\x35\x1b\x6e\x23\xe6\x9e\xdb\x01\x34\x3c\x40\x2d\xcb\x99\x1e\x76\x2d\x3c\x90\x28\x0f\x8c\x21\x67\x55\xd2\xf5\x9e\x5e\x25\x25", 202, { 0xd8, 0x3b, 0x51, 0x87, 0x06, 0x97, 0x1c, 0x6d, 0xda, 0x55, 0xd7, 0x84, 0x6b, 0xef, 0x72, 0x2a }, { 0xe2, 0x4a, 0x85, 0xa1, 0xd0, 0x1e, 0x95, 0x1b, 0xf8, 0xfa, 0xc0, 0x4a, 0xfb, 0xc5, 0x07, 0xa6 } }, +{ "\x8c\x4a\xbf\xa0\xea\x10\xcd\xac\x05\x87\x49\x33\xac\xd8\x84\x64\xbb\xf4\xce\x80\x48\x53\x76\x9a\xca\xe6\xbb\x2e\xc3\x2d\xa7\xfa\xa0\x07\x2f\x0d\xea\xa7\x67\x55\x34\x3d\xc8\xf6\x47\x2a\xc8\x6c\xe5\xb7\xa7\x34\x88\x5c\x8f\x40\x0f\x45\x5a\xb7\xf9\xf7\x56\x16\x07\xd6\x5e\x82\x9b\x5a\x59\xd7\x3e\xd3\x55\xa2\x98\x22\xc9\x03\xcc\x24\x92\xc4\xa6\xb5\x9d\xeb\x91\x4b\x15\x2e\x01\xf7\x11\xe3\xb6\x23\xf5\xee\xa4\xfa\x0d\x5b\xa0\xb8\x20\xd6\xc7\xb5\x48\x79\x4a\xa1\x80\xfb\x6d\x1b\x66\x7b\xe8\x10\xd1\xd8\x49\xdd\x54\x29\x56\xa3\xa2\x06\x51\x73\x05\x2b\x78\x9b\x1a\xd1\x4f\xd1\x22\xc5\x60\x02\x4e\x59\xe5\x52\x36\x8e\x36\xc3\xbe\xaf\xd5\x70\x9e\xae\x3f\xf2\x62\x88\xd0\x40\x9a\x26\xf7\x2c\x42\x03\xbb\x03\xb9\x9e\x89\x1e\x4d\x94\x81\xf3\x22\x6b\xe2\x7c\xfd\x4c\x78\xc7\x1c\x14\xad\x32\xd7\x2e\x5f\x05\x17\xc9\x82\x9c\x2e", 203, { 0x2d, 0x93, 0x6a, 0x50, 0x36, 0x11, 0x01, 0x37, 0x2b, 0xfb, 0x32, 0x6c, 0xf2, 0x32, 0x42, 0x57 }, { 0x53, 0xac, 0x62, 0x70, 0x58, 0x9a, 0x96, 0xa2, 0xf5, 0x68, 0xc4, 0x7f, 0x8d, 0x26, 0x9b, 0x18 } }, +{ "\x28\x60\x78\x71\x69\xa0\xbd\x63\xbc\xb8\x85\x56\xaa\x3e\x64\x40\x2f\xa8\x1b\x29\xc6\xe9\x96\x37\x4b\x71\x25\xb1\x6a\xa6\xf4\x33\xd3\xf4\x4b\xb3\xc1\x53\x74\xc2\x07\xa3\x03\xcb\xa9\x38\x46\xe3\xe9\xa2\x27\xdb\x57\x22\x33\x02\xf2\xa0\xac\x24\x9e\x50\x12\x1f\x8e\x24\xa3\xc9\xa1\x67\x23\xbc\x1e\x16\x43\x90\x63\x39\x26\x54\x4a\x33\x6f\xfd\xa1\x5a\xf9\x36\x60\x34\x27\xc4\xdc\x23\x23\xb0\xbe\xbc\xbb\x21\xf3\x20\xd5\x4e\xe9\x06\x72\xbc\x2a\x2a\xae\xd4\x37\x38\x02\xf4\x0a\xee\x7e\xb7\xcb\x0d\x9e\x27\x4d\x3e\xd4\x73\x00\xd6\x08\xc2\xf2\xdb\xd3\x96\x52\x7f\x30\x46\xbd\x6f\xc8\x84\xff\x3b\xea\x5f\xcd\x58\xa1\x1c\xf9\xb6\x92\x51\x13\xc9\x8b\xea\x80\xb2\xd9\xfb\x5d\x8c\xf1\x41\x9e\xb4\x29\x17\xcc\x37\x00\x32\xc3\x8a\x8f\xf6\x3b\x1d\xac\x2b\xe4\x12\xff\xc2\xad\x9e\x66\xf2\x0d\xf3\x63\x70\x26\xba\x5e\x4f\xe3\x47\x98\xc0", 204, { 0x78, 0x92, 0x9f, 0x95, 0x5e, 0x90, 0x00, 0xdd, 0x65, 0x5d, 0xb0, 0xdc, 0xde, 0x46, 0x85, 0x7c }, { 0xb4, 0x22, 0xc5, 0x3c, 0x8d, 0xfc, 0x18, 0x5c, 0x47, 0xf8, 0xc9, 0x63, 0xff, 0xcd, 0x66, 0x9f } }, +{ "\xbd\xb9\x2d\x7f\x87\x53\x73\x61\x27\x79\xb0\xc7\x4c\x7f\x91\xaa\x1d\x13\xca\x53\x4e\xd9\xb6\x29\x37\xe6\xf7\x5c\x42\xd9\x6b\xb2\x51\x84\xe7\x3a\x77\xfc\x2c\x50\x52\x40\xf2\x0e\x0a\xbc\x80\x2e\xd8\xaf\x98\x82\xc9\xc2\xe6\xbe\xe7\x5a\x64\x82\x36\x7f\xa5\x17\x5d\x9a\x9b\x48\xce\xb2\xca\xdd\x3c\x4f\x84\xd2\x7e\x60\x69\x1b\x9f\x8c\x19\x3f\x8e\x17\xd5\x32\x01\x0f\x64\xac\xff\xc9\x45\x67\xda\xf9\xe7\x30\x8f\x27\xde\x35\x0e\xd2\xde\xf0\x4a\x44\x88\xf0\x6a\xb5\xec\x61\x68\x8d\xc3\xc8\x45\x2a\x3b\xb8\xda\xb4\x84\x2b\x0f\xfb\xb9\xe3\x10\x4d\xab\x5c\x13\x66\x36\x7e\xe6\x70\xa3\x24\x58\xd0\xd6\xcb\x1c\x1f\x6e\xa0\x41\x12\xd8\xbe\x05\x4b\x04\x58\x7a\x61\x7d\x8d\x49\xa1\x79\x03\xab\x0f\x0e\x92\x5b\x3d\x44\xcd\x12\x05\xec\x24\x45\x1b\x78\xe9\x60\xe8\x4a\x50\x8a\x36\x7d\x9b\x41\xee\x71\x8d\xab\x86\x43\xf1\x42\x24\xd3\x71\x21", 205, { 0x08, 0x23, 0xe3, 0xaa, 0xb8, 0x3d, 0x6c, 0x76, 0x84, 0x7b, 0x30, 0x51, 0x91, 0x04, 0x55, 0x3c }, { 0xb0, 0xaf, 0xbe, 0x81, 0x2f, 0x1f, 0xbf, 0xc6, 0x26, 0x15, 0x9f, 0x37, 0x53, 0xd9, 0xfd, 0x54 } }, +{ "\x6a\xa3\x48\x32\x25\xd5\x08\x84\x09\xb5\xdb\x7b\x04\xf1\xec\xd2\x3a\x1f\xfe\x11\xd3\x57\x90\x3b\x5e\x7b\x6b\xb0\x7b\x32\xf5\x20\x61\x07\xc6\xc7\x0f\xdd\x54\x76\x6d\x0a\x94\x96\xa5\x27\xbd\x02\x1a\x09\xa4\x60\x4d\xb3\xf8\xb4\x15\xbe\x98\x3b\x1f\x6e\xc2\xbc\x74\x73\x6a\xb9\xb1\xfd\xaa\x49\x5a\x70\x72\x0c\x1c\x49\x46\xcf\x7b\x8e\x69\xc1\x44\x1e\x69\xdc\x5e\x80\x7f\x64\x3c\x14\xe9\x71\xab\x5a\xd8\x7e\x7d\x30\x99\x47\xb1\x4b\x5c\x9e\xa1\xf4\xa3\xa9\xa0\xba\xbf\x81\xab\x48\x9c\x6d\xce\xc7\x36\x86\x31\x58\xf9\xfb\x97\xcb\x52\x4d\xf4\x2d\x78\x4d\xab\x2a\x98\x07\x5b\xa1\x24\xcc\x90\xd3\x3e\x67\xdf\x06\x3d\xed\x74\x24\xd7\x5c\xd5\x00\x4c\xbf\x47\xe2\xce\x0a\x5b\x55\x90\x92\x76\x8e\x9b\x8d\x8b\x2f\x84\x6e\x92\x8d\x45\xbc\x82\x21\x58\x65\x14\x6e\xb0\xde\xe0\xb9\x0f\xcb\x52\x6a\xe7\x7c\x88\x47\xa5\x77\x04\x21\x5a\x27\x62\xfb", 206, { 0x3b, 0x56, 0x19, 0x7a, 0x64, 0xcd, 0xa9, 0x00, 0x4b, 0xec, 0x78, 0x3e, 0x52, 0xce, 0xc4, 0x38 }, { 0xb8, 0x7f, 0xab, 0x7b, 0xa7, 0xd8, 0xca, 0xc7, 0xbe, 0xfd, 0x64, 0x79, 0x20, 0x5b, 0x10, 0x96 } }, +{ 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0x16, 0x3f, 0x1e, 0x60, 0xf9, 0xdf } }, +{ "\x53\x15\x2f\xc5\x77\xdb\xd2\xba\x92\xc7\xbb\x6f\xe2\x05\x8a\x3c\xd7\xa1\x6e\x3b\xe3\xed\xda\xa3\xb9\x27\x68\x81\xaf\xca\x1e\x20\x67\x79\xf9\xf0\x5c\xa1\x19\xc0\x60\xea\x2e\x23\x9f\x3d\xdf\x01\x3b\x71\x58\x48\xae\x37\x31\x51\xb0\xe6\xc8\x38\x7d\xac\x36\x6e\x6e\xb1\xc7\xcd\xf6\x67\x9d\x9d\xc2\x32\x38\x8b\x43\xf3\x18\x26\xbc\xb4\x8e\x87\x84\x35\xcd\x9c\x25\x16\x6e\x29\xea\x82\x64\x1b\x54\x4e\xae\xd9\xf5\x78\xec\x85\xbc\x57\xaa\xe5\x30\x06\x00\xe4\x12\x99\x3f\x49\xbd\x14\xec\x34\xcd\xb5\x41\x4f\xaa\x0b\x2f\x24\x14\xfb\x19\xf5\x01\x81\x74\xb4\x6a\x7b\xe0\x20\xcf\x79\xe1\x46\x9e\xef\x66\x2e\xc6\xf3\x39\x60\x3c\xa1\xb4\xee\x4f\x1f\x52\x9f\xf3\x20\x98\xb7\xa8\xe6\x44\x8a\xe1\xdf\x90\xe6\x7c\x07\x47\x93\x6c\x71\xcb\xd0\x55\x7b\x11\x1a\x22\x0c\x63\x34\x43\xc5\x4d\x3e\x3d\x7e\x1f\xb6\x37\x87\xe8\x5f\x50\xea\x7c\xb9\x2c\x3a\xa1\xac", 208, { 0x2f, 0x2d, 0x5d, 0x34, 0x4c, 0xf8, 0x33, 0x4d, 0x62, 0x63, 0x04, 0xd4, 0x4a, 0x95, 0xa3, 0x81 }, { 0x25, 0xdb, 0x7f, 0x5c, 0x2c, 0x98, 0x9d, 0xd8, 0x09, 0x21, 0x20, 0xac, 0xc3, 0xc6, 0x48, 0x9c } }, +{ "\x6d\x61\xb9\x86\x92\x54\x4a\x82\x1e\xe8\x47\xa1\xd6\x57\x7b\x5c\xed\xaa\x90\x20\x89\x86\x24\xf6\x75\xe0\x2b\x30\x8e\xce\x27\xe7\xd5\x3b\xb5\x78\x95\xea\x8f\xae\x16\x87\x7c\x86\x48\x0e\x61\xb9\x41\x04\xf3\x01\x6d\xf2\x53\xf1\xe7\x0a\x5e\xea\x15\x30\x63\xc8\x38\x9b\x11\xad\x08\x51\x45\x5d\x9b\x93\xf9\x5b\x11\x94\x9f\x4f\x32\x6a\x38\x52\xb2\x93\xcf\x7c\x39\xd2\xc8\x70\x9b\xe9\x1e\x90\xeb\x71\xd9\x7f\xca\xab\x80\x33\x21\x93\xd4\xc3\x03\x52\x0b\xed\x39\x52\x15\x6f\x2c\xc7\x5f\x94\x5a\xa4\x6b\x13\x42\x4b\xe4\x9f\xab\x7b\x82\x1b\x96\xa4\x6c\x5b\x21\xc0\xcf\xe7\xc8\x8b\x3c\x4b\x57\xad\x37\x78\x8f\xae\x24\xed\xa3\x00\xa3\xc9\xdd\x17\x9a\xd2\x98\x18\xc1\x20\xb5\x4a\x0c\x18\x94\x48\xf8\xf3\x8b\xdf\xa0\x85\xab\x6d\x03\xb1\xe6\xd3\x70\x35\x8b\x9b\xd5\xc0\x18\x15\x7e\xa4\xa9\x94\xc5\xce\x04\x10\x3c\x2e\x07\xf1\xd7\xdc\x90\x9b\x29\xbe\x36", 209, { 0x47, 0xb6, 0xf8, 0xec, 0x56, 0x87, 0x90, 0xc1, 0x49, 0xb3, 0x79, 0xee, 0x8f, 0xca, 0x81, 0x25 }, { 0x83, 0x00, 0x30, 0x4f, 0x18, 0x2a, 0x74, 0xfa, 0x4b, 0x70, 0x99, 0x56, 0x4c, 0x64, 0x6e, 0x02 } }, +{ "\xdc\x40\x8e\x6b\x30\xc8\x6c\xe5\x70\x5e\x0f\x73\xc5\xbb\x4d\x16\x6c\x8f\x41\x39\x41\x49\x32\x36\x5f\x94\x80\xca\x1e\x7c\x38\xff\xbe\x5f\x7b\xc5\x79\x65\xa3\x61\x29\x6a\x9c\x17\x92\xdc\x50\x3e\xbe\xaa\xf9\x90\xd8\xcf\x03\xcc\x48\xf2\x31\x87\x22\x49\x05\x2f\x9d\x10\x47\x8a\xa4\x05\x30\xaf\x0e\x85\x1d\x30\xb2\x8b\x68\x43\xf9\xfc\x7f\xfe\x0c\xdc\x0d\xd8\xa0\x85\xe7\x64\xd1\x21\x49\x3c\x3b\x8c\xb7\xc9\x68\x55\x90\x3c\xba\x3d\xb9\x1b\x19\xfa\xa5\x51\x90\x53\x70\x8c\xb3\x6e\x21\x72\x09\x90\xed\x7d\x2a\x3e\x1e\xfa\x67\x52\x15\x0a\xa9\xa6\xf1\x48\xf1\x28\x48\x6c\xf5\x78\xb6\x95\x38\xcc\xd6\x2f\x54\x24\xde\xfd\x3c\xfc\xee\xf6\x6f\xe8\xc9\x63\xff\x7f\x41\x20\xdb\x1f\xcc\x03\x4b\xdf\x10\x6b\xd2\xe1\xee\xbb\xf7\x25\xcd\x55\xa1\x06\x58\x98\x5e\x88\xef\x27\x90\xcf\xd7\x1f\x97\xcf\x27\x69\xd1\x18\x3b\x92\xf0\xa5\xe2\x89\x40\xea\x7c\x01\x13\x73", 210, { 0x47, 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0xef, 0xa5, 0xdf, 0xe5, 0xe5, 0x3f, 0x0b, 0x21, 0xc8 } }, +{ "\xaf\xaa\xab\x81\x7c\xb2\xfd\x63\x72\x22\x67\xa2\x57\xba\x23\x9a\x7f\xfa\xd6\x62\xc5\xdb\x40\x4e\x10\x85\x32\x65\x9c\x16\x1d\x00\x38\x83\x90\x18\xc5\x4e\x25\x8e\x05\x9c\x52\x05\xf1\xc7\x56\xe1\x58\x99\x8b\x3a\x6e\x83\x26\x80\xe6\x15\xf0\xbe\x93\x20\xaf\x11\x1e\xc5\xc4\xa0\x6d\xc5\x7e\x88\x52\xdc\xe8\x1a\x2c\xe7\x2a\x93\xef\x50\x93\x11\x26\x9f\xb9\x96\x7f\x76\xee\x16\xd7\x19\xdb\x01\x54\x01\xb4\xb8\xec\xea\x5d\x4b\x16\xf0\x78\xdf\x9c\x4e\x98\x71\xc9\xd7\x08\xc2\x5a\x6c\xc9\x63\x5f\x8d\xb8\xf7\xa8\x8a\x62\x95\x13\xd2\x84\xaa\xb2\x59\x2c\x39\x47\x56\xb9\x45\xd4\x01\xc9\xc5\x44\x49\xb3\xb2\xc2\x45\x4c\x77\xfb\x93\x7b\xb3\x6a\xf2\xed\x0a\x55\xa1\xd7\x00\x0b\x16\x64\x4b\x22\x5a\xb6\xe9\xd7\x1e\x20\x55\x0c\xb9\xc5\xd6\xdf\xe4\x75\xe2\x12\x50\xed\x88\xb9\x7f\x8c\xae\x59\x18\x9b\xcc\xc6\x14\x37\x20\x25\x2b\x98\x1e\xa4\xc7\xc3\xc7\x3e\x93\xbe\xe2", 212, { 0x36, 0x30, 0x76, 0xec, 0x34, 0x94, 0x5a, 0x47, 0xd0, 0xb2, 0xc0, 0x2b, 0xab, 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0xba, 0xb0, 0x09, 0x05, 0xbb, 0x0a, 0x7d, 0x01, 0x9f, 0x5f, 0x29, 0x7b, 0x9b, 0x27 }, { 0x2d, 0xfd, 0xff, 0x58, 0x89, 0x99, 0x5b, 0xf2, 0x26, 0xec, 0x35, 0xd7, 0x8a, 0x28, 0x20, 0x45 } }, +{ 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0xee, 0x9b, 0xbc, 0x4b, 0x1c, 0x77, 0x01, 0x31, 0x89, 0xe1, 0xa5 } }, +{ "\x9d\x90\x4e\xab\x7d\x83\x70\xdb\x50\xf8\xce\x53\x8c\xdc\xed\x31\xe6\x0f\x90\x37\xb3\x39\x6b\x98\x42\x1f\x3a\x8b\x8a\x19\xbf\x6e\x2a\x56\xa4\x91\x09\x78\x3f\x74\x28\xc5\x16\x51\x10\x2d\xad\x80\xc5\x78\xa8\x66\x1a\x16\x62\x78\x90\xb8\x3f\xdc\x64\xaf\xe6\x97\xcc\x02\xdb\x2e\x68\xcb\x00\x2d\xaa\x86\x91\x4c\x10\x98\x3b\xc5\x39\x6c\xc6\xd0\x10\xae\x21\x70\xf2\x9d\x75\x68\x80\xcd\x18\xca\x02\xdf\x1f\x9f\x21\xae\x00\xce\xf7\xe1\x02\x09\x08\x44\x50\x15\xdd\x2e\x09\x78\xea\xd3\xf3\x63\xb7\x63\x5b\xb9\x27\x9a\x95\x16\xa9\x84\xda\xbc\xb5\x74\xa2\xda\x36\x6f\x96\x03\xb5\x94\x30\x37\x3f\x9d\xa8\xcb\xca\xa6\x54\x59\xc2\x53\x01\xa9\x73\x8d\xa3\x1c\x61\xbb\xc3\x6c\xca\xf2\xec\x7f\x33\x8e\xb6\x97\x91\x77\x59\xa8\xdd\xb0\xad\xf8\xa1\x3f\xc4\xd5\x4e\x8e\xb2\x6d\x8a\xd3\x1a\x3c\xd8\xe6\x1b\x4c\xf1\x49\x1e\xdd\x36\xb2\x6e\xe8\xc2\xf5\xca\xc4\xde\x29\x3a\x69\x60\x7a\x4b", 215, { 0x45, 0x3d, 0xeb, 0x1b, 0x86, 0x27, 0x1f, 0xe2, 0x21, 0x52, 0xb2, 0x5f, 0x68, 0x8c, 0xfe, 0xae }, { 0xb2, 0x67, 0xde, 0x20, 0xfb, 0x20, 0xdd, 0x07, 0xfe, 0x5f, 0x09, 0x03, 0x45, 0x97, 0x5d, 0x0c } }, +{ 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0x80, 0x90, 0xab, 0x87, 0xcf, 0xf1, 0xe3, 0xd4, 0x9f, 0x68, 0x49, 0x7b } }, +{ "\xaf\x9c\x97\xa7\x76\x62\x5d\x99\xbd\x23\x0e\xeb\x10\x5c\xe7\xe1\x4e\xb4\x89\x55\x9b\x67\x67\x53\x83\xb8\xa1\xdd\x37\x43\x56\xdd\x38\xa5\xae\x7b\x33\xa8\xc3\x9c\xb3\x44\x39\x28\x9d\x9a\xc6\x31\xb7\x26\x1a\xf8\x42\x2c\xa0\xd8\xc0\xbb\x1a\xa1\x05\x71\x66\x6f\x71\xf3\x9c\xeb\xd2\xb5\x1c\xdd\xb4\x6e\xf4\x1f\x01\xa0\xac\x24\x0b\xa4\x1f\x70\xd5\xf1\x3e\xcd\x63\x5a\x90\xcf\x1b\x6a\x8e\x91\x49\x01\x04\x40\xd4\x6a\x58\x59\xed\x60\xdd\xd7\xf2\x56\x54\xd9\x41\xc0\x4d\x00\x8e\xda\x3d\x70\xdb\xed\x57\x2b\x74\xf2\x81\xa0\xfd\xdd\xd1\x75\x1c\xc1\x4a\x9d\x6e\x78\x8b\xb4\xef\xf6\x9f\xd7\xec\x92\xb3\xd0\xd4\xff\x69\xc9\x5d\x53\x97\xac\x2d\x48\xd1\xa9\x2a\xe7\x4e\x9e\x36\xe2\xbf\xcc\x1e\xce\xa5\x78\x9d\x29\x92\x61\x01\xc3\xc0\xf5\xe8\x5f\x28\xc7\xca\xcc\xe4\xab\xb8\xc2\xbf\x5d\xac\x69\xb8\x45\x07\x83\x0c\xb3\x24\x14\xd1\x36\xc4\x74\xee\x2b\xf4\x2a\x13\x48\x51\x0d\xcc\xa4\x91", 217, { 0x65, 0x0a, 0xb2, 0xdd, 0x0e, 0x6f, 0x4d, 0x2b, 0xd6, 0xb6, 0xed, 0x1f, 0xbf, 0x6c, 0x32, 0x7b }, { 0xeb, 0xeb, 0x10, 0xee, 0xc2, 0x0d, 0xaf, 0xca, 0x9b, 0x7d, 0x32, 0x99, 0x26, 0x47, 0xd3, 0x80 } }, +{ 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0x4a, 0x16, 0xcb, 0x6f, 0xa1, 0x99, 0x51, 0x67, 0x0c, 0xd4, 0x2a, 0xdb, 0x5b } }, +{ "\x32\xe5\x68\x04\x69\xe8\xf7\x55\x53\xe9\xe4\x33\xfb\xdb\x0f\x79\xf9\xba\x52\x81\x16\x35\x80\x01\x95\x97\x46\xb0\xc8\x1e\xec\x95\x6e\x28\x76\xa2\x78\x9e\x47\xcf\x98\x0d\xd6\x1e\x91\xfd\x46\xe6\x10\x74\xf4\x5d\x77\xce\x99\xeb\x82\x03\x56\xf1\xc4\x0b\xd4\xf8\xd6\xa7\x63\x72\x58\xaa\x28\xcf\x2b\x9b\x0e\x58\xf6\x5f\xcd\x13\x37\x5b\x31\x2a\xb9\x89\x2e\xe6\x3f\xb5\xaf\xa8\x12\x07\x82\x9d\x31\x83\xf4\xd9\x6e\xe7\xf9\xde\x86\x53\x79\xbd\xba\x68\x17\xf3\x93\x5a\x02\xc7\xae\x1e\x81\x52\x26\xa6\xce\x3a\x7f\xe2\x83\xa8\x1d\x52\xcc\xb5\x50\x1d\x84\xe3\xcf\x4f\xaf\x48\x17\x53\xa4\x74\xc2\xf8\x52\xaf\xb7\x22\x5e\x23\xfd\xa8\xfd\x99\xdb\x79\x22\x62\xb1\xec\x5c\x63\x95\xad\xde\x2d\x19\x5c\xcd\x22\x2a\xbe\xe9\xa3\xf1\xae\x65\xab\xc5\x87\x08\xe5\x23\x37\x9b\x06\x61\xae\x79\x6d\xaa\x75\x9f\xeb\x95\x25\xc7\xaa\xcc\xe5\x01\xa4\x14\x4d\x48\xca\x0f\xb2\x15\x36\xa6\x40\x07\x3c\x8b\x30\xb0", 219, { 0xf1, 0xd1, 0x11, 0x7b, 0xa9, 0x09, 0xc9, 0xe5, 0xbb, 0x14, 0x99, 0x1c, 0x38, 0xf3, 0x33, 0xd4 }, { 0xb5, 0xf9, 0x32, 0x35, 0x5e, 0x4f, 0x1d, 0x1c, 0xd0, 0xc1, 0xc7, 0xa4, 0x35, 0x97, 0x3e, 0x9e } }, +{ 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0x51, 0x29, 0x7e, 0x2a, 0xfa, 0xe5, 0x25, 0xe2, 0x9d, 0xe3, 0x0f, 0x54, 0x6b, 0xdc, 0xb8 } }, +{ "\x79\x41\x40\x35\x11\x5f\x8e\xca\x9d\x02\x43\x63\x6e\xda\xf5\x12\xf0\x09\x0f\x54\x2f\xab\xab\x04\x39\x8d\xd3\x80\xb8\x88\xfe\xb3\xa9\x06\x99\xbc\x0c\x1e\x2d\x84\x88\x16\x7b\x88\xbe\x88\x2c\x91\x2c\xc5\x1e\x4d\xf2\x66\x8b\x70\x05\x65\x2f\x86\x3e\x74\x89\xd8\xbf\x63\x85\x0e\xcc\x1e\xc9\xc8\xc6\x02\x0d\x97\xb1\xcc\x93\xf2\x6f\x91\x67\xf7\x2b\x50\x47\x60\x15\x1d\x6f\xf9\xe8\xe9\xc7\xd1\xe0\x71\x0b\xc9\x13\x10\xc7\x20\xc1\x0f\x5d\x59\x58\x1f\xc9\xbb\xc7\xcd\xfb\xdb\x8a\x7f\x68\x29\x6e\xf6\x63\xf3\x2b\xb2\x21\x1e\x19\x58\x17\x7f\x1c\xe2\xcc\x08\xb9\x54\x12\x56\xf0\xd5\xf2\xd1\x51\x94\x8c\xbe\x9c\x6b\x33\x3d\x9d\x9e\x9c\x25\x29\xf3\xc9\x64\x13\x31\xc9\x0b\xe7\x72\x2e\x61\xab\xb8\x13\x32\xd4\xab\xf9\x37\xa2\x70\x2c\x59\x7c\x64\xda\x26\x74\x58\xc0\x86\x49\x94\x0b\x34\xcb\x55\x04\x32\xaa\xfe\x13\xb9\x29\x56\xf6\x15\x47\xbc\x61\xe3\x33\x45\x35\xf7\x24\xd6\xcc\x05\x01\x7d\xed\x04\xf4", 221, { 0xe7, 0xc2, 0x31, 0x1f, 0xd9, 0xf4, 0x61, 0x5f, 0xd8, 0x95, 0x1b, 0x9e, 0x97, 0x39, 0xea, 0x49 }, { 0x8c, 0xc2, 0x1c, 0xde, 0x8a, 0xce, 0xe3, 0xbb, 0x83, 0x07, 0xab, 0x26, 0x42, 0x54, 0x46, 0xd4 } }, +{ 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223, { 0x9f, 0x7e, 0x99, 0x2c, 0xc1, 0xd0, 0xc3, 0xa4, 0x8e, 0x28, 0x5f, 0x61, 0xb8, 0xba, 0x48, 0x00 }, { 0x8a, 0x17, 0x22, 0x9e, 0x4e, 0x01, 0xfe, 0xa6, 0x28, 0xfc, 0x1a, 0x76, 0x18, 0x59, 0x79, 0xc2 } }, +{ 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0x8c }, { 0xe8, 0xbc, 0xb1, 0xa4, 0xc0, 0xc5, 0xfe, 0xbe, 0x3c, 0xaa, 0xb9, 0xbb, 0xa8, 0x16, 0x6d, 0x0c } }, +{ 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0x00 }, { 0xfc, 0x85, 0x56, 0x65, 0x37, 0xba, 0x0f, 0x5f, 0xfb, 0x71, 0xfa, 0x99, 0x56, 0x6b, 0x6a, 0xae } }, +{ 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0x78, 0xec }, { 0x4b, 0xd4, 0xe7, 0x5c, 0x99, 0xc4, 0xfd, 0xda, 0xb1, 0x5e, 0xc9, 0x72, 0x2b, 0x7e, 0x77, 0xc5 } }, +{ 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0x17, 0x7a, 0x20 }, { 0x9f, 0x92, 0xe0, 0x7d, 0x11, 0x03, 0xa8, 0x84, 0x9d, 0x8e, 0xc3, 0x8c, 0x2a, 0x84, 0x84, 0x2e } }, +{ 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0xe7, 0xc2, 0x94 }, { 0x8a, 0x8b, 0x22, 0xc1, 0xbe, 0x95, 0x5e, 0x41, 0x74, 0x36, 0xb9, 0x62, 0xe3, 0x03, 0x8f, 0xcd } }, +{ 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0x23, 0x9e, 0x19, 0x3d }, { 0x5f, 0x22, 0xf1, 0x37, 0x20, 0x62, 0x91, 0x88, 0xdd, 0xbc, 0x10, 0x78, 0x8b, 0x5f, 0x6b, 0x1b } }, +{ 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0x8d, 0x3a, 0xdf, 0xcb, 0x0a }, { 0xd9, 0x90, 0xb3, 0xb1, 0x4c, 0x9c, 0xa9, 0x8a, 0x86, 0x1e, 0xdc, 0x95, 0x07, 0xdb, 0xde, 0xe2 } }, +{ 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0x96, 0xd7, 0xe6, 0x3d, 0x6f }, { 0xf6, 0x35, 0xd9, 0xfb, 0x02, 0xb9, 0x5c, 0x7c, 0x7c, 0x85, 0xe4, 0x3a, 0x3c, 0x2f, 0x90, 0x81 } }, +{ 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0x8c, 0xf8, 0xc0, 0xad, 0x8a, 0xf2 }, { 0x40, 0xaa, 0x53, 0x89, 0x9f, 0x2a, 0xec, 0xb2, 0x4b, 0x6f, 0x06, 0xcd, 0x79, 0x05, 0xf4, 0xdc } }, +{ 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0xd4, 0xbd, 0xb5, 0xa1, 0x4b, 0x6a, 0xa1 }, { 0x3b, 0x7f, 0xf8, 0x14, 0x54, 0x57, 0x97, 0x4a, 0x2d, 0x72, 0x8e, 0x25, 0xb0, 0xbb, 0x9f, 0xd7 } }, +{ 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0xed, 0x60, 0x27, 0x01, 0xde, 0x7e, 0x9b }, { 0x93, 0xfd, 0x96, 0x60, 0x2e, 0xce, 0x57, 0x7d, 0x5d, 0x19, 0xbd, 0x4d, 0x2a, 0xe8, 0xd7, 0x49 } }, +{ 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0xd4, 0x8c, 0xa7, 0x7f, 0x19, 0xac, 0x6d, 0xde }, { 0x50, 0x37, 0x05, 0xd2, 0x93, 0xdf, 0xca, 0x2c, 0x5b, 0xc1, 0xf6, 0x96, 0xfc, 0x1e, 0x87, 0xe7 } }, +{ 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0xcd, 0x5e, 0x6d, 0x87, 0x0e, 0x53, 0xd7, 0x04, 0xc2 }, { 0x98, 0x4c, 0xc5, 0x28, 0x8b, 0xea, 0x22, 0x16, 0x04, 0xf1, 0xbe, 0x29, 0xe4, 0x7b, 0xd4, 0x71 } }, +{ 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0x42, 0xbd, 0x7c, 0xf3, 0x5e, 0x47, 0xe6, 0x01, 0x57 }, { 0x39, 0x2f, 0x6a, 0xf3, 0xc4, 0xbc, 0x2d, 0x78, 0x3c, 0x36, 0x34, 0x3e, 0x26, 0x64, 0xa1, 0x47 } }, +{ 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0xd2, 0xd8, 0x7e, 0xc0, 0x7a, 0x7d, 0xca, 0x30, 0x5a, 0x5f }, { 0xb2, 0x56, 0x44, 0xea, 0x6a, 0xbc, 0xd0, 0x10, 0x0d, 0x33, 0xbf, 0x6d, 0x08, 0xed, 0xdf, 0xed } }, +{ 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0x8d, 0xcb, 0x02, 0xae, 0x7a, 0x38, 0x39, 0x21, 0xdd, 0x9c, 0xc7 }, { 0x7a, 0xb4, 0x49, 0xeb, 0x4e, 0x92, 0x3b, 0x27, 0x46, 0x30, 0x27, 0xb4, 0x98, 0xe2, 0xc1, 0x93 } }, +{ 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0x3a, 0x8a, 0x3b, 0x9c, 0x41, 0x4c, 0xba, 0x9f, 0x8a, 0xac, 0xfc }, { 0xa9, 0xd4, 0x39, 0x30, 0x85, 0xcf, 0x3e, 0xcb, 0xd8, 0xfa, 0x48, 0x2c, 0xea, 0x91, 0x45, 0xbf } }, +{ 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0xb6, 0x28, 0x5f, 0x04, 0xf5, 0x97, 0xfc, 0x9c, 0xe2, 0xcd, 0x25, 0xff }, { 0x52, 0x52, 0x62, 0xbc, 0xb1, 0xd4, 0xf5, 0x62, 0x7c, 0xb8, 0xe4, 0x0c, 0x3b, 0x66, 0x7e, 0xfd } }, +{ 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0x92, 0x93, 0x22, 0x1d, 0xba, 0x9e, 0x12, 0x48, 0xad, 0x80, 0x17, 0xeb, 0xf5 }, { 0x1d, 0x12, 0x30, 0xf2, 0x86, 0xf2, 0x5b, 0x3b, 0x72, 0xae, 0x34, 0x41, 0x1e, 0xc7, 0xfb, 0x02 } }, +{ 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0xb6, 0xef, 0x44, 0xa1, 0x86, 0xba, 0x58, 0x96, 0xd7, 0x6d, 0x1e, 0x16, 0x49 }, { 0x29, 0x3a, 0x48, 0x8c, 0x74, 0xe4, 0xf7, 0xb0, 0x94, 0x74, 0xbc, 0x6b, 0x9f, 0x43, 0xad, 0xe5 } }, +{ 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0x79, 0xf1, 0x29, 0x42, 0xab, 0xe4, 0x88, 0xd4, 0xcc, 0xc9, 0x6f, 0x61, 0x0d, 0xc4 }, { 0x24, 0xa6, 0x24, 0x91, 0x12, 0xf3, 0x91, 0x62, 0xe9, 0xee, 0x66, 0x65, 0x78, 0xb4, 0xcb, 0xae } }, +{ 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0x64, 0x04, 0xd5, 0x1d, 0x0a, 0xdb, 0x88, 0x92, 0xd8, 0x74, 0x49, 0x4b, 0x31, 0xbb, 0xfd }, { 0xcd, 0x10, 0x54, 0xc1, 0x45, 0x03, 0xfc, 0x6a, 0x1a, 0x26, 0x42, 0x5e, 0xa7, 0x1f, 0x7a, 0x06 } }, +{ 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249, { 0x9c, 0xe3, 0xd3, 0xda, 0x93, 0xe3, 0x04, 0xe4, 0x55, 0x0e, 0xf8, 0x78, 0xf6, 0x0a, 0x5d, 0x9f }, { 0x73, 0x00, 0xee, 0x41, 0x00, 0xfc, 0x15, 0x3c, 0x0a, 0xc7, 0x3c, 0x6d, 0x7d, 0xb2, 0x12, 0xe8 } }, +{ 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250, { 0x42, 0x41, 0xe9, 0x70, 0x50, 0x32, 0x76, 0xf1, 0x17, 0xa3, 0x66, 0x30, 0x33, 0x81, 0xcc, 0xb0 }, { 0xa8, 0x2f, 0x02, 0x9c, 0xc3, 0x3a, 0x2b, 0x87, 0xb6, 0x71, 0x06, 0x51, 0x29, 0x56, 0x86, 0x43 } }, +{ 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251, { 0x73, 0xab, 0x71, 0xf4, 0x80, 0xe0, 0xde, 0x55, 0x5d, 0x84, 0xb4, 0x0e, 0xa9, 0x75, 0xcd, 0x41 }, { 0x03, 0xf9, 0x7f, 0x5f, 0xb2, 0xa0, 0x32, 0x4b, 0x05, 0xfb, 0x57, 0xcd, 0x7a, 0x8b, 0xba, 0x6e } }, +{ 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1024, { 0x0f, 0x8e, 0xd6, 0xd2, 0xcf, 0xd8, 0x82, 0xf7, 0x83, 0x53, 0x6e, 0x6f, 0xa7, 0x7c, 0x84, 0x96 }, { 0x00, 0x71, 0xe5, 0xdd, 0x67, 0xfe, 0x3b, 0x78, 0xa5, 0x60, 0x9f, 0x68, 0xea, 0x11, 0x64, 0x1b } }, +{ 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2049, { 0x5a, 0x33, 0x45, 0xe4, 0x79, 0x8f, 0x39, 0xf3, 0x7b, 0x0e, 0xdb, 0x2d, 0xbc, 0x8c, 0x82, 0x23 }, { 0xa1, 0x4d, 0x19, 0x1d, 0x14, 0xd3, 0x45, 0x74, 0xfa, 0x6e, 0x97, 0x70, 0x46, 0xd8, 0x51, 0xb0 } }, + diff --git a/os/portable.h b/os/portable.h index 1dcd0963..0c9e65e5 100644 --- a/os/portable.h +++ b/os/portable.h @@ -84,11 +84,22 @@ #define CONFIG_X86_64 1 #endif -#if defined(__aarch64__) && defined(__ARM_FEATURE_CRC32) +#if defined(__aarch64__) +#if defined(__ARM_NEON) || defined(__ARM_NEON__) +#define CONFIG_NEON 1 +#endif +#if defined(__ARM_FEATURE_CRC32) #define CONFIG_ARM_CRC 1 #endif #endif +#if defined(__arm__) +#if defined(__ARM_NEON) || defined(__ARM_NEON__) +#define CONFIG_NEON32 1 +#endif +#endif +#endif + /** * Includes some platform specific headers. */ @@ -132,7 +143,6 @@ #include #endif - /** * Includes some standard headers. */ diff --git a/raid/cpu.h b/raid/cpu.h index 0933133a..3fc42bb1 100644 --- a/raid/cpu.h +++ b/raid/cpu.h @@ -260,6 +260,26 @@ static inline int raid_cpu_has_avx2gfni(void) return raid_cpu_match_avx(leaf_1_ecx, leaf_7_ebx, leaf_7_ecx, xcr0); } +static inline int raid_cpu_has_avx512f(void) +{ + /* + * Intel Architecture Instruction Set Extensions Programming Reference + * 319433-022 October 2014 + * + * 2.2 Detection of 512-bit Instruction Groups of Intel AVX-512 Family + * 1) Detect CPUID.1:ECX.OSXSAVE[bit 27] = 1 (XGETBV enabled for application use) + * 2) Execute XGETBV and verify that XCR0[7:5] = `111b' (OPMASK state, upper 256-bit of + * ZMM0-ZMM15 and ZMM16-ZMM31 state are enabled by OS) and that XCR0[2:1] = `11b' + * (XMM state and YMM state are enabled by OS). + * 3) Verify CPUID.0x7.0:EBX.AVX512F[bit 16] = 1. + */ + uint32_t leaf_1_ecx = 1 << 27; /* XSAVE/XGETBV */ + uint32_t leaf_7_ebx = 1 << 16; /* AVX512F */ + uint32_t xcr0 = (3 << 1) | (7 << 5); /* OS saves XMM, YMM and ZMM registers */ + + return raid_cpu_match_avx(leaf_1_ecx, leaf_7_ebx, 0, xcr0); +} + static inline int raid_cpu_has_avx512bw(void) { /* diff --git a/smhasher3/MurmurHash3-128-snapraid.txt b/smhasher3/MurmurHash3-128-snapraid.txt index 00a97eb4..a26cda0f 100644 --- a/smhasher3/MurmurHash3-128-snapraid.txt +++ b/smhasher3/MurmurHash3-128-snapraid.txt @@ -1,8 +1,3 @@ -WARNING: Hash with verification code 4a6673e7 was already registered: MetroHash-128 - Are you certain MetroHash-128.snapraid is a unique implementation? -WARNING: Hash with verification code d5f2cd8c was already registered: MetroHash-128 - Are you certain MetroHash-128.snapraid is a unique implementation? -------------------------------------------------------------------------------- --- Testing MurmurHash3-128.snapraid "MurmurHash3 x86_128 with SnapRAID 128-bit seed interface" [[[ Sanity Tests ]]] diff --git a/smhasher3/MuseAir-128.bfast-snapraid.txt b/smhasher3/MuseAir-128.bfast-snapraid.txt index 9f053611..d5744310 100644 --- a/smhasher3/MuseAir-128.bfast-snapraid.txt +++ b/smhasher3/MuseAir-128.bfast-snapraid.txt @@ -1,4 +1,3 @@ -------------------------------------------------------------------------------- --- Testing MuseAir-128.bfast-snapraid "MuseAir v2, BFast-128, SnapRAID long-path short-input extension" [[[ Sanity Tests ]]] diff --git a/smhasher3/README b/smhasher3/README index 91cb73c7..8f32afc5 100644 --- a/smhasher3/README +++ b/smhasher3/README @@ -21,6 +21,35 @@ Date: Tue Aug 4 11:58:32 2026 -0700 Files and results ================= +xxh3_snapraid.cpp + XXH3-128 as used by SnapRAID. All inputs use the long accumulator + mode. Inputs shorter than 64 bytes are zero-padded to 64 bytes, with + the original length retained in finalization. + +XXH3-128-snapraid.txt + SMHasher3 output for xxh3_snapraid.cpp, using SSE2. + + Result comparison: + The SnapRAID variant passes 250 of 252 tests, compared with 214 of 250 + in the archived official XXH3-128 result. Always using the Long path + removes the observed short-input BIC failures and many seed-test + failures. Sanity, Avalanche and BIC all pass. + + Two failures remain. Bitflip finds excess collisions in the high + 32 bits for 20-byte inputs when flipping input bit 84: 2291 collisions + versus 2047.3 expected. This isolated anomaly needs confirmation with + different seeds. SeedZeroes shows strong differential collision and + distribution biases for all-zero inputs with lengths up to 8448 bytes + and sparse or complemented sparse seeds. The direct hash distribution + passes; the failure concerns XOR differences between hashes. + + Official XXH3 also fails SeedZeroes. The remaining failure is consistent + with a limitation of the shared Long path, although these results alone + do not establish its cause. No full 128-bit collisions were observed. + MuseAir and SpookyHash V2 have cleaner results, passing all 252 tests. + The seed tests cover duplicated 64-bit seeds, not independent 128-bit + seed halves. + museair_snapraid.cpp MuseAir BFast-128 as used by SnapRAID. Inputs shorter than 32 bytes are zero-padded to 32 bytes and processed with the Long path while @@ -71,7 +100,7 @@ Seed mapping SMHasher3 exposes one 64-bit seed_t, while SnapRAID uses 128-bit seeds. -For MuseAir and SpookyHash V2: +For XXH3, MuseAir and SpookyHash V2: seed[0..7] = seed_t seed[8..15] = seed_t @@ -95,6 +124,7 @@ Copy the adapters into the SMHasher3 hashes directory: hashes/museair_snapraid.cpp hashes/spooky2_snapraid.cpp hashes/murmur3_snapraid.cpp +hashes/xxh3_snapraid.cpp Add them to hashes/Hashsrc.cmake and rebuild SMHasher3. @@ -106,6 +136,10 @@ Check the registrations with: Generating the result files =========================== +./SMHasher3 XXH3-128-snapraid \ + --extra --notest=Speed,Hashmap --ncpu=16 \ + > ../../../../smhasher3/XXH3-128-snapraid.txt 2>&1 + ./SMHasher3 MuseAir-128.bfast-snapraid \ --extra --notest=Speed,Hashmap --ncpu=16 \ > MuseAir-128.bfast-snapraid.txt 2>&1 @@ -127,6 +161,7 @@ The authoritative implementations remain the SnapRAID source files: cmdline/museair.c cmdline/spooky2.c cmdline/murmur3.c +cmdline/xxh3.c SnapRAID repository: diff --git a/smhasher3/SpookyHash2-128-snapraid.txt b/smhasher3/SpookyHash2-128-snapraid.txt index d6506a88..cf11fbfc 100644 --- a/smhasher3/SpookyHash2-128-snapraid.txt +++ b/smhasher3/SpookyHash2-128-snapraid.txt @@ -1,4 +1,3 @@ -------------------------------------------------------------------------------- --- Testing SpookyHash2-128-snapraid "SpookyHash v2 128-bit, SnapRAID long-path-only variant" [[[ Sanity Tests ]]] diff --git a/smhasher3/XXH3-128-snapraid.txt b/smhasher3/XXH3-128-snapraid.txt new file mode 100644 index 00000000..fefd8e4a --- /dev/null +++ b/smhasher3/XXH3-128-snapraid.txt @@ -0,0 +1,3748 @@ +--- Testing XXH3-128-snapraid "XXH3-128, SnapRAID long mode for all input lengths" [sse2] + +[[[ Sanity Tests ]]] + +Verification value CE 0xCFAD116F ...... PASS +Running sanity check 1 .......... PASS +Running sanity check 2 .......... PASS +Running append zeroes test .......... PASS +Running prepend zeroes test .......... PASS +Running thread-safety test 1 .......... PASS +Running thread-safety test 2 .......... PASS + +[[[ Avalanche Tests ]]] + +Testing 3-byte keys, 300000 reps..................max is 0.642% at bit 7 -> out 117 (^ 0) +Testing 4-byte keys, 300000 reps..................max is 0.696% at bit 5 -> out 71 (^ 1) +Testing 5-byte keys, 300000 reps..................max is 0.645% at bit 1 -> out 46 (^ 0) +Testing 6-byte keys, 300000 reps..................max is 0.727% at bit 13 -> out 4 (^ 1) +Testing 7-byte keys, 300000 reps..................max is 0.794% at bit 18 -> out 3 (^ 3) +Testing 8-byte keys, 300000 reps..................max is 0.721% at bit 50 -> out 62 (^ 1) +Testing 9-byte keys, 300000 reps..................max is 0.769% at bit 38 -> out 88 (^ 2) +Testing 10-byte keys, 300000 reps..................max is 0.731% at bit 45 -> out 123 (^ 1) +Testing 12-byte keys, 300000 reps..................max is 0.738% at bit 33 -> out 16 (^ 1) +Testing 16-byte keys, 300000 reps..................max is 0.742% at bit 124 -> out 13 (^ 0) +Testing 20-byte keys, 300000 reps..................max is 0.779% at bit 73 -> out 121 (^ 1) +Testing 24-byte keys, 300000 reps..................max is 0.676% at bit 131 -> out 125 (^ 0) +Testing 28-byte keys, 300000 reps..................max is 0.791% at bit 88 -> out 96 (^ 1) +Testing 32-byte keys, 300000 reps..................max is 0.792% at bit 155 -> out 69 (^ 1) +Testing 40-byte keys, 300000 reps..................max is 0.785% at bit 226 -> out 23 (^ 0) +Testing 48-byte keys, 300000 reps..................max is 0.775% at bit 206 -> out 10 (^ 0) +Testing 56-byte keys, 300000 reps..................max is 0.826% at bit 20 -> out 15 (^ 1) +Testing 64-byte keys, 300000 reps..................max is 0.821% at bit 102 -> out 62 (^ 1) +Testing 128-byte keys, 300000 reps..................max is 0.833% at bit 112 -> out 3 (^ 1) +Testing 160-byte keys, 300000 reps..................max is 0.809% at bit 965 -> out 43 (^ 0) +Testing 192-byte keys, 300000 reps..................max is 0.806% at bit 1258 -> out 125 (^ 0) + + +[[[ BIC 'Bit Independence Criteria' Tests ]]] + +Testing 3-byte keys, 1200000 reps............max 0.0043 at bit 16 -> out ( 48, 73) (^ 1) +Testing 4-byte keys, 1200000 reps............max 0.0045 at bit 17 -> out ( 0, 90) (^ 2) +Testing 6-byte keys, 1200000 reps............max 0.0047 at bit 39 -> out ( 0, 16) (^ 3) +Testing 8-byte keys, 1200000 reps............max 0.0044 at bit 37 -> out ( 28,111) (^ 0) +Testing 11-byte keys, 1200000 reps............max 0.0042 at bit 52 -> out ( 31, 65) (^ 0) +Testing 15-byte keys, 1200000 reps............max 0.0049 at bit 59 -> out ( 27,115) (^ 3) +Testing 28-byte keys, 600000 reps............max 0.0064 at bit 33 -> out ( 35, 99) (^ 0) +Testing 52-byte keys, 600000 reps............max 0.0065 at bit 304 -> out ( 49,107) (^ 0) + + +[[[ Keyset 'Zeroes' Tests ]]] + +Keyset 'Zeroes' - 204800 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 4.9, actual 2 (0.410x) (^ 0) +Testing all collisions (low 32-bit) - Expected 4.9, actual 6 (1.229x) (^ 1) +Testing all collisions (high 27-bit) - Expected 156.2, actual 152 (0.973x) (^ 0) +Testing all collisions (low 27-bit) - Expected 156.2, actual 176 (1.127x) (^ 3) +Testing all collisions (high 16..30 bits) - Worst is 29 bits: 42/39 (1.075x) (^ 0) +Testing all collisions (low 16..30 bits) - Worst is 27 bits: 176/156 (1.127x) (^ 0) +Testing distribution (any 8..15 bits) - Worst bias is 15 bits at bit 48: 0.497x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 4.9, actual 10 (2.048x) (^ 4) +Testing all collisions (low 32-bit) - Expected 4.9, actual 6 (1.229x) (^ 1) +Testing all collisions (high 27-bit) - Expected 156.2, actual 160 (1.025x) (^ 1) +Testing all collisions (low 27-bit) - Expected 156.2, actual 166 (1.063x) (^ 2) +Testing all collisions (high 16..30 bits) - Worst is 30 bits: 29/20 (1.485x) (^ 1) +Testing all collisions (low 16..30 bits) - Worst is 23 bits: 2561/2480 (1.033x) (^ 0) +Testing distribution (any 8..15 bits) - Worst bias is 13 bits at bit 25: 0.595x (^ 0) + + +[[[ Keyset 'Cyclic' Tests ]]] + +Keyset 'Cyclic' - 4 cycles of 3 bytes - 1000000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 116.4, actual 122 (1.048x) (^ 1) +Testing all collisions (low 32-bit) - Expected 116.4, actual 150 (1.289x) (^ 9) +Testing all collisions (high 16..35 bits) - Worst is 35 bits: 21/15 (1.443x) (^ 0) +Testing all collisions (low 16..35 bits) - Worst is 33 bits: 87/58 (1.495x) (^ 7) + +Keyset 'Cyclic' - 4 cycles of 4 bytes - 1000000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 116.4, actual 130 (1.117x) (^ 3) +Testing all collisions (low 32-bit) - Expected 116.4, actual 126 (1.082x) (^ 2) +Testing all collisions (high 16..35 bits) - Worst is 31 bits: 257/233 (1.104x) (^ 0) +Testing all collisions (low 16..35 bits) - Worst is 34 bits: 43/29 (1.477x) (^ 2) + +Keyset 'Cyclic' - 4 cycles of 5 bytes - 1000000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 116.4, actual 101 (0.868x) (^ 0) +Testing all collisions (low 32-bit) - Expected 116.4, actual 82 (0.704x) (^ 0) +Testing all collisions (high 16..35 bits) - Worst is 25 bits: 14843/14754 (1.006x) (^ 0) +Testing all collisions (low 16..35 bits) - Worst is 19 bits: 553711/553555 (1.000x) (^ 0) + +Keyset 'Cyclic' - 4 cycles of 8 bytes - 1000000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 116.4, actual 127 (1.091x) (^ 2) +Testing all collisions (low 32-bit) - Expected 116.4, actual 118 (1.014x) (^ 1) +Testing all collisions (high 16..35 bits) - Worst is 24 bits: 29578/29219 (1.012x) (^ 1) +Testing all collisions (low 16..35 bits) - Worst is 29 bits: 970/931 (1.042x) (^ 0) + +Keyset 'Cyclic' - 8 cycles of 3 bytes - 1000000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 116.4, actual 117 (1.000x) (^ 1) +Testing all collisions (low 32-bit) - Expected 116.4, actual 110 (0.945x) (^ 0) +Testing all collisions (high 16..35 bits) - Worst is 29 bits: 995/931 (1.069x) (^ 1) +Testing all collisions (low 16..35 bits) - Worst is 26 bits: 7560/7414 (1.020x) (^ 0) + +Keyset 'Cyclic' - 8 cycles of 4 bytes - 1000000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 116.4, actual 118 (1.014x) (^ 1) +Testing all collisions (low 32-bit) - Expected 116.4, actual 106 (0.911x) (^ 0) +Testing all collisions (high 16..35 bits) - Worst is 25 bits: 15196/14754 (1.030x) (^ 8) +Testing all collisions (low 16..35 bits) - Worst is 25 bits: 14846/14754 (1.006x) (^ 0) + +Keyset 'Cyclic' - 8 cycles of 5 bytes - 1000000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 116.4, actual 106 (0.911x) (^ 0) +Testing all collisions (low 32-bit) - Expected 116.4, actual 122 (1.048x) (^ 1) +Testing all collisions (high 16..35 bits) - Worst is 22 bits: 110595/110274 (1.003x) (^ 0) +Testing all collisions (low 16..35 bits) - Worst is 29 bits: 986/931 (1.059x) (^ 0) + +Keyset 'Cyclic' - 8 cycles of 8 bytes - 1000000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 116.4, actual 115 (0.988x) (^ 0) +Testing all collisions (low 32-bit) - Expected 116.4, actual 122 (1.048x) (^ 1) +Testing all collisions (high 16..35 bits) - Worst is 22 bits: 110934/110274 (1.006x) (^ 1) +Testing all collisions (low 16..35 bits) - Worst is 34 bits: 42/29 (1.443x) (^ 1) + +Keyset 'Cyclic' - 12 cycles of 3 bytes - 1000000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 116.4, actual 150 (1.289x) (^ 9) +Testing all collisions (low 32-bit) - Expected 116.4, actual 99 (0.850x) (^ 0) +Testing all collisions (high 16..35 bits) - Worst is 32 bits: 150/116 (1.289x) (^ 4) +Testing all collisions (low 16..35 bits) - Worst is 23 bits: 57460/57305 (1.003x) (^ 0) + +Keyset 'Cyclic' - 12 cycles of 4 bytes - 1000000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 116.4, actual 112 (0.962x) (^ 0) +Testing all collisions (low 32-bit) - Expected 116.4, actual 112 (0.962x) (^ 0) +Testing all collisions (high 16..35 bits) - Worst is 29 bits: 959/931 (1.030x) (^ 0) +Testing all collisions (low 16..35 bits) - Worst is 24 bits: 29403/29219 (1.006x) (^ 0) + +Keyset 'Cyclic' - 12 cycles of 5 bytes - 1000000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 116.4, actual 116 (1.000x) (^ 0) +Testing all collisions (low 32-bit) - Expected 116.4, actual 126 (1.082x) (^ 2) +Testing all collisions (high 16..35 bits) - Worst is 30 bits: 479/466 (1.029x) (^ 0) +Testing all collisions (low 16..35 bits) - Worst is 32 bits: 126/116 (1.082x) (^ 0) + +Keyset 'Cyclic' - 12 cycles of 8 bytes - 1000000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 116.4, actual 108 (0.928x) (^ 0) +Testing all collisions (low 32-bit) - Expected 116.4, actual 128 (1.100x) (^ 2) +Testing all collisions (high 16..35 bits) - Worst is 20 bits: 355853/355464 (1.001x) (^ 0) +Testing all collisions (low 16..35 bits) - Worst is 23 bits: 57940/57305 (1.011x) (^ 3) + +Keyset 'Cyclic' - 16 cycles of 3 bytes - 1000000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 116.4, actual 127 (1.091x) (^ 2) +Testing all collisions (low 32-bit) - Expected 116.4, actual 110 (0.945x) (^ 0) +Testing all collisions (high 16..35 bits) - Worst is 33 bits: 76/58 (1.306x) (^ 1) +Testing all collisions (low 16..35 bits) - Worst is 31 bits: 240/233 (1.031x) (^ 0) + +Keyset 'Cyclic' - 16 cycles of 4 bytes - 1000000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 116.4, actual 138 (1.186x) (^ 5) +Testing all collisions (low 32-bit) - Expected 116.4, actual 109 (0.936x) (^ 0) +Testing all collisions (high 16..35 bits) - Worst is 25 bits: 15034/14754 (1.019x) (^ 2) +Testing all collisions (low 16..35 bits) - Worst is 30 bits: 494/466 (1.061x) (^ 0) + +Keyset 'Cyclic' - 16 cycles of 5 bytes - 1000000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 116.4, actual 107 (0.919x) (^ 0) +Testing all collisions (low 32-bit) - Expected 116.4, actual 120 (1.031x) (^ 1) +Testing all collisions (high 16..35 bits) - Worst is 27 bits: 3788/3716 (1.019x) (^ 0) +Testing all collisions (low 16..35 bits) - Worst is 33 bits: 70/58 (1.203x) (^ 0) + +Keyset 'Cyclic' - 16 cycles of 8 bytes - 1000000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 116.4, actual 131 (1.125x) (^ 3) +Testing all collisions (low 32-bit) - Expected 116.4, actual 141 (1.211x) (^ 6) +Testing all collisions (high 16..35 bits) - Worst is 30 bits: 512/466 (1.100x) (^ 1) +Testing all collisions (low 16..35 bits) - Worst is 32 bits: 141/116 (1.211x) (^ 1) + + +[[[ Keyset 'Sparse' Tests ]]] + +Keyset 'Sparse' - 2-byte keys with up to 6 bits set - 14893 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 32-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 20-bit) - Expected 105.3, actual 87 (0.827x) (^ 0) +Testing all collisions (low 20-bit) - Expected 105.3, actual 102 (0.969x) (^ 0) +Testing all collisions (high 10..23 bits) - Worst is 15 bits: 2936/2925 (1.004x) (^ 0) +Testing all collisions (low 10..23 bits) - Worst is 13 bits: 8111/8031 (1.010x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 32-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 20-bit) - Expected 105.3, actual 91 (0.865x) (^ 0) +Testing all collisions (low 20-bit) - Expected 105.3, actual 92 (0.874x) (^ 0) +Testing all collisions (high 10..23 bits) - Worst is 18 bits: 442/415 (1.065x) (^ 0) +Testing all collisions (low 10..23 bits) - Worst is 16 bits: 1596/1571 (1.016x) (^ 0) + +Keyset 'Sparse' - 3-byte keys with up to 4 bits set - 12951 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 32-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 19-bit) - Expected 158.6, actual 154 (0.971x) (^ 0) +Testing all collisions (low 19-bit) - Expected 158.6, actual 165 (1.040x) (^ 1) +Testing all collisions (high 10..22 bits) - Worst is 22 bits: 23/20 (1.152x) (^ 0) +Testing all collisions (low 10..22 bits) - Worst is 15 bits: 2305/2253 (1.023x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 32-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 19-bit) - Expected 158.6, actual 166 (1.046x) (^ 1) +Testing all collisions (low 19-bit) - Expected 158.6, actual 168 (1.059x) (^ 2) +Testing all collisions (high 10..22 bits) - Worst is 18 bits: 336/315 (1.068x) (^ 0) +Testing all collisions (low 10..22 bits) - Worst is 16 bits: 1268/1199 (1.057x) (^ 1) + +Keyset 'Sparse' - 4-byte keys with up to 4 bits set - 41449 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 0.2, actual 0 (0.000x) (^ 0) +Testing all collisions (low 32-bit) - Expected 0.2, actual 0 (0.000x) (^ 0) +Testing all collisions (high 23-bit) - Expected 102.2, actual 88 (0.861x) (^ 0) +Testing all collisions (low 23-bit) - Expected 102.2, actual 91 (0.890x) (^ 0) +Testing all collisions (high 12..26 bits) - Worst is 17 bits: 5949/5914 (1.006x) (^ 0) +Testing all collisions (low 12..26 bits) - Worst is 21 bits: 413/407 (1.015x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 0.2, actual 0 (0.000x) (^ 0) +Testing all collisions (low 32-bit) - Expected 0.2, actual 0 (0.000x) (^ 0) +Testing all collisions (high 23-bit) - Expected 102.2, actual 110 (1.076x) (^ 2) +Testing all collisions (low 23-bit) - Expected 102.2, actual 117 (1.144x) (^ 3) +Testing all collisions (high 12..26 bits) - Worst is 23 bits: 110/102 (1.076x) (^ 0) +Testing all collisions (low 12..26 bits) - Worst is 21 bits: 440/407 (1.081x) (^ 0) + +Keyset 'Sparse' - 5-byte keys with up to 4 bits set - 102091 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 1.2, actual 1 (1.000x) (^ 0) +Testing all collisions (low 32-bit) - Expected 1.2, actual 1 (1.000x) (^ 0) +Testing all collisions (high 25-bit) - Expected 155.1, actual 166 (1.070x) (^ 2) +Testing all collisions (low 25-bit) - Expected 155.1, actual 142 (0.915x) (^ 0) +Testing all collisions (high 13..28 bits) - Worst is 26 bits: 90/78 (1.160x) (^ 0) +Testing all collisions (low 13..28 bits) - Worst is 27 bits: 39/39 (1.005x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 1.2, actual 1 (1.000x) (^ 0) +Testing all collisions (low 32-bit) - Expected 1.2, actual 2 (1.000x) (^ 1) +Testing all collisions (high 25-bit) - Expected 155.1, actual 155 (1.000x) (^ 0) +Testing all collisions (low 25-bit) - Expected 155.1, actual 135 (0.870x) (^ 0) +Testing all collisions (high 13..28 bits) - Worst is 28 bits: 22/19 (1.133x) (^ 0) +Testing all collisions (low 13..28 bits) - Worst is 22 bits: 1267/1232 (1.028x) (^ 0) + +Keyset 'Sparse' - 6-byte keys with up to 3 bits set - 18473 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 32-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 20-bit) - Expected 161.8, actual 155 (0.958x) (^ 0) +Testing all collisions (low 20-bit) - Expected 161.8, actual 152 (0.940x) (^ 0) +Testing all collisions (high 11..24 bits) - Worst is 15 bits: 4461/4352 (1.025x) (^ 0) +Testing all collisions (low 11..24 bits) - Worst is 24 bits: 13/10 (1.279x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 32-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 20-bit) - Expected 161.8, actual 167 (1.032x) (^ 1) +Testing all collisions (low 20-bit) - Expected 161.8, actual 150 (0.927x) (^ 0) +Testing all collisions (high 11..24 bits) - Worst is 16 bits: 2437/2375 (1.026x) (^ 0) +Testing all collisions (low 11..24 bits) - Worst is 17 bits: 1274/1243 (1.025x) (^ 0) + +Keyset 'Sparse' - 7-byte keys with up to 3 bits set - 29317 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 0.1, actual 0 (0.000x) (^ 0) +Testing all collisions (low 32-bit) - Expected 0.1, actual 0 (0.000x) (^ 0) +Testing all collisions (high 22-bit) - Expected 102.2, actual 85 (0.832x) (^ 0) +Testing all collisions (low 22-bit) - Expected 102.2, actual 82 (0.802x) (^ 0) +Testing all collisions (high 11..25 bits) - Worst is 25 bits: 16/13 (1.250x) (^ 0) +Testing all collisions (low 11..25 bits) - Worst is 14 bits: 15682/15670 (1.001x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 0.1, actual 0 (0.000x) (^ 0) +Testing all collisions (low 32-bit) - Expected 0.1, actual 0 (0.000x) (^ 0) +Testing all collisions (high 22-bit) - Expected 102.2, actual 110 (1.076x) (^ 2) +Testing all collisions (low 22-bit) - Expected 102.2, actual 109 (1.066x) (^ 1) +Testing all collisions (high 11..25 bits) - Worst is 19 bits: 841/805 (1.045x) (^ 0) +Testing all collisions (low 11..25 bits) - Worst is 19 bits: 845/805 (1.050x) (^ 0) + +Keyset 'Sparse' - 8-byte keys with up to 3 bits set - 43745 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 0.2, actual 0 (0.000x) (^ 0) +Testing all collisions (low 32-bit) - Expected 0.2, actual 0 (0.000x) (^ 0) +Testing all collisions (high 23-bit) - Expected 113.9, actual 112 (0.984x) (^ 0) +Testing all collisions (low 23-bit) - Expected 113.9, actual 113 (0.992x) (^ 0) +Testing all collisions (high 12..26 bits) - Worst is 16 bits: 11936/11828 (1.009x) (^ 0) +Testing all collisions (low 12..26 bits) - Worst is 21 bits: 466/453 (1.029x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 0.2, actual 1 (1.000x) (^ 1) +Testing all collisions (low 32-bit) - Expected 0.2, actual 0 (0.000x) (^ 0) +Testing all collisions (high 23-bit) - Expected 113.9, actual 131 (1.151x) (^ 3) +Testing all collisions (low 23-bit) - Expected 113.9, actual 109 (0.957x) (^ 0) +Testing all collisions (high 12..26 bits) - Worst is 20 bits: 965/900 (1.072x) (^ 2) +Testing all collisions (low 12..26 bits) - Worst is 17 bits: 6728/6551 (1.027x) (^ 2) + +Keyset 'Sparse' - 9-byte keys with up to 3 bits set - 62269 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 0.5, actual 0 (0.000x) (^ 0) +Testing all collisions (low 32-bit) - Expected 0.5, actual 1 (1.000x) (^ 1) +Testing all collisions (high 24-bit) - Expected 115.4, actual 116 (1.000x) (^ 1) +Testing all collisions (low 24-bit) - Expected 115.4, actual 93 (0.806x) (^ 0) +Testing all collisions (high 12..27 bits) - Worst is 22 bits: 479/460 (1.041x) (^ 0) +Testing all collisions (low 12..27 bits) - Worst is 27 bits: 18/14 (1.246x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 0.5, actual 2 (4.431x) (^ 3) +Testing all collisions (low 32-bit) - Expected 0.5, actual 0 (0.000x) (^ 0) +Testing all collisions (high 24-bit) - Expected 115.4, actual 117 (1.014x) (^ 1) +Testing all collisions (low 24-bit) - Expected 115.4, actual 100 (0.866x) (^ 0) +Testing all collisions (high 12..27 bits) - Worst is 19 bits: 3625/3556 (1.020x) (^ 0) +Testing all collisions (low 12..27 bits) - Worst is 19 bits: 3648/3556 (1.026x) (^ 0) + +Keyset 'Sparse' - 10-byte keys with up to 3 bits set - 85401 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 0.8, actual 0 (0.000x) (^ 0) +Testing all collisions (low 32-bit) - Expected 0.8, actual 0 (0.000x) (^ 0) +Testing all collisions (high 25-bit) - Expected 108.6, actual 115 (1.059x) (^ 1) +Testing all collisions (low 25-bit) - Expected 108.6, actual 102 (0.939x) (^ 0) +Testing all collisions (high 13..28 bits) - Worst is 28 bits: 23/14 (1.693x) (^ 2) +Testing all collisions (low 13..28 bits) - Worst is 18 bits: 12675/12516 (1.013x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 0.8, actual 2 (2.356x) (^ 1) +Testing all collisions (low 32-bit) - Expected 0.8, actual 1 (1.000x) (^ 1) +Testing all collisions (high 25-bit) - Expected 108.6, actual 116 (1.068x) (^ 1) +Testing all collisions (low 25-bit) - Expected 108.6, actual 121 (1.114x) (^ 2) +Testing all collisions (high 13..28 bits) - Worst is 27 bits: 37/27 (1.362x) (^ 0) +Testing all collisions (low 13..28 bits) - Worst is 18 bits: 12647/12516 (1.010x) (^ 0) + +Keyset 'Sparse' - 11-byte keys with up to 3 bits set - 113653 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 1.5, actual 3 (1.995x) (^ 2) +Testing all collisions (low 32-bit) - Expected 1.5, actual 1 (0.665x) (^ 0) +Testing all collisions (high 25-bit) - Expected 192.3, actual 183 (0.952x) (^ 0) +Testing all collisions (low 25-bit) - Expected 192.3, actual 196 (1.019x) (^ 1) +Testing all collisions (high 13..29 bits) - Worst is 17 bits: 37804/37653 (1.004x) (^ 0) +Testing all collisions (low 13..29 bits) - Worst is 27 bits: 63/48 (1.310x) (^ 1) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 1.5, actual 1 (0.665x) (^ 0) +Testing all collisions (low 32-bit) - Expected 1.5, actual 1 (0.665x) (^ 0) +Testing all collisions (high 25-bit) - Expected 192.3, actual 198 (1.030x) (^ 1) +Testing all collisions (low 25-bit) - Expected 192.3, actual 176 (0.915x) (^ 0) +Testing all collisions (high 13..29 bits) - Worst is 23 bits: 831/766 (1.084x) (^ 2) +Testing all collisions (low 13..29 bits) - Worst is 17 bits: 37847/37653 (1.005x) (^ 0) + +Keyset 'Sparse' - 12-byte keys with up to 3 bits set - 147537 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 2.5, actual 1 (0.395x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2.5, actual 3 (1.000x) (^ 1) +Testing all collisions (high 26-bit) - Expected 162.1, actual 159 (0.981x) (^ 0) +Testing all collisions (low 26-bit) - Expected 162.1, actual 147 (0.907x) (^ 0) +Testing all collisions (high 13..30 bits) - Worst is 17 bits: 59074/58991 (1.001x) (^ 0) +Testing all collisions (low 13..30 bits) - Worst is 17 bits: 59067/58991 (1.001x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 2.5, actual 2 (0.789x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2.5, actual 1 (0.395x) (^ 0) +Testing all collisions (high 26-bit) - Expected 162.1, actual 146 (0.901x) (^ 0) +Testing all collisions (low 26-bit) - Expected 162.1, actual 174 (1.074x) (^ 2) +Testing all collisions (high 13..30 bits) - Worst is 24 bits: 661/647 (1.022x) (^ 0) +Testing all collisions (low 13..30 bits) - Worst is 25 bits: 349/324 (1.078x) (^ 0) + +Keyset 'Sparse' - 13-byte keys with up to 3 bits set - 187565 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 4.1, actual 5 (1.221x) (^ 1) +Testing all collisions (low 32-bit) - Expected 4.1, actual 6 (1.465x) (^ 1) +Testing all collisions (high 27-bit) - Expected 131.0, actual 133 (1.015x) (^ 1) +Testing all collisions (low 27-bit) - Expected 131.0, actual 99 (0.756x) (^ 0) +Testing all collisions (high 14..30 bits) - Worst is 29 bits: 36/33 (1.099x) (^ 0) +Testing all collisions (low 14..30 bits) - Worst is 17 bits: 87914/87828 (1.001x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 4.1, actual 3 (0.733x) (^ 0) +Testing all collisions (low 32-bit) - Expected 4.1, actual 4 (1.000x) (^ 0) +Testing all collisions (high 27-bit) - Expected 131.0, actual 118 (0.901x) (^ 0) +Testing all collisions (low 27-bit) - Expected 131.0, actual 147 (1.122x) (^ 3) +Testing all collisions (high 14..30 bits) - Worst is 15 bits: 154926/154904 (1.000x) (^ 0) +Testing all collisions (low 14..30 bits) - Worst is 28 bits: 81/66 (1.236x) (^ 1) + +Keyset 'Sparse' - 14-byte keys with up to 3 bits set - 234249 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 6.4, actual 7 (1.000x) (^ 1) +Testing all collisions (low 32-bit) - Expected 6.4, actual 4 (0.626x) (^ 0) +Testing all collisions (high 28-bit) - Expected 102.2, actual 109 (1.067x) (^ 1) +Testing all collisions (low 28-bit) - Expected 102.2, actual 91 (0.891x) (^ 0) +Testing all collisions (high 14..31 bits) - Worst is 30 bits: 38/26 (1.487x) (^ 2) +Testing all collisions (low 14..31 bits) - Worst is 22 bits: 6445/6421 (1.004x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 6.4, actual 6 (1.000x) (^ 0) +Testing all collisions (low 32-bit) - Expected 6.4, actual 4 (0.626x) (^ 0) +Testing all collisions (high 28-bit) - Expected 102.2, actual 107 (1.047x) (^ 1) +Testing all collisions (low 28-bit) - Expected 102.2, actual 124 (1.214x) (^ 5) +Testing all collisions (high 14..31 bits) - Worst is 22 bits: 6543/6421 (1.019x) (^ 0) +Testing all collisions (low 14..31 bits) - Worst is 28 bits: 124/102 (1.214x) (^ 1) + +Keyset 'Sparse' - 2-byte keys with up to 10 bits set - 58651 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 0.4, actual 0 (0.000x) (^ 0) +Testing all collisions (low 32-bit) - Expected 0.4, actual 1 (1.000x) (^ 1) +Testing all collisions (high 24-bit) - Expected 102.4, actual 87 (0.850x) (^ 0) +Testing all collisions (low 24-bit) - Expected 102.4, actual 102 (1.000x) (^ 0) +Testing all collisions (high 12..27 bits) - Worst is 15 bits: 31362/31354 (1.000x) (^ 0) +Testing all collisions (low 12..27 bits) - Worst is 23 bits: 216/205 (1.056x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 0.4, actual 1 (1.000x) (^ 1) +Testing all collisions (low 32-bit) - Expected 0.4, actual 0 (0.000x) (^ 0) +Testing all collisions (high 24-bit) - Expected 102.4, actual 104 (1.016x) (^ 1) +Testing all collisions (low 24-bit) - Expected 102.4, actual 108 (1.055x) (^ 1) +Testing all collisions (high 12..27 bits) - Worst is 19 bits: 3178/3162 (1.005x) (^ 0) +Testing all collisions (low 12..27 bits) - Worst is 23 bits: 218/205 (1.066x) (^ 0) + +Keyset 'Sparse' - 3-byte keys with up to 20 bits set - 16774891 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 105 (0.821x) (^ 0) +Testing all collisions (low 40-bit) - Expected 128.0, actual 132 (1.032x) (^ 1) +Testing all collisions (high 32-bit) - Expected 32716.3, actual 32704 (1.000x) (^ 0) +Testing all collisions (low 32-bit) - Expected 32716.3, actual 33141 (1.013x) (^ 6) +Testing all collisions (high 20..43 bits) - Worst is 35 bits: 4162/4094 (1.017x) (^ 0) +Testing all collisions (low 20..43 bits) - Worst is 32 bits: 33141/32716 (1.013x) (^ 2) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 138 (1.078x) (^ 2) +Testing all collisions (low 40-bit) - Expected 128.0, actual 130 (1.016x) (^ 1) +Testing all collisions (high 32-bit) - Expected 32716.3, actual 32464 (0.992x) (^ 0) +Testing all collisions (low 32-bit) - Expected 32716.3, actual 32930 (1.007x) (^ 3) +Testing all collisions (high 20..43 bits) - Worst is 25 bits: 3575290/3573661 (1.000x) (^ 0) +Testing all collisions (low 20..43 bits) - Worst is 36 bits: 2109/2047 (1.030x) (^ 0) + +Keyset 'Sparse' - 4-byte keys with up to 9 bits set - 43081973 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 43-bit) - Expected 105.5, actual 112 (1.062x) (^ 1) +Testing all collisions (low 43-bit) - Expected 105.5, actual 119 (1.128x) (^ 3) +Testing all collisions (high 32-bit) - Expected 215352.7, actual 215355 (1.000x) (^ 1) +Testing all collisions (low 32-bit) - Expected 215352.7, actual 215919 (1.003x) (^ 3) +Testing all collisions (high 21..46 bits) - Worst is 45 bits: 34/26 (1.289x) (^ 0) +Testing all collisions (low 21..46 bits) - Worst is 44 bits: 71/53 (1.346x) (^ 2) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 43-bit) - Expected 105.5, actual 105 (0.995x) (^ 0) +Testing all collisions (low 43-bit) - Expected 105.5, actual 110 (1.043x) (^ 1) +Testing all collisions (high 32-bit) - Expected 215352.7, actual 215396 (1.000x) (^ 1) +Testing all collisions (low 32-bit) - Expected 215352.7, actual 214815 (0.998x) (^ 0) +Testing all collisions (high 21..46 bits) - Worst is 29 bits: 1684446/1683262 (1.001x) (^ 0) +Testing all collisions (low 21..46 bits) - Worst is 45 bits: 36/26 (1.365x) (^ 0) + +Keyset 'Sparse' - 5-byte keys with up to 7 bits set - 23242039 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 41-bit) - Expected 122.8, actual 110 (0.896x) (^ 0) +Testing all collisions (low 41-bit) - Expected 122.8, actual 108 (0.879x) (^ 0) +Testing all collisions (high 32-bit) - Expected 62773.4, actual 62370 (0.994x) (^ 0) +Testing all collisions (low 32-bit) - Expected 62773.4, actual 62854 (1.001x) (^ 1) +Testing all collisions (high 20..44 bits) - Worst is 40 bits: 247/246 (1.005x) (^ 0) +Testing all collisions (low 20..44 bits) - Worst is 35 bits: 7996/7859 (1.017x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 41-bit) - Expected 122.8, actual 128 (1.042x) (^ 1) +Testing all collisions (low 41-bit) - Expected 122.8, actual 124 (1.010x) (^ 1) +Testing all collisions (high 32-bit) - Expected 62773.4, actual 62562 (0.997x) (^ 0) +Testing all collisions (low 32-bit) - Expected 62773.4, actual 63242 (1.007x) (^ 5) +Testing all collisions (high 20..44 bits) - Worst is 40 bits: 270/246 (1.099x) (^ 0) +Testing all collisions (low 20..44 bits) - Worst is 33 bits: 31917/31415 (1.016x) (^ 4) + +Keyset 'Sparse' - 6-byte keys with up to 7 bits set - 87825941 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 45-bit) - Expected 109.6, actual 105 (0.958x) (^ 0) +Testing all collisions (low 45-bit) - Expected 109.6, actual 103 (0.940x) (^ 0) +Testing all collisions (high 32-bit) - Expected 891868.0, actual 892282 (1.000x) (^ 1) +Testing all collisions (low 32-bit) - Expected 891868.0, actual 889394 (0.997x) (^ 0) +Testing all collisions (high 22..48 bits) - Worst is 33 bits: 448987/447452 (1.003x) (^ 1) +Testing all collisions (low 22..48 bits) - Worst is 48 bits: 14/14 (1.022x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 45-bit) - Expected 109.6, actual 105 (0.958x) (^ 0) +Testing all collisions (low 45-bit) - Expected 109.6, actual 121 (1.104x) (^ 2) +Testing all collisions (high 32-bit) - Expected 891868.0, actual 891990 (1.000x) (^ 1) +Testing all collisions (low 32-bit) - Expected 891868.0, actual 892103 (1.000x) (^ 1) +Testing all collisions (high 22..48 bits) - Worst is 42 bits: 907/877 (1.034x) (^ 0) +Testing all collisions (low 22..48 bits) - Worst is 46 bits: 70/55 (1.277x) (^ 0) + +Keyset 'Sparse' - 7-byte keys with up to 6 bits set - 36684859 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 42-bit) - Expected 153.0, actual 161 (1.052x) (^ 1) +Testing all collisions (low 42-bit) - Expected 153.0, actual 173 (1.131x) (^ 4) +Testing all collisions (high 32-bit) - Expected 156224.2, actual 156103 (0.999x) (^ 0) +Testing all collisions (low 32-bit) - Expected 156224.2, actual 155581 (0.996x) (^ 0) +Testing all collisions (high 21..45 bits) - Worst is 38 bits: 2502/2448 (1.022x) (^ 0) +Testing all collisions (low 21..45 bits) - Worst is 45 bits: 27/19 (1.412x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 42-bit) - Expected 153.0, actual 138 (0.902x) (^ 0) +Testing all collisions (low 42-bit) - Expected 153.0, actual 137 (0.895x) (^ 0) +Testing all collisions (high 32-bit) - Expected 156224.2, actual 155800 (0.997x) (^ 0) +Testing all collisions (low 32-bit) - Expected 156224.2, actual 156665 (1.003x) (^ 2) +Testing all collisions (high 21..45 bits) - Worst is 29 bits: 1226298/1225288 (1.001x) (^ 0) +Testing all collisions (low 21..45 bits) - Worst is 37 bits: 5033/4895 (1.028x) (^ 1) + +Keyset 'Sparse' - 8-byte keys with up to 6 bits set - 83278001 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 44-bit) - Expected 197.1, actual 194 (0.984x) (^ 0) +Testing all collisions (low 44-bit) - Expected 197.1, actual 193 (0.979x) (^ 0) +Testing all collisions (high 32-bit) - Expected 802173.5, actual 801759 (0.999x) (^ 0) +Testing all collisions (low 32-bit) - Expected 802173.5, actual 801563 (0.999x) (^ 0) +Testing all collisions (high 22..48 bits) - Worst is 38 bits: 12743/12614 (1.010x) (^ 0) +Testing all collisions (low 22..48 bits) - Worst is 29 bits: 6139031/6137527 (1.000x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 44-bit) - Expected 197.1, actual 187 (0.949x) (^ 0) +Testing all collisions (low 44-bit) - Expected 197.1, actual 189 (0.959x) (^ 0) +Testing all collisions (high 32-bit) - Expected 802173.5, actual 802040 (1.000x) (^ 0) +Testing all collisions (low 32-bit) - Expected 802173.5, actual 803113 (1.001x) (^ 2) +Testing all collisions (high 22..48 bits) - Worst is 28 bits: 11683948/11679504 (1.000x) (^ 0) +Testing all collisions (low 22..48 bits) - Worst is 33 bits: 403061/402382 (1.002x) (^ 0) + +Keyset 'Sparse' - 9-byte keys with up to 5 bits set - 15082603 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 103.4, actual 109 (1.054x) (^ 1) +Testing all collisions (low 40-bit) - Expected 103.4, actual 121 (1.170x) (^ 4) +Testing all collisions (high 32-bit) - Expected 26451.8, actual 26428 (0.999x) (^ 0) +Testing all collisions (low 32-bit) - Expected 26451.8, actual 26475 (1.001x) (^ 1) +Testing all collisions (high 20..43 bits) - Worst is 37 bits: 895/828 (1.081x) (^ 2) +Testing all collisions (low 20..43 bits) - Worst is 26 bits: 1577298/1574745 (1.002x) (^ 1) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 103.4, actual 88 (0.851x) (^ 0) +Testing all collisions (low 40-bit) - Expected 103.4, actual 107 (1.034x) (^ 1) +Testing all collisions (high 32-bit) - Expected 26451.8, actual 26484 (1.001x) (^ 1) +Testing all collisions (low 32-bit) - Expected 26451.8, actual 26387 (0.998x) (^ 0) +Testing all collisions (high 20..43 bits) - Worst is 43 bits: 16/13 (1.237x) (^ 0) +Testing all collisions (low 20..43 bits) - Worst is 37 bits: 864/828 (1.044x) (^ 0) + +Keyset 'Sparse' - 12-byte keys with up to 5 bits set - 64593561 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 44-bit) - Expected 118.6, actual 122 (1.029x) (^ 1) +Testing all collisions (low 44-bit) - Expected 118.6, actual 129 (1.088x) (^ 2) +Testing all collisions (high 32-bit) - Expected 483297.1, actual 483328 (1.000x) (^ 1) +Testing all collisions (low 32-bit) - Expected 483297.1, actual 482797 (0.999x) (^ 0) +Testing all collisions (high 22..47 bits) - Worst is 40 bits: 1970/1897 (1.038x) (^ 0) +Testing all collisions (low 22..47 bits) - Worst is 39 bits: 3892/3795 (1.026x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 44-bit) - Expected 118.6, actual 127 (1.071x) (^ 2) +Testing all collisions (low 44-bit) - Expected 118.6, actual 130 (1.096x) (^ 2) +Testing all collisions (high 32-bit) - Expected 483297.1, actual 483567 (1.001x) (^ 1) +Testing all collisions (low 32-bit) - Expected 483297.1, actual 483848 (1.001x) (^ 2) +Testing all collisions (high 22..47 bits) - Worst is 30 bits: 1905979/1904511 (1.001x) (^ 0) +Testing all collisions (low 22..47 bits) - Worst is 31 bits: 963649/961779 (1.002x) (^ 0) + +Keyset 'Sparse' - 14-byte keys with up to 4 bits set - 6445069 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 37-bit) - Expected 151.1, actual 121 (0.801x) (^ 0) +Testing all collisions (low 37-bit) - Expected 151.1, actual 157 (1.039x) (^ 1) +Testing all collisions (high 32-bit) - Expected 4833.3, actual 4777 (0.988x) (^ 0) +Testing all collisions (low 32-bit) - Expected 4833.3, actual 4845 (1.002x) (^ 1) +Testing all collisions (high 18..40 bits) - Worst is 40 bits: 23/19 (1.218x) (^ 0) +Testing all collisions (low 18..40 bits) - Worst is 38 bits: 88/76 (1.165x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 37-bit) - Expected 151.1, actual 141 (0.933x) (^ 0) +Testing all collisions (low 37-bit) - Expected 151.1, actual 168 (1.112x) (^ 3) +Testing all collisions (high 32-bit) - Expected 4833.3, actual 4909 (1.016x) (^ 2) +Testing all collisions (low 32-bit) - Expected 4833.3, actual 4893 (1.012x) (^ 2) +Testing all collisions (high 18..40 bits) - Worst is 28 bits: 77363/76757 (1.008x) (^ 1) +Testing all collisions (low 18..40 bits) - Worst is 35 bits: 642/604 (1.062x) (^ 0) + +Keyset 'Sparse' - 16-byte keys with up to 4 bits set - 11017633 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 39-bit) - Expected 110.4, actual 105 (0.951x) (^ 0) +Testing all collisions (low 39-bit) - Expected 110.4, actual 103 (0.933x) (^ 0) +Testing all collisions (high 32-bit) - Expected 14119.4, actual 14251 (1.009x) (^ 2) +Testing all collisions (low 32-bit) - Expected 14119.4, actual 13938 (0.987x) (^ 0) +Testing all collisions (high 19..42 bits) - Worst is 29 bits: 112864/112282 (1.005x) (^ 0) +Testing all collisions (low 19..42 bits) - Worst is 40 bits: 61/55 (1.105x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 39-bit) - Expected 110.4, actual 107 (0.969x) (^ 0) +Testing all collisions (low 39-bit) - Expected 110.4, actual 95 (0.860x) (^ 0) +Testing all collisions (high 32-bit) - Expected 14119.4, actual 14041 (0.994x) (^ 0) +Testing all collisions (low 32-bit) - Expected 14119.4, actual 14313 (1.014x) (^ 4) +Testing all collisions (high 19..42 bits) - Worst is 42 bits: 16/14 (1.159x) (^ 0) +Testing all collisions (low 19..42 bits) - Worst is 34 bits: 3698/3532 (1.047x) (^ 3) + +Keyset 'Sparse' - 18-byte keys with up to 4 bits set - 17676661 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 142.1, actual 154 (1.084x) (^ 2) +Testing all collisions (low 40-bit) - Expected 142.1, actual 145 (1.020x) (^ 1) +Testing all collisions (high 32-bit) - Expected 36325.8, actual 36219 (0.997x) (^ 0) +Testing all collisions (low 32-bit) - Expected 36325.8, actual 36238 (0.998x) (^ 0) +Testing all collisions (high 20..43 bits) - Worst is 41 bits: 83/71 (1.168x) (^ 0) +Testing all collisions (low 20..43 bits) - Worst is 37 bits: 1164/1137 (1.024x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 142.1, actual 150 (1.056x) (^ 1) +Testing all collisions (low 40-bit) - Expected 142.1, actual 159 (1.119x) (^ 3) +Testing all collisions (high 32-bit) - Expected 36325.8, actual 36532 (1.006x) (^ 2) +Testing all collisions (low 32-bit) - Expected 36325.8, actual 36175 (0.996x) (^ 0) +Testing all collisions (high 20..43 bits) - Worst is 41 bits: 89/71 (1.253x) (^ 1) +Testing all collisions (low 20..43 bits) - Worst is 42 bits: 48/36 (1.351x) (^ 1) + +Keyset 'Sparse' - 24-byte keys with up to 4 bits set - 56050289 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 43-bit) - Expected 178.6, actual 158 (0.885x) (^ 0) +Testing all collisions (low 43-bit) - Expected 178.6, actual 171 (0.958x) (^ 0) +Testing all collisions (high 32-bit) - Expected 364148.6, actual 364618 (1.001x) (^ 2) +Testing all collisions (low 32-bit) - Expected 364148.6, actual 364500 (1.001x) (^ 1) +Testing all collisions (high 21..47 bits) - Worst is 38 bits: 5847/5714 (1.023x) (^ 0) +Testing all collisions (low 21..47 bits) - Worst is 30 bits: 1439223/1437811 (1.001x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 43-bit) - Expected 178.6, actual 191 (1.070x) (^ 2) +Testing all collisions (low 43-bit) - Expected 178.6, actual 186 (1.042x) (^ 1) +Testing all collisions (high 32-bit) - Expected 364148.6, actual 363894 (0.999x) (^ 0) +Testing all collisions (low 32-bit) - Expected 364148.6, actual 364809 (1.002x) (^ 2) +Testing all collisions (high 21..47 bits) - Worst is 37 bits: 11587/11428 (1.014x) (^ 0) +Testing all collisions (low 21..47 bits) - Worst is 37 bits: 11558/11428 (1.011x) (^ 0) + +Keyset 'Sparse' - 26-byte keys with up to 4 bits set - 77260613 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 44-bit) - Expected 169.7, actual 175 (1.032x) (^ 1) +Testing all collisions (low 44-bit) - Expected 169.7, actual 166 (0.978x) (^ 0) +Testing all collisions (high 32-bit) - Expected 690758.5, actual 690974 (1.000x) (^ 1) +Testing all collisions (low 32-bit) - Expected 690758.5, actual 691462 (1.001x) (^ 2) +Testing all collisions (high 22..48 bits) - Worst is 45 bits: 99/85 (1.167x) (^ 0) +Testing all collisions (low 22..48 bits) - Worst is 31 bits: 1374598/1373295 (1.001x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 44-bit) - Expected 169.7, actual 171 (1.008x) (^ 1) +Testing all collisions (low 44-bit) - Expected 169.7, actual 204 (1.202x) (^ 7) +Testing all collisions (high 32-bit) - Expected 690758.5, actual 690397 (0.999x) (^ 0) +Testing all collisions (low 32-bit) - Expected 690758.5, actual 691271 (1.001x) (^ 1) +Testing all collisions (high 22..48 bits) - Worst is 48 bits: 18/11 (1.698x) (^ 0) +Testing all collisions (low 22..48 bits) - Worst is 43 bits: 396/339 (1.167x) (^ 4) + +Keyset 'Sparse' - 32-byte keys with up to 3 bits set - 2796417 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 35-bit) - Expected 113.8, actual 105 (0.923x) (^ 0) +Testing all collisions (low 35-bit) - Expected 113.8, actual 122 (1.072x) (^ 2) +Testing all collisions (high 32-bit) - Expected 910.2, actual 881 (0.968x) (^ 0) +Testing all collisions (low 32-bit) - Expected 910.2, actual 957 (1.051x) (^ 3) +Testing all collisions (high 17..38 bits) - Worst is 22 bits: 756659/755430 (1.002x) (^ 0) +Testing all collisions (low 17..38 bits) - Worst is 36 bits: 73/57 (1.283x) (^ 1) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 35-bit) - Expected 113.8, actual 123 (1.081x) (^ 2) +Testing all collisions (low 35-bit) - Expected 113.8, actual 97 (0.852x) (^ 0) +Testing all collisions (high 32-bit) - Expected 910.2, actual 905 (0.994x) (^ 0) +Testing all collisions (low 32-bit) - Expected 910.2, actual 859 (0.944x) (^ 0) +Testing all collisions (high 17..38 bits) - Worst is 25 bits: 114049/113356 (1.006x) (^ 1) +Testing all collisions (low 17..38 bits) - Worst is 24 bits: 221009/220626 (1.002x) (^ 0) + +Keyset 'Sparse' - 48-byte keys with up to 3 bits set - 9437505 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 162.0, actual 171 (1.055x) (^ 1) +Testing all collisions (low 38-bit) - Expected 162.0, actual 164 (1.012x) (^ 1) +Testing all collisions (high 32-bit) - Expected 10361.1, actual 10350 (0.999x) (^ 0) +Testing all collisions (low 32-bit) - Expected 10361.1, actual 10435 (1.007x) (^ 2) +Testing all collisions (high 19..42 bits) - Worst is 36 bits: 685/648 (1.057x) (^ 0) +Testing all collisions (low 19..42 bits) - Worst is 40 bits: 53/41 (1.309x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 162.0, actual 175 (1.080x) (^ 2) +Testing all collisions (low 38-bit) - Expected 162.0, actual 172 (1.062x) (^ 2) +Testing all collisions (high 32-bit) - Expected 10361.1, actual 10408 (1.005x) (^ 1) +Testing all collisions (low 32-bit) - Expected 10361.1, actual 10326 (0.997x) (^ 0) +Testing all collisions (high 19..42 bits) - Worst is 27 bits: 324762/324157 (1.002x) (^ 0) +Testing all collisions (low 19..42 bits) - Worst is 26 bits: 635157/633554 (1.003x) (^ 1) + +Keyset 'Sparse' - 64-byte keys with up to 3 bits set - 22370049 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 41-bit) - Expected 113.8, actual 105 (0.923x) (^ 0) +Testing all collisions (low 41-bit) - Expected 113.8, actual 117 (1.028x) (^ 1) +Testing all collisions (high 32-bit) - Expected 58155.4, actual 58790 (1.011x) (^ 7) +Testing all collisions (low 32-bit) - Expected 58155.4, actual 58352 (1.003x) (^ 2) +Testing all collisions (high 20..44 bits) - Worst is 31 bits: 117442/116109 (1.011x) (^ 9) +Testing all collisions (low 20..44 bits) - Worst is 34 bits: 14746/14558 (1.013x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 41-bit) - Expected 113.8, actual 123 (1.081x) (^ 2) +Testing all collisions (low 41-bit) - Expected 113.8, actual 108 (0.949x) (^ 0) +Testing all collisions (high 32-bit) - Expected 58155.4, actual 57910 (0.996x) (^ 0) +Testing all collisions (low 32-bit) - Expected 58155.4, actual 58176 (1.000x) (^ 1) +Testing all collisions (high 20..44 bits) - Worst is 34 bits: 14688/14558 (1.009x) (^ 0) +Testing all collisions (low 20..44 bits) - Worst is 34 bits: 14711/14558 (1.011x) (^ 0) + +Keyset 'Sparse' - 96-byte keys with up to 3 bits set - 75498113 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 44-bit) - Expected 162.0, actual 150 (0.926x) (^ 0) +Testing all collisions (low 44-bit) - Expected 162.0, actual 161 (0.994x) (^ 0) +Testing all collisions (high 32-bit) - Expected 659692.2, actual 658777 (0.999x) (^ 0) +Testing all collisions (low 32-bit) - Expected 659692.2, actual 661261 (1.002x) (^ 5) +Testing all collisions (high 22..48 bits) - Worst is 39 bits: 5256/5184 (1.014x) (^ 0) +Testing all collisions (low 22..48 bits) - Worst is 31 bits: 1314650/1311710 (1.002x) (^ 2) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 44-bit) - Expected 162.0, actual 159 (0.981x) (^ 0) +Testing all collisions (low 44-bit) - Expected 162.0, actual 172 (1.062x) (^ 2) +Testing all collisions (high 32-bit) - Expected 659692.2, actual 661228 (1.002x) (^ 5) +Testing all collisions (low 32-bit) - Expected 659692.2, actual 659830 (1.000x) (^ 1) +Testing all collisions (high 22..48 bits) - Worst is 30 bits: 2597375/2593122 (1.002x) (^ 3) +Testing all collisions (low 22..48 bits) - Worst is 44 bits: 172/162 (1.062x) (^ 0) + +Keyset 'Sparse' - 128-byte keys with up to 2 bits set - 524801 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 32.1, actual 34 (1.060x) (^ 1) +Testing all collisions (low 32-bit) - Expected 32.1, actual 33 (1.029x) (^ 1) +Testing all collisions (high 30-bit) - Expected 128.2, actual 128 (1.000x) (^ 0) +Testing all collisions (low 30-bit) - Expected 128.2, actual 126 (0.983x) (^ 0) +Testing all collisions (high 15..33 bits) - Worst is 27 bits: 1068/1025 (1.042x) (^ 0) +Testing all collisions (low 15..33 bits) - Worst is 21 bits: 60591/60513 (1.001x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 32.1, actual 36 (1.123x) (^ 1) +Testing all collisions (low 32-bit) - Expected 32.1, actual 34 (1.060x) (^ 1) +Testing all collisions (high 30-bit) - Expected 128.2, actual 142 (1.107x) (^ 3) +Testing all collisions (low 30-bit) - Expected 128.2, actual 126 (0.983x) (^ 0) +Testing all collisions (high 15..33 bits) - Worst is 25 bits: 4172/4083 (1.022x) (^ 0) +Testing all collisions (low 15..33 bits) - Worst is 21 bits: 60717/60513 (1.003x) (^ 0) + +Keyset 'Sparse' - 256-byte keys with up to 2 bits set - 2098177 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 34-bit) - Expected 128.1, actual 125 (0.976x) (^ 0) +Testing all collisions (low 34-bit) - Expected 128.1, actual 147 (1.147x) (^ 4) +Testing all collisions (high 32-bit) - Expected 512.4, actual 517 (1.009x) (^ 1) +Testing all collisions (low 32-bit) - Expected 512.4, actual 519 (1.013x) (^ 1) +Testing all collisions (high 17..37 bits) - Worst is 35 bits: 72/64 (1.124x) (^ 0) +Testing all collisions (low 17..37 bits) - Worst is 30 bits: 2126/2049 (1.038x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 34-bit) - Expected 128.1, actual 130 (1.015x) (^ 1) +Testing all collisions (low 34-bit) - Expected 128.1, actual 126 (0.983x) (^ 0) +Testing all collisions (high 32-bit) - Expected 512.4, actual 506 (0.987x) (^ 0) +Testing all collisions (low 32-bit) - Expected 512.4, actual 538 (1.050x) (^ 2) +Testing all collisions (high 17..37 bits) - Worst is 29 bits: 4160/4095 (1.016x) (^ 0) +Testing all collisions (low 17..37 bits) - Worst is 31 bits: 1063/1025 (1.037x) (^ 0) + +Keyset 'Sparse' - 512-byte keys with up to 2 bits set - 8390657 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 128.1, actual 123 (0.960x) (^ 0) +Testing all collisions (low 38-bit) - Expected 128.1, actual 137 (1.070x) (^ 2) +Testing all collisions (high 32-bit) - Expected 8190.7, actual 8261 (1.009x) (^ 2) +Testing all collisions (low 32-bit) - Expected 8190.7, actual 8283 (1.011x) (^ 2) +Testing all collisions (high 19..41 bits) - Worst is 27 bits: 257552/256891 (1.003x) (^ 0) +Testing all collisions (low 19..41 bits) - Worst is 31 bits: 16621/16371 (1.015x) (^ 1) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 128.1, actual 122 (0.953x) (^ 0) +Testing all collisions (low 38-bit) - Expected 128.1, actual 150 (1.171x) (^ 4) +Testing all collisions (high 32-bit) - Expected 8190.7, actual 8144 (0.994x) (^ 0) +Testing all collisions (low 32-bit) - Expected 8190.7, actual 8184 (0.999x) (^ 0) +Testing all collisions (high 19..41 bits) - Worst is 26 bits: 504971/503349 (1.003x) (^ 2) +Testing all collisions (low 19..41 bits) - Worst is 38 bits: 150/128 (1.171x) (^ 0) + +Keyset 'Sparse' - 1024-byte keys with up to 2 bits set - 33558529 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 42-bit) - Expected 128.0, actual 161 (1.258x) (^ 8) +Testing all collisions (low 42-bit) - Expected 128.0, actual 110 (0.859x) (^ 0) +Testing all collisions (high 32-bit) - Expected 130763.2, actual 130997 (1.002x) (^ 1) +Testing all collisions (low 32-bit) - Expected 130763.2, actual 130134 (0.995x) (^ 0) +Testing all collisions (high 21..45 bits) - Worst is 42 bits: 161/128 (1.258x) (^ 3) +Testing all collisions (low 21..45 bits) - Worst is 45 bits: 20/16 (1.250x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 42-bit) - Expected 128.0, actual 133 (1.039x) (^ 1) +Testing all collisions (low 42-bit) - Expected 128.0, actual 130 (1.015x) (^ 1) +Testing all collisions (high 32-bit) - Expected 130763.2, actual 130364 (0.997x) (^ 0) +Testing all collisions (low 32-bit) - Expected 130763.2, actual 130189 (0.996x) (^ 0) +Testing all collisions (high 21..45 bits) - Worst is 43 bits: 76/64 (1.187x) (^ 0) +Testing all collisions (low 21..45 bits) - Worst is 30 bits: 519475/518995 (1.001x) (^ 0) + +Keyset 'Sparse' - 1280-byte keys with up to 2 bits set - 52433921 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 43-bit) - Expected 156.3, actual 159 (1.017x) (^ 1) +Testing all collisions (low 43-bit) - Expected 156.3, actual 158 (1.011x) (^ 1) +Testing all collisions (high 32-bit) - Expected 318764.0, actual 319015 (1.001x) (^ 1) +Testing all collisions (low 32-bit) - Expected 318764.0, actual 319764 (1.003x) (^ 4) +Testing all collisions (high 21..46 bits) - Worst is 38 bits: 5172/5001 (1.034x) (^ 2) +Testing all collisions (low 21..46 bits) - Worst is 32 bits: 319764/318764 (1.003x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 43-bit) - Expected 156.3, actual 149 (0.953x) (^ 0) +Testing all collisions (low 43-bit) - Expected 156.3, actual 162 (1.037x) (^ 1) +Testing all collisions (high 32-bit) - Expected 318764.0, actual 318211 (0.998x) (^ 0) +Testing all collisions (low 32-bit) - Expected 318764.0, actual 318862 (1.000x) (^ 1) +Testing all collisions (high 21..46 bits) - Worst is 45 bits: 44/39 (1.126x) (^ 0) +Testing all collisions (low 21..46 bits) - Worst is 27 bits: 9033994/9028985 (1.001x) (^ 0) + +Keyset 'Sparse' - 1536-byte keys with up to 2 bits set - 75503617 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 44-bit) - Expected 162.0, actual 187 (1.154x) (^ 5) +Testing all collisions (low 44-bit) - Expected 162.0, actual 147 (0.907x) (^ 0) +Testing all collisions (high 32-bit) - Expected 659788.1, actual 661634 (1.003x) (^ 6) +Testing all collisions (low 32-bit) - Expected 659788.1, actual 659370 (0.999x) (^ 0) +Testing all collisions (high 22..48 bits) - Worst is 31 bits: 1314806/1311900 (1.002x) (^ 2) +Testing all collisions (low 22..48 bits) - Worst is 35 bits: 83121/82897 (1.003x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 44-bit) - Expected 162.0, actual 170 (1.049x) (^ 1) +Testing all collisions (low 44-bit) - Expected 162.0, actual 164 (1.012x) (^ 1) +Testing all collisions (high 32-bit) - Expected 659788.1, actual 658888 (0.999x) (^ 0) +Testing all collisions (low 32-bit) - Expected 659788.1, actual 659983 (1.000x) (^ 1) +Testing all collisions (high 22..48 bits) - Worst is 28 bits: 9693966/9689235 (1.000x) (^ 0) +Testing all collisions (low 22..48 bits) - Worst is 42 bits: 691/648 (1.066x) (^ 0) + +Keyset 'Sparse' - 2048-byte keys with up to 2 bits set - 134225921 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 46-bit) - Expected 128.0, actual 125 (0.976x) (^ 0) +Testing all collisions (low 46-bit) - Expected 128.0, actual 121 (0.945x) (^ 0) +Testing all collisions (high 32-bit) - Expected 2075728.3, actual 2075944 (1.000x) (^ 1) +Testing all collisions (low 32-bit) - Expected 2075728.3, actual 2076446 (1.000x) (^ 1) +Testing all collisions (high 23..49 bits) - Worst is 29 bits: 15468456/15464115 (1.000x) (^ 0) +Testing all collisions (low 23..49 bits) - Worst is 36 bits: 131457/131003 (1.003x) (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 46-bit) - Expected 128.0, actual 129 (1.008x) (^ 1) +Testing all collisions (low 46-bit) - Expected 128.0, actual 127 (0.992x) (^ 0) +Testing all collisions (high 32-bit) - Expected 2075728.3, actual 2076065 (1.000x) (^ 1) +Testing all collisions (low 32-bit) - Expected 2075728.3, actual 2076092 (1.000x) (^ 1) +Testing all collisions (high 23..49 bits) - Worst is 35 bits: 262489/261835 (1.002x) (^ 0) +Testing all collisions (low 23..49 bits) - Worst is 49 bits: 22/16 (1.375x) (^ 0) + + +[[[ Keyset 'Permutation' Tests ]]] + +Keyset 'Combination 4-bytes [3 low bits; LE]' - up to 7 blocks from a set of 8 - 2396744 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 34-bit) - Expected 167.2, actual 171 (1.023x) (^ 1) +Testing all collisions (low 34-bit) - Expected 167.2, actual 166 (0.993x) (^ 0) +Testing all collisions (high 32-bit) - Expected 668.6, actual 693 (1.036x) (^ 2) +Testing all collisions (low 32-bit) - Expected 668.6, actual 657 (0.983x) (^ 0) +Testing all collisions (high 19..38 bits) - Worst is 29 bits: 5565/5342 (1.042x) (^ 5) +Testing all collisions (low 19..38 bits) - Worst is 38 bits: 13/10 (1.244x) (^ 0) +Testing distribution (any 8..18 bits) - Worst bias is 13 bits at bit 126: 0.800x (^ 4) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 34-bit) - Expected 167.2, actual 163 (0.975x) (^ 0) +Testing all collisions (low 34-bit) - Expected 167.2, actual 158 (0.945x) (^ 0) +Testing all collisions (high 32-bit) - Expected 668.6, actual 666 (0.996x) (^ 0) +Testing all collisions (low 32-bit) - Expected 668.6, actual 674 (1.008x) (^ 1) +Testing all collisions (high 19..38 bits) - Worst is 37 bits: 28/21 (1.340x) (^ 0) +Testing all collisions (low 19..38 bits) - Worst is 24 bits: 164269/163327 (1.006x) (^ 2) +Testing distribution (any 8..18 bits) - Worst bias is 12 bits at bit 76: 0.596x (^ 0) + +Keyset 'Combination 4-bytes [3 low bits; BE]' - up to 7 blocks from a set of 8 - 2396744 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 34-bit) - Expected 167.2, actual 159 (0.951x) (^ 0) +Testing all collisions (low 34-bit) - Expected 167.2, actual 168 (1.005x) (^ 1) +Testing all collisions (high 32-bit) - Expected 668.6, actual 673 (1.007x) (^ 1) +Testing all collisions (low 32-bit) - Expected 668.6, actual 711 (1.063x) (^ 4) +Testing all collisions (high 19..38 bits) - Worst is 22 bits: 572347/571040 (1.002x) (^ 0) +Testing all collisions (low 19..38 bits) - Worst is 32 bits: 711/669 (1.063x) (^ 0) +Testing distribution (any 8..18 bits) - Worst bias is 13 bits at bit 70: 0.663x (^ 1) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 34-bit) - Expected 167.2, actual 180 (1.077x) (^ 2) +Testing all collisions (low 34-bit) - Expected 167.2, actual 174 (1.041x) (^ 1) +Testing all collisions (high 32-bit) - Expected 668.6, actual 694 (1.038x) (^ 2) +Testing all collisions (low 32-bit) - Expected 668.6, actual 665 (0.995x) (^ 0) +Testing all collisions (high 19..38 bits) - Worst is 31 bits: 1415/1337 (1.058x) (^ 1) +Testing all collisions (low 19..38 bits) - Worst is 30 bits: 2714/2673 (1.015x) (^ 0) +Testing distribution (any 8..18 bits) - Worst bias is 17 bits at bit 42: 0.530x (^ 0) + +Keyset 'Combination 4-bytes [3 high bits; LE]' - up to 7 blocks from a set of 8 - 2396744 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 34-bit) - Expected 167.2, actual 175 (1.047x) (^ 1) +Testing all collisions (low 34-bit) - Expected 167.2, actual 184 (1.101x) (^ 3) +Testing all collisions (high 32-bit) - Expected 668.6, actual 697 (1.042x) (^ 2) +Testing all collisions (low 32-bit) - Expected 668.6, actual 660 (0.987x) (^ 0) +Testing all collisions (high 19..38 bits) - Worst is 27 bits: 21542/21273 (1.013x) (^ 1) +Testing all collisions (low 19..38 bits) - Worst is 28 bits: 10889/10668 (1.021x) (^ 1) +Testing distribution (any 8..18 bits) - Worst bias is 8 bits at bit 26: 0.753x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 34-bit) - Expected 167.2, actual 160 (0.957x) (^ 0) +Testing all collisions (low 34-bit) - Expected 167.2, actual 174 (1.041x) (^ 1) +Testing all collisions (high 32-bit) - Expected 668.6, actual 652 (0.975x) (^ 0) +Testing all collisions (low 32-bit) - Expected 668.6, actual 660 (0.987x) (^ 0) +Testing all collisions (high 19..38 bits) - Worst is 27 bits: 21556/21273 (1.013x) (^ 1) +Testing all collisions (low 19..38 bits) - Worst is 36 bits: 54/42 (1.292x) (^ 0) +Testing distribution (any 8..18 bits) - Worst bias is 11 bits at bit 122: 0.672x (^ 0) + +Keyset 'Combination 4-bytes [3 high bits; BE]' - up to 7 blocks from a set of 8 - 2396744 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 34-bit) - Expected 167.2, actual 159 (0.951x) (^ 0) +Testing all collisions (low 34-bit) - Expected 167.2, actual 177 (1.059x) (^ 2) +Testing all collisions (high 32-bit) - Expected 668.6, actual 631 (0.944x) (^ 0) +Testing all collisions (low 32-bit) - Expected 668.6, actual 666 (0.996x) (^ 0) +Testing all collisions (high 19..38 bits) - Worst is 23 bits: 312193/311985 (1.001x) (^ 0) +Testing all collisions (low 19..38 bits) - Worst is 36 bits: 55/42 (1.316x) (^ 1) +Testing distribution (any 8..18 bits) - Worst bias is 11 bits at bit 107: 0.582x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 34-bit) - Expected 167.2, actual 149 (0.891x) (^ 0) +Testing all collisions (low 34-bit) - Expected 167.2, actual 164 (0.981x) (^ 0) +Testing all collisions (high 32-bit) - Expected 668.6, actual 640 (0.957x) (^ 0) +Testing all collisions (low 32-bit) - Expected 668.6, actual 635 (0.950x) (^ 0) +Testing all collisions (high 19..38 bits) - Worst is 38 bits: 16/10 (1.531x) (^ 0) +Testing all collisions (low 19..38 bits) - Worst is 22 bits: 571497/571040 (1.001x) (^ 0) +Testing distribution (any 8..18 bits) - Worst bias is 11 bits at bit 101: 0.677x (^ 0) + +Keyset 'Combination 4-bytes [3 high+low bits; LE]' - up to 6 blocks from a set of 15 - 12204240 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 39-bit) - Expected 135.5, actual 128 (0.945x) (^ 0) +Testing all collisions (low 39-bit) - Expected 135.5, actual 137 (1.011x) (^ 1) +Testing all collisions (high 32-bit) - Expected 17322.9, actual 17435 (1.006x) (^ 2) +Testing all collisions (low 32-bit) - Expected 17322.9, actual 17384 (1.004x) (^ 1) +Testing all collisions (high 22..42 bits) - Worst is 29 bits: 138277/137669 (1.004x) (^ 0) +Testing all collisions (low 22..42 bits) - Worst is 35 bits: 2235/2167 (1.031x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 16 bits at bit 62: 0.560x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 39-bit) - Expected 135.5, actual 165 (1.218x) (^ 6) +Testing all collisions (low 39-bit) - Expected 135.5, actual 136 (1.004x) (^ 1) +Testing all collisions (high 32-bit) - Expected 17322.9, actual 17223 (0.994x) (^ 0) +Testing all collisions (low 32-bit) - Expected 17322.9, actual 17354 (1.002x) (^ 1) +Testing all collisions (high 22..42 bits) - Worst is 40 bits: 95/68 (1.403x) (^ 5) +Testing all collisions (low 22..42 bits) - Worst is 29 bits: 138137/137669 (1.003x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 11 bits at bit 25: 0.782x (^ 2) + +Keyset 'Combination 4-bytes [3 high+low bits; BE]' - up to 6 blocks from a set of 15 - 12204240 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 39-bit) - Expected 135.5, actual 124 (0.915x) (^ 0) +Testing all collisions (low 39-bit) - Expected 135.5, actual 142 (1.048x) (^ 1) +Testing all collisions (high 32-bit) - Expected 17322.9, actual 17350 (1.002x) (^ 1) +Testing all collisions (low 32-bit) - Expected 17322.9, actual 17187 (0.992x) (^ 0) +Testing all collisions (high 22..42 bits) - Worst is 25 bits: 1976237/1973141 (1.002x) (^ 1) +Testing all collisions (low 22..42 bits) - Worst is 41 bits: 45/34 (1.329x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 17 bits at bit 36: 0.561x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 39-bit) - Expected 135.5, actual 142 (1.048x) (^ 1) +Testing all collisions (low 39-bit) - Expected 135.5, actual 141 (1.041x) (^ 1) +Testing all collisions (high 32-bit) - Expected 17322.9, actual 17273 (0.997x) (^ 0) +Testing all collisions (low 32-bit) - Expected 17322.9, actual 17417 (1.005x) (^ 2) +Testing all collisions (high 22..42 bits) - Worst is 33 bits: 8739/8666 (1.008x) (^ 0) +Testing all collisions (low 22..42 bits) - Worst is 42 bits: 27/17 (1.595x) (^ 1) +Testing distribution (any 8..21 bits) - Worst bias is 9 bits at bit 1: 0.633x (^ 0) + +Keyset 'Combination 4-bytes [0, low bit; LE]' - up to 23 blocks from a set of 2 - 16777214 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 146 (1.141x) (^ 3) +Testing all collisions (low 40-bit) - Expected 128.0, actual 116 (0.906x) (^ 0) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32602 (0.996x) (^ 0) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32477 (0.992x) (^ 0) +Testing all collisions (high 22..43 bits) - Worst is 39 bits: 289/256 (1.129x) (^ 1) +Testing all collisions (low 22..43 bits) - Worst is 36 bits: 2088/2048 (1.020x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 15 bits at bit 102: 0.622x (^ 1) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 128 (1.000x) (^ 1) +Testing all collisions (low 40-bit) - Expected 128.0, actual 116 (0.906x) (^ 0) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32832 (1.003x) (^ 1) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32914 (1.006x) (^ 2) +Testing all collisions (high 22..43 bits) - Worst is 34 bits: 8315/8189 (1.015x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 31 bits: 65771/65366 (1.006x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 11 bits at bit 2: 0.771x (^ 2) + +Keyset 'Combination 4-bytes [0, low bit; BE]' - up to 23 blocks from a set of 2 - 16777214 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 134 (1.047x) (^ 1) +Testing all collisions (low 40-bit) - Expected 128.0, actual 138 (1.078x) (^ 2) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32584 (0.996x) (^ 0) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32506 (0.993x) (^ 0) +Testing all collisions (high 22..43 bits) - Worst is 43 bits: 21/16 (1.313x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 36 bits: 2121/2048 (1.036x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 10 bits at bit 4: 0.807x (^ 2) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 139 (1.086x) (^ 2) +Testing all collisions (low 40-bit) - Expected 128.0, actual 126 (0.984x) (^ 0) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32872 (1.004x) (^ 2) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32847 (1.004x) (^ 1) +Testing all collisions (high 22..43 bits) - Worst is 37 bits: 1125/1024 (1.099x) (^ 5) +Testing all collisions (low 22..43 bits) - Worst is 35 bits: 4198/4095 (1.025x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 10 bits at bit 40: 0.770x (^ 1) + +Keyset 'Combination 4-bytes [0, high bit; LE]' - up to 23 blocks from a set of 2 - 16777214 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 124 (0.969x) (^ 0) +Testing all collisions (low 40-bit) - Expected 128.0, actual 108 (0.844x) (^ 0) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32817 (1.003x) (^ 1) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32495 (0.993x) (^ 0) +Testing all collisions (high 22..43 bits) - Worst is 37 bits: 1047/1024 (1.023x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 23 bits: 9524898/9523881 (1.000x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 15 bits at bit 32: 0.513x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 116 (0.906x) (^ 0) +Testing all collisions (low 40-bit) - Expected 128.0, actual 144 (1.125x) (^ 3) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32774 (1.001x) (^ 1) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32795 (1.002x) (^ 1) +Testing all collisions (high 22..43 bits) - Worst is 31 bits: 65743/65366 (1.006x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 39 bits: 284/256 (1.109x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 20 bits at bit 84: 0.476x (^ 0) + +Keyset 'Combination 4-bytes [0, high bit; BE]' - up to 23 blocks from a set of 2 - 16777214 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 119 (0.930x) (^ 0) +Testing all collisions (low 40-bit) - Expected 128.0, actual 115 (0.898x) (^ 0) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32493 (0.993x) (^ 0) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 33002 (1.008x) (^ 3) +Testing all collisions (high 22..43 bits) - Worst is 43 bits: 20/16 (1.250x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 33 bits: 16636/16373 (1.016x) (^ 1) +Testing distribution (any 8..21 bits) - Worst bias is 17 bits at bit 85: 0.469x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 127 (0.992x) (^ 0) +Testing all collisions (low 40-bit) - Expected 128.0, actual 108 (0.844x) (^ 0) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32834 (1.003x) (^ 1) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32715 (1.000x) (^ 0) +Testing all collisions (high 22..43 bits) - Worst is 29 bits: 260269/259434 (1.003x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 33 bits: 16545/16373 (1.010x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 14 bits at bit 16: 0.768x (^ 4) + +Keyset 'Combination 8-bytes [0, low bit; LE]' - up to 23 blocks from a set of 2 - 16777214 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 113 (0.883x) (^ 0) +Testing all collisions (low 40-bit) - Expected 128.0, actual 153 (1.195x) (^ 5) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32251 (0.986x) (^ 0) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32685 (0.999x) (^ 0) +Testing all collisions (high 22..43 bits) - Worst is 22 bits: 12659710/12659731 (1.000x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 40 bits: 153/128 (1.195x) (^ 1) +Testing distribution (any 8..21 bits) - Worst bias is 10 bits at bit 81: 0.751x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 116 (0.906x) (^ 0) +Testing all collisions (low 40-bit) - Expected 128.0, actual 133 (1.039x) (^ 1) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32502 (0.993x) (^ 0) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32632 (0.997x) (^ 0) +Testing all collisions (high 22..43 bits) - Worst is 35 bits: 4150/4095 (1.013x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 37 bits: 1117/1024 (1.091x) (^ 4) +Testing distribution (any 8..21 bits) - Worst bias is 15 bits at bit 36: 0.607x (^ 0) + +Keyset 'Combination 8-bytes [0, low bit; BE]' - up to 23 blocks from a set of 2 - 16777214 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 143 (1.117x) (^ 3) +Testing all collisions (low 40-bit) - Expected 128.0, actual 129 (1.008x) (^ 1) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32494 (0.993x) (^ 0) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32741 (1.000x) (^ 1) +Testing all collisions (high 22..43 bits) - Worst is 37 bits: 1066/1024 (1.041x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 30 bits: 131049/130392 (1.005x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 18 bits at bit 114: 0.637x (^ 3) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 119 (0.930x) (^ 0) +Testing all collisions (low 40-bit) - Expected 128.0, actual 128 (1.000x) (^ 1) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32724 (1.000x) (^ 0) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32809 (1.003x) (^ 1) +Testing all collisions (high 22..43 bits) - Worst is 38 bits: 540/512 (1.055x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 33 bits: 16499/16373 (1.008x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 9 bits at bit 87: 0.671x (^ 0) + +Keyset 'Combination 8-bytes [0, high bit; LE]' - up to 23 blocks from a set of 2 - 16777214 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 132 (1.031x) (^ 1) +Testing all collisions (low 40-bit) - Expected 128.0, actual 145 (1.133x) (^ 3) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32590 (0.996x) (^ 0) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32790 (1.002x) (^ 1) +Testing all collisions (high 22..43 bits) - Worst is 28 bits: 514606/513534 (1.002x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 39 bits: 283/256 (1.105x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 13 bits at bit 51: 0.623x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 127 (0.992x) (^ 0) +Testing all collisions (low 40-bit) - Expected 128.0, actual 131 (1.023x) (^ 1) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32788 (1.002x) (^ 1) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32861 (1.004x) (^ 2) +Testing all collisions (high 22..43 bits) - Worst is 29 bits: 260058/259434 (1.002x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 41 bits: 79/64 (1.234x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 18 bits at bit 34: 0.435x (^ 0) + +Keyset 'Combination 8-bytes [0, high bit; BE]' - up to 23 blocks from a set of 2 - 16777214 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 122 (0.953x) (^ 0) +Testing all collisions (low 40-bit) - Expected 128.0, actual 143 (1.117x) (^ 3) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32517 (0.994x) (^ 0) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32639 (0.997x) (^ 0) +Testing all collisions (high 22..43 bits) - Worst is 35 bits: 4163/4095 (1.017x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 40 bits: 143/128 (1.117x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 19 bits at bit 51: 0.624x (^ 3) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 124 (0.969x) (^ 0) +Testing all collisions (low 40-bit) - Expected 128.0, actual 107 (0.836x) (^ 0) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32617 (0.997x) (^ 0) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32895 (1.005x) (^ 2) +Testing all collisions (high 22..43 bits) - Worst is 36 bits: 2111/2048 (1.031x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 26 bits: 1935526/1932787 (1.001x) (^ 1) +Testing distribution (any 8..21 bits) - Worst bias is 21 bits at bit 47: 0.464x (^ 0) + +Keyset 'Combination 16-bytes [0, low bit; LE]' - up to 23 blocks from a set of 2 - 16777214 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 139 (1.086x) (^ 2) +Testing all collisions (low 40-bit) - Expected 128.0, actual 124 (0.969x) (^ 0) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32861 (1.004x) (^ 2) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 33034 (1.009x) (^ 4) +Testing all collisions (high 22..43 bits) - Worst is 42 bits: 38/32 (1.188x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 31 bits: 66051/65366 (1.010x) (^ 3) +Testing distribution (any 8..21 bits) - Worst bias is 19 bits at bit 121: 0.496x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 131 (1.023x) (^ 1) +Testing all collisions (low 40-bit) - Expected 128.0, actual 125 (0.977x) (^ 0) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32550 (0.995x) (^ 0) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32771 (1.001x) (^ 1) +Testing all collisions (high 22..43 bits) - Worst is 37 bits: 1081/1024 (1.056x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 34 bits: 8264/8189 (1.009x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 18 bits at bit 106: 0.556x (^ 0) + +Keyset 'Combination 16-bytes [0, low bit; BE]' - up to 23 blocks from a set of 2 - 16777214 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 132 (1.031x) (^ 1) +Testing all collisions (low 40-bit) - Expected 128.0, actual 135 (1.055x) (^ 1) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32453 (0.992x) (^ 0) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 33059 (1.010x) (^ 4) +Testing all collisions (high 22..43 bits) - Worst is 43 bits: 19/16 (1.188x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 32 bits: 33059/32725 (1.010x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 17 bits at bit 78: 0.557x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 127 (0.992x) (^ 0) +Testing all collisions (low 40-bit) - Expected 128.0, actual 140 (1.094x) (^ 2) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 33151 (1.013x) (^ 6) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32857 (1.004x) (^ 2) +Testing all collisions (high 22..43 bits) - Worst is 31 bits: 66070/65366 (1.011x) (^ 3) +Testing all collisions (low 22..43 bits) - Worst is 33 bits: 16551/16373 (1.011x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 17 bits at bit 8: 0.574x (^ 0) + +Keyset 'Combination 16-bytes [0, high bit; LE]' - up to 23 blocks from a set of 2 - 16777214 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 152 (1.188x) (^ 5) +Testing all collisions (low 40-bit) - Expected 128.0, actual 140 (1.094x) (^ 2) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32795 (1.002x) (^ 1) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32592 (0.996x) (^ 0) +Testing all collisions (high 22..43 bits) - Worst is 42 bits: 51/32 (1.594x) (^ 5) +Testing all collisions (low 22..43 bits) - Worst is 39 bits: 274/256 (1.070x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 11 bits at bit 83: 0.737x (^ 1) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 1 (------) (^10) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 119 (0.930x) (^ 0) +Testing all collisions (low 40-bit) - Expected 128.0, actual 120 (0.938x) (^ 0) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32977 (1.008x) (^ 3) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32598 (0.996x) (^ 0) +Testing all collisions (high 22..43 bits) - Worst is 35 bits: 4194/4095 (1.024x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 39 bits: 278/256 (1.086x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 14 bits at bit 104: 0.587x (^ 0) + +Keyset 'Combination 16-bytes [0, high bit; BE]' - up to 23 blocks from a set of 2 - 16777214 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 130 (1.016x) (^ 1) +Testing all collisions (low 40-bit) - Expected 128.0, actual 124 (0.969x) (^ 0) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32826 (1.003x) (^ 1) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32806 (1.002x) (^ 1) +Testing all collisions (high 22..43 bits) - Worst is 38 bits: 561/512 (1.096x) (^ 1) +Testing all collisions (low 22..43 bits) - Worst is 36 bits: 2096/2048 (1.024x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 10 bits at bit 112: 0.782x (^ 1) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 142 (1.109x) (^ 3) +Testing all collisions (low 40-bit) - Expected 128.0, actual 118 (0.922x) (^ 0) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32786 (1.002x) (^ 1) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32877 (1.005x) (^ 2) +Testing all collisions (high 22..43 bits) - Worst is 43 bits: 27/16 (1.688x) (^ 2) +Testing all collisions (low 22..43 bits) - Worst is 31 bits: 65785/65366 (1.006x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 21 bits at bit 120: 0.458x (^ 0) + +Keyset 'Combination 32-bytes [0, low bit; LE]' - up to 23 blocks from a set of 2 - 16777214 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 135 (1.055x) (^ 1) +Testing all collisions (low 40-bit) - Expected 128.0, actual 118 (0.922x) (^ 0) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32605 (0.996x) (^ 0) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32821 (1.003x) (^ 1) +Testing all collisions (high 22..43 bits) - Worst is 39 bits: 271/256 (1.059x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 32 bits: 32821/32725 (1.003x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 11 bits at bit 103: 0.554x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 133 (1.039x) (^ 1) +Testing all collisions (low 40-bit) - Expected 128.0, actual 143 (1.117x) (^ 3) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32774 (1.001x) (^ 1) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32914 (1.006x) (^ 2) +Testing all collisions (high 22..43 bits) - Worst is 29 bits: 259879/259434 (1.002x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 41 bits: 82/64 (1.281x) (^ 1) +Testing distribution (any 8..21 bits) - Worst bias is 21 bits at bit 64: 0.465x (^ 0) + +Keyset 'Combination 32-bytes [0, low bit; BE]' - up to 23 blocks from a set of 2 - 16777214 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 124 (0.969x) (^ 0) +Testing all collisions (low 40-bit) - Expected 128.0, actual 128 (1.000x) (^ 1) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32714 (1.000x) (^ 0) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32865 (1.004x) (^ 2) +Testing all collisions (high 22..43 bits) - Worst is 34 bits: 8386/8189 (1.024x) (^ 1) +Testing all collisions (low 22..43 bits) - Worst is 36 bits: 2159/2048 (1.054x) (^ 2) +Testing distribution (any 8..21 bits) - Worst bias is 10 bits at bit 74: 0.782x (^ 1) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 127 (0.992x) (^ 0) +Testing all collisions (low 40-bit) - Expected 128.0, actual 129 (1.008x) (^ 1) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32767 (1.001x) (^ 1) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32903 (1.005x) (^ 2) +Testing all collisions (high 22..43 bits) - Worst is 30 bits: 130914/130392 (1.004x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 32 bits: 32903/32725 (1.005x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 16 bits at bit 113: 0.523x (^ 0) + +Keyset 'Combination 32-bytes [0, high bit; LE]' - up to 23 blocks from a set of 2 - 16777214 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 115 (0.898x) (^ 0) +Testing all collisions (low 40-bit) - Expected 128.0, actual 136 (1.063x) (^ 1) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32698 (0.999x) (^ 0) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32732 (1.000x) (^ 1) +Testing all collisions (high 22..43 bits) - Worst is 26 bits: 1933362/1932787 (1.000x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 25 bits: 3577320/3574575 (1.001x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 11 bits at bit 112: 0.640x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 131 (1.023x) (^ 1) +Testing all collisions (low 40-bit) - Expected 128.0, actual 138 (1.078x) (^ 2) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32757 (1.001x) (^ 1) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32789 (1.002x) (^ 1) +Testing all collisions (high 22..43 bits) - Worst is 36 bits: 2111/2048 (1.031x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 40 bits: 138/128 (1.078x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 12 bits at bit 20: 0.645x (^ 0) + +Keyset 'Combination 32-bytes [0, high bit; BE]' - up to 23 blocks from a set of 2 - 16777214 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 112 (0.875x) (^ 0) +Testing all collisions (low 40-bit) - Expected 128.0, actual 114 (0.891x) (^ 0) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32423 (0.991x) (^ 0) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32802 (1.002x) (^ 1) +Testing all collisions (high 22..43 bits) - Worst is 38 bits: 547/512 (1.068x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 31 bits: 65671/65366 (1.005x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 19 bits at bit 83: 0.505x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 127 (0.992x) (^ 0) +Testing all collisions (low 40-bit) - Expected 128.0, actual 132 (1.031x) (^ 1) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32732 (1.000x) (^ 1) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32342 (0.988x) (^ 0) +Testing all collisions (high 22..43 bits) - Worst is 29 bits: 260054/259434 (1.002x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 25 bits: 3577208/3574575 (1.001x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 11 bits at bit 43: 0.704x (^ 0) + +Keyset 'Combination 64-bytes [0, low bit; LE]' - up to 23 blocks from a set of 2 - 16777214 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 121 (0.945x) (^ 0) +Testing all collisions (low 40-bit) - Expected 128.0, actual 139 (1.086x) (^ 2) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32599 (0.996x) (^ 0) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32678 (0.999x) (^ 0) +Testing all collisions (high 22..43 bits) - Worst is 27 bits: 1007878/1006217 (1.002x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 38 bits: 564/512 (1.102x) (^ 2) +Testing distribution (any 8..21 bits) - Worst bias is 14 bits at bit 115: 0.538x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 122 (0.953x) (^ 0) +Testing all collisions (low 40-bit) - Expected 128.0, actual 130 (1.016x) (^ 1) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32735 (1.000x) (^ 1) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32784 (1.002x) (^ 1) +Testing all collisions (high 22..43 bits) - Worst is 36 bits: 2085/2048 (1.018x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 28 bits: 514888/513534 (1.003x) (^ 1) +Testing distribution (any 8..21 bits) - Worst bias is 14 bits at bit 11: 0.650x (^ 1) + +Keyset 'Combination 64-bytes [0, low bit; BE]' - up to 23 blocks from a set of 2 - 16777214 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 122 (0.953x) (^ 0) +Testing all collisions (low 40-bit) - Expected 128.0, actual 125 (0.977x) (^ 0) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32742 (1.001x) (^ 1) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32502 (0.993x) (^ 0) +Testing all collisions (high 22..43 bits) - Worst is 28 bits: 514691/513534 (1.002x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 35 bits: 4169/4095 (1.018x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 9 bits at bit 68: 0.827x (^ 1) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 134 (1.047x) (^ 1) +Testing all collisions (low 40-bit) - Expected 128.0, actual 112 (0.875x) (^ 0) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32575 (0.995x) (^ 0) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32664 (0.998x) (^ 0) +Testing all collisions (high 22..43 bits) - Worst is 36 bits: 2180/2048 (1.065x) (^ 4) +Testing all collisions (low 22..43 bits) - Worst is 30 bits: 130527/130392 (1.001x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 21 bits at bit 48: 0.542x (^ 1) + +Keyset 'Combination 64-bytes [0, high bit; LE]' - up to 23 blocks from a set of 2 - 16777214 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 127 (0.992x) (^ 0) +Testing all collisions (low 40-bit) - Expected 128.0, actual 113 (0.883x) (^ 0) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32915 (1.006x) (^ 2) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32869 (1.004x) (^ 2) +Testing all collisions (high 22..43 bits) - Worst is 33 bits: 16683/16373 (1.019x) (^ 2) +Testing all collisions (low 22..43 bits) - Worst is 33 bits: 16526/16373 (1.009x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 11 bits at bit 104: 0.947x (^ 6) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 133 (1.039x) (^ 1) +Testing all collisions (low 40-bit) - Expected 128.0, actual 117 (0.914x) (^ 0) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32656 (0.998x) (^ 0) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32597 (0.996x) (^ 0) +Testing all collisions (high 22..43 bits) - Worst is 30 bits: 131045/130392 (1.005x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 26 bits: 1934050/1932787 (1.001x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 16 bits at bit 110: 0.545x (^ 0) + +Keyset 'Combination 64-bytes [0, high bit; BE]' - up to 23 blocks from a set of 2 - 16777214 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 127 (0.992x) (^ 0) +Testing all collisions (low 40-bit) - Expected 128.0, actual 118 (0.922x) (^ 0) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32387 (0.990x) (^ 0) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32749 (1.001x) (^ 1) +Testing all collisions (high 22..43 bits) - Worst is 27 bits: 1007774/1006217 (1.002x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 37 bits: 1047/1024 (1.023x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 18 bits at bit 18: 0.438x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 135 (1.055x) (^ 1) +Testing all collisions (low 40-bit) - Expected 128.0, actual 139 (1.086x) (^ 2) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 33301 (1.018x) (^10) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32915 (1.006x) (^ 2) +Testing all collisions (high 22..43 bits) - Worst is 32 bits: 33301/32725 (1.018x) (^ 5) +Testing all collisions (low 22..43 bits) - Worst is 33 bits: 16536/16373 (1.010x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 18 bits at bit 83: 0.564x (^ 1) + + +[[[ Keyset 'Text' Tests ]]] + +Keyset 'Dict' - dictionary words - 528194 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 32.5, actual 28 (0.862x) (^ 0) +Testing all collisions (low 32-bit) - Expected 32.5, actual 33 (1.000x) (^ 1) +Testing all collisions (high 30-bit) - Expected 129.9, actual 122 (0.939x) (^ 0) +Testing all collisions (low 30-bit) - Expected 129.9, actual 122 (0.939x) (^ 0) +Testing all collisions (high 17..33 bits) - Worst is 21 bits: 61512/61266 (1.004x) (^ 0) +Testing all collisions (low 17..33 bits) - Worst is 33 bits: 17/16 (1.047x) (^ 0) +Testing distribution (any 8..16 bits) - Worst bias is 12 bits at bit 120: 0.635x (^ 0) + +Keyset 'TextNum' - numbers in text form without commas - 10000000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 181.9, actual 174 (0.957x) (^ 0) +Testing all collisions (low 38-bit) - Expected 181.9, actual 170 (0.935x) (^ 0) +Testing all collisions (high 32-bit) - Expected 11632.5, actual 11539 (0.992x) (^ 0) +Testing all collisions (low 32-bit) - Expected 11632.5, actual 11401 (0.980x) (^ 0) +Testing all collisions (high 21..42 bits) - Worst is 41 bits: 23/23 (1.012x) (^ 0) +Testing all collisions (low 21..42 bits) - Worst is 28 bits: 184267/183973 (1.002x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 9 bits at bit 65: 0.691x (^ 0) + +Keyset 'TextNum' - numbers in text form with commas - 10000000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 181.9, actual 186 (1.023x) (^ 1) +Testing all collisions (low 38-bit) - Expected 181.9, actual 180 (0.990x) (^ 0) +Testing all collisions (high 32-bit) - Expected 11632.5, actual 11725 (1.008x) (^ 2) +Testing all collisions (low 32-bit) - Expected 11632.5, actual 11538 (0.992x) (^ 0) +Testing all collisions (high 21..42 bits) - Worst is 37 bits: 391/364 (1.075x) (^ 0) +Testing all collisions (low 21..42 bits) - Worst is 23 bits: 4159373/4158049 (1.000x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 20 bits at bit 82: 0.448x (^ 0) + +Keyset 'Text' - keys of form "FXXXXB" - 15752961 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 112.8, actual 120 (1.063x) (^ 1) +Testing all collisions (low 40-bit) - Expected 112.8, actual 123 (1.090x) (^ 2) +Testing all collisions (high 32-bit) - Expected 28853.8, actual 28990 (1.005x) (^ 2) +Testing all collisions (low 32-bit) - Expected 28853.8, actual 28742 (0.996x) (^ 0) +Testing all collisions (high 22..43 bits) - Worst is 42 bits: 37/28 (1.311x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 43 bits: 21/14 (1.489x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 18 bits at bit 92: 0.520x (^ 0) + +Keyset 'Text' - keys of form "FBXXXX" - 15752961 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 112.8, actual 120 (1.063x) (^ 1) +Testing all collisions (low 40-bit) - Expected 112.8, actual 123 (1.090x) (^ 2) +Testing all collisions (high 32-bit) - Expected 28853.8, actual 29215 (1.013x) (^ 5) +Testing all collisions (low 32-bit) - Expected 28853.8, actual 28759 (0.997x) (^ 0) +Testing all collisions (high 22..43 bits) - Worst is 30 bits: 115749/114993 (1.007x) (^ 1) +Testing all collisions (low 22..43 bits) - Worst is 41 bits: 69/56 (1.223x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 21 bits at bit 71: 0.430x (^ 0) + +Keyset 'Text' - keys of form "XXXXFB" - 15752961 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 112.8, actual 112 (0.992x) (^ 0) +Testing all collisions (low 40-bit) - Expected 112.8, actual 117 (1.037x) (^ 1) +Testing all collisions (high 32-bit) - Expected 28853.8, actual 28991 (1.005x) (^ 2) +Testing all collisions (low 32-bit) - Expected 28853.8, actual 28869 (1.001x) (^ 1) +Testing all collisions (high 22..43 bits) - Worst is 36 bits: 1878/1805 (1.040x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 24 bits: 5540004/5536280 (1.001x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 17 bits at bit 30: 0.495x (^ 0) + +Keyset 'Text' - keys of form "FooXXXXBar" - 15752961 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 112.8, actual 104 (0.922x) (^ 0) +Testing all collisions (low 40-bit) - Expected 112.8, actual 110 (0.975x) (^ 0) +Testing all collisions (high 32-bit) - Expected 28853.8, actual 28986 (1.005x) (^ 2) +Testing all collisions (low 32-bit) - Expected 28853.8, actual 29092 (1.008x) (^ 3) +Testing all collisions (high 22..43 bits) - Worst is 34 bits: 7436/7220 (1.030x) (^ 3) +Testing all collisions (low 22..43 bits) - Worst is 32 bits: 29092/28854 (1.008x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 21 bits at bit 65: 0.530x (^ 1) + +Keyset 'Text' - keys of form "FooBarXXXX" - 15752961 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 112.8, actual 111 (0.984x) (^ 0) +Testing all collisions (low 40-bit) - Expected 112.8, actual 101 (0.895x) (^ 0) +Testing all collisions (high 32-bit) - Expected 28853.8, actual 28899 (1.002x) (^ 1) +Testing all collisions (low 32-bit) - Expected 28853.8, actual 29045 (1.007x) (^ 2) +Testing all collisions (high 22..43 bits) - Worst is 29 bits: 230077/228869 (1.005x) (^ 3) +Testing all collisions (low 22..43 bits) - Worst is 36 bits: 1858/1805 (1.029x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 8 bits at bit 70: 0.800x (^ 0) + +Keyset 'Text' - keys of form "XXXXFooBar" - 15752961 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 112.8, actual 106 (0.939x) (^ 0) +Testing all collisions (low 40-bit) - Expected 112.8, actual 118 (1.046x) (^ 1) +Testing all collisions (high 32-bit) - Expected 28853.8, actual 28942 (1.003x) (^ 1) +Testing all collisions (low 32-bit) - Expected 28853.8, actual 28861 (1.000x) (^ 1) +Testing all collisions (high 22..43 bits) - Worst is 26 bits: 1713725/1712342 (1.001x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 33 bits: 14618/14436 (1.013x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 9 bits at bit 25: 0.787x (^ 0) + +Keyset 'Text' - keys of form "FooooXXXXBaaar" - 15752961 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 112.8, actual 118 (1.046x) (^ 1) +Testing all collisions (low 40-bit) - Expected 112.8, actual 129 (1.143x) (^ 3) +Testing all collisions (high 32-bit) - Expected 28853.8, actual 29141 (1.010x) (^ 4) +Testing all collisions (low 32-bit) - Expected 28853.8, actual 28776 (0.997x) (^ 0) +Testing all collisions (high 22..43 bits) - Worst is 32 bits: 29141/28854 (1.010x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 43 bits: 23/14 (1.631x) (^ 1) +Testing distribution (any 8..21 bits) - Worst bias is 9 bits at bit 119: 0.630x (^ 0) + +Keyset 'Text' - keys of form "FooooBaaarXXXX" - 15752961 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 112.8, actual 119 (1.055x) (^ 1) +Testing all collisions (low 40-bit) - Expected 112.8, actual 110 (0.975x) (^ 0) +Testing all collisions (high 32-bit) - Expected 28853.8, actual 28854 (1.000x) (^ 1) +Testing all collisions (low 32-bit) - Expected 28853.8, actual 28966 (1.004x) (^ 1) +Testing all collisions (high 22..43 bits) - Worst is 39 bits: 253/226 (1.121x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 36 bits: 1903/1805 (1.054x) (^ 2) +Testing distribution (any 8..21 bits) - Worst bias is 17 bits at bit 15: 0.498x (^ 0) + +Keyset 'Text' - keys of form "XXXXFooooBaaar" - 15752961 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 112.8, actual 127 (1.125x) (^ 3) +Testing all collisions (low 40-bit) - Expected 112.8, actual 98 (0.868x) (^ 0) +Testing all collisions (high 32-bit) - Expected 28853.8, actual 29108 (1.009x) (^ 3) +Testing all collisions (low 32-bit) - Expected 28853.8, actual 28808 (0.998x) (^ 0) +Testing all collisions (high 22..43 bits) - Worst is 43 bits: 25/14 (1.772x) (^ 2) +Testing all collisions (low 22..43 bits) - Worst is 27 bits: 890485/889322 (1.001x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 10 bits at bit 70: 0.695x (^ 0) + +Keyset 'Text' - keys of form "FooooooXXXXBaaaaar" - 15752961 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 112.8, actual 105 (0.930x) (^ 0) +Testing all collisions (low 40-bit) - Expected 112.8, actual 107 (0.948x) (^ 0) +Testing all collisions (high 32-bit) - Expected 28853.8, actual 28400 (0.984x) (^ 0) +Testing all collisions (low 32-bit) - Expected 28853.8, actual 28767 (0.997x) (^ 0) +Testing all collisions (high 22..43 bits) - Worst is 25 bits: 3183001/3181142 (1.001x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 27 bits: 890130/889322 (1.001x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 21 bits at bit 123: 0.502x (^ 0) + +Keyset 'Text' - keys of form "FooooooBaaaaarXXXX" - 15752961 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 112.8, actual 100 (0.886x) (^ 0) +Testing all collisions (low 40-bit) - Expected 112.8, actual 115 (1.019x) (^ 1) +Testing all collisions (high 32-bit) - Expected 28853.8, actual 28843 (1.000x) (^ 0) +Testing all collisions (low 32-bit) - Expected 28853.8, actual 28990 (1.005x) (^ 2) +Testing all collisions (high 22..43 bits) - Worst is 35 bits: 3699/3611 (1.024x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 43 bits: 23/14 (1.631x) (^ 1) +Testing distribution (any 8..21 bits) - Worst bias is 20 bits at bit 90: 0.524x (^ 0) + +Keyset 'Text' - keys of form "XXXXFooooooBaaaaar" - 15752961 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 112.8, actual 126 (1.117x) (^ 3) +Testing all collisions (low 40-bit) - Expected 112.8, actual 143 (1.267x) (^ 8) +Testing all collisions (high 32-bit) - Expected 28853.8, actual 28709 (0.995x) (^ 0) +Testing all collisions (low 32-bit) - Expected 28853.8, actual 29033 (1.006x) (^ 2) +Testing all collisions (high 22..43 bits) - Worst is 41 bits: 70/56 (1.241x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 40 bits: 143/113 (1.267x) (^ 3) +Testing distribution (any 8..21 bits) - Worst bias is 18 bits at bit 34: 0.520x (^ 0) + +Keyset 'Text' - keys of form "FooooooooXXXXBaaaaaaar" - 15752961 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 112.8, actual 109 (0.966x) (^ 0) +Testing all collisions (low 40-bit) - Expected 112.8, actual 119 (1.055x) (^ 1) +Testing all collisions (high 32-bit) - Expected 28853.8, actual 28685 (0.994x) (^ 0) +Testing all collisions (low 32-bit) - Expected 28853.8, actual 28864 (1.000x) (^ 1) +Testing all collisions (high 22..43 bits) - Worst is 39 bits: 235/226 (1.041x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 38 bits: 480/451 (1.063x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 13 bits at bit 113: 0.615x (^ 0) + +Keyset 'Text' - keys of form "FooooooooBaaaaaaarXXXX" - 15752961 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 112.8, actual 107 (0.948x) (^ 0) +Testing all collisions (low 40-bit) - Expected 112.8, actual 126 (1.117x) (^ 3) +Testing all collisions (high 32-bit) - Expected 28853.8, actual 28626 (0.992x) (^ 0) +Testing all collisions (low 32-bit) - Expected 28853.8, actual 28736 (0.996x) (^ 0) +Testing all collisions (high 22..43 bits) - Worst is 35 bits: 3745/3611 (1.037x) (^ 1) +Testing all collisions (low 22..43 bits) - Worst is 40 bits: 126/113 (1.117x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 15 bits at bit 72: 0.605x (^ 0) + +Keyset 'Text' - keys of form "XXXXFooooooooBaaaaaaar" - 15752961 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 112.8, actual 116 (1.028x) (^ 1) +Testing all collisions (low 40-bit) - Expected 112.8, actual 102 (0.904x) (^ 0) +Testing all collisions (high 32-bit) - Expected 28853.8, actual 28840 (1.000x) (^ 0) +Testing all collisions (low 32-bit) - Expected 28853.8, actual 29084 (1.008x) (^ 3) +Testing all collisions (high 22..43 bits) - Worst is 39 bits: 243/226 (1.077x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 37 bits: 957/903 (1.060x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 21 bits at bit 43: 0.590x (^ 3) + +Keyset 'Text' - keys of form "FooooooooooXXXXBaaaaaaaaar" - 15752961 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 112.8, actual 101 (0.895x) (^ 0) +Testing all collisions (low 40-bit) - Expected 112.8, actual 113 (1.000x) (^ 1) +Testing all collisions (high 32-bit) - Expected 28853.8, actual 28910 (1.002x) (^ 1) +Testing all collisions (low 32-bit) - Expected 28853.8, actual 29138 (1.010x) (^ 4) +Testing all collisions (high 22..43 bits) - Worst is 30 bits: 115404/114993 (1.004x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 32 bits: 29138/28854 (1.010x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 16 bits at bit 37: 0.699x (^ 3) + +Keyset 'Text' - keys of form "FooooooooooBaaaaaaaaarXXXX" - 15752961 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 112.8, actual 125 (1.108x) (^ 2) +Testing all collisions (low 40-bit) - Expected 112.8, actual 103 (0.913x) (^ 0) +Testing all collisions (high 32-bit) - Expected 28853.8, actual 28877 (1.001x) (^ 1) +Testing all collisions (low 32-bit) - Expected 28853.8, actual 28944 (1.003x) (^ 1) +Testing all collisions (high 22..43 bits) - Worst is 38 bits: 505/451 (1.119x) (^ 2) +Testing all collisions (low 22..43 bits) - Worst is 33 bits: 14558/14436 (1.008x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 19 bits at bit 19: 0.504x (^ 0) + +Keyset 'Text' - keys of form "XXXXFooooooooooBaaaaaaaaar" - 15752961 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 112.8, actual 98 (0.868x) (^ 0) +Testing all collisions (low 40-bit) - Expected 112.8, actual 122 (1.081x) (^ 2) +Testing all collisions (high 32-bit) - Expected 28853.8, actual 28758 (0.997x) (^ 0) +Testing all collisions (low 32-bit) - Expected 28853.8, actual 29051 (1.007x) (^ 3) +Testing all collisions (high 22..43 bits) - Worst is 36 bits: 1857/1805 (1.029x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 32 bits: 29051/28854 (1.007x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 16 bits at bit 30: 0.582x (^ 0) + +Keyset 'Words' - 1-4 random chars from alnum charset - 1000000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 116.4, actual 114 (0.979x) (^ 0) +Testing all collisions (low 32-bit) - Expected 116.4, actual 113 (0.971x) (^ 0) +Testing all collisions (high 18..35 bits) - Worst is 35 bits: 17/15 (1.168x) (^ 0) +Testing all collisions (low 18..35 bits) - Worst is 35 bits: 25/15 (1.718x) (^ 2) +Testing distribution (any 8..17 bits) - Worst bias is 13 bits at bit 20: 0.478x (^ 0) + +Keyset 'Words' - 5-8 random chars from alnum charset - 1000000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 116.4, actual 117 (1.000x) (^ 1) +Testing all collisions (low 32-bit) - Expected 116.4, actual 132 (1.134x) (^ 3) +Testing all collisions (high 18..35 bits) - Worst is 33 bits: 69/58 (1.185x) (^ 0) +Testing all collisions (low 18..35 bits) - Worst is 33 bits: 72/58 (1.237x) (^ 0) +Testing distribution (any 8..17 bits) - Worst bias is 9 bits at bit 102: 0.860x (^ 2) + +Keyset 'Words' - 1-16 random chars from alnum charset - 1000000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 116.4, actual 124 (1.065x) (^ 1) +Testing all collisions (low 32-bit) - Expected 116.4, actual 100 (0.859x) (^ 0) +Testing all collisions (high 18..35 bits) - Worst is 28 bits: 1936/1860 (1.041x) (^ 0) +Testing all collisions (low 18..35 bits) - Worst is 24 bits: 29445/29219 (1.008x) (^ 0) +Testing distribution (any 8..17 bits) - Worst bias is 15 bits at bit 19: 0.562x (^ 0) + +Keyset 'Words' - 1-32 random chars from alnum charset - 1000000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 116.4, actual 97 (0.833x) (^ 0) +Testing all collisions (low 32-bit) - Expected 116.4, actual 123 (1.057x) (^ 1) +Testing all collisions (high 18..35 bits) - Worst is 29 bits: 945/931 (1.015x) (^ 0) +Testing all collisions (low 18..35 bits) - Worst is 33 bits: 72/58 (1.237x) (^ 0) +Testing distribution (any 8..17 bits) - Worst bias is 10 bits at bit 127: 0.868x (^ 3) + +Keyset 'Long' - 1968-2128 random chars from alnum charset - varying first 80 chars - 4960000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 179.0, actual 181 (1.011x) (^ 1) +Testing all collisions (low 36-bit) - Expected 179.0, actual 174 (0.972x) (^ 0) +Testing all collisions (high 32-bit) - Expected 2862.9, actual 2830 (0.989x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2862.9, actual 2831 (0.989x) (^ 0) +Testing all collisions (high 20..40 bits) - Worst is 23 bits: 1216283/1215487 (1.001x) (^ 0) +Testing all collisions (low 20..40 bits) - Worst is 35 bits: 375/358 (1.048x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 12 bits at bit 92: 0.735x (^ 2) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 179.0, actual 209 (1.168x) (^ 5) +Testing all collisions (low 36-bit) - Expected 179.0, actual 176 (0.983x) (^ 0) +Testing all collisions (high 32-bit) - Expected 2862.9, actual 2922 (1.021x) (^ 2) +Testing all collisions (low 32-bit) - Expected 2862.9, actual 2903 (1.014x) (^ 2) +Testing all collisions (high 20..40 bits) - Worst is 31 bits: 5899/5724 (1.031x) (^ 2) +Testing all collisions (low 20..40 bits) - Worst is 29 bits: 23156/22842 (1.014x) (^ 1) +Testing distribution (any 8..19 bits) - Worst bias is 15 bits at bit 28: 0.544x (^ 0) + +Keyset 'Long' - 1968-2128 random chars from alnum charset - varying last 80 chars - 4960000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 179.0, actual 179 (1.000x) (^ 1) +Testing all collisions (low 36-bit) - Expected 179.0, actual 147 (0.821x) (^ 0) +Testing all collisions (high 32-bit) - Expected 2862.9, actual 2822 (0.986x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2862.9, actual 2792 (0.975x) (^ 0) +Testing all collisions (high 20..40 bits) - Worst is 31 bits: 5763/5724 (1.007x) (^ 0) +Testing all collisions (low 20..40 bits) - Worst is 23 bits: 1217199/1215487 (1.001x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 8 bits at bit 41: 0.876x (^ 1) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 179.0, actual 177 (0.989x) (^ 0) +Testing all collisions (low 36-bit) - Expected 179.0, actual 230 (1.285x) (^12) +Testing all collisions (high 32-bit) - Expected 2862.9, actual 2890 (1.009x) (^ 1) +Testing all collisions (low 32-bit) - Expected 2862.9, actual 2907 (1.015x) (^ 2) +Testing all collisions (high 20..40 bits) - Worst is 40 bits: 17/11 (1.520x) (^ 0) +Testing all collisions (low 20..40 bits) - Worst is 36 bits: 230/179 (1.285x) (^ 8) +Testing distribution (any 8..19 bits) - Worst bias is 16 bits at bit 4: 0.660x (^ 2) + +Keyset 'Long' - 4016-4176 random chars from alnum charset - varying first 80 chars - 4960000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 179.0, actual 185 (1.034x) (^ 1) +Testing all collisions (low 36-bit) - Expected 179.0, actual 189 (1.056x) (^ 2) +Testing all collisions (high 32-bit) - Expected 2862.9, actual 2840 (0.992x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2862.9, actual 2801 (0.978x) (^ 0) +Testing all collisions (high 20..40 bits) - Worst is 39 bits: 28/22 (1.251x) (^ 0) +Testing all collisions (low 20..40 bits) - Worst is 39 bits: 29/22 (1.296x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 18 bits at bit 97: 0.536x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 179.0, actual 165 (0.922x) (^ 0) +Testing all collisions (low 36-bit) - Expected 179.0, actual 171 (0.955x) (^ 0) +Testing all collisions (high 32-bit) - Expected 2862.9, actual 2832 (0.989x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2862.9, actual 2854 (0.997x) (^ 0) +Testing all collisions (high 20..40 bits) - Worst is 30 bits: 11652/11438 (1.019x) (^ 1) +Testing all collisions (low 20..40 bits) - Worst is 25 bits: 349580/349177 (1.001x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 13 bits at bit 52: 0.589x (^ 0) + +Keyset 'Long' - 4016-4176 random chars from alnum charset - varying last 80 chars - 4960000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 179.0, actual 185 (1.034x) (^ 1) +Testing all collisions (low 36-bit) - Expected 179.0, actual 180 (1.006x) (^ 1) +Testing all collisions (high 32-bit) - Expected 2862.9, actual 2800 (0.978x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2862.9, actual 2870 (1.002x) (^ 1) +Testing all collisions (high 20..40 bits) - Worst is 35 bits: 382/358 (1.067x) (^ 0) +Testing all collisions (low 20..40 bits) - Worst is 26 bits: 179292/178863 (1.002x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 18 bits at bit 54: 0.482x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 179.0, actual 202 (1.129x) (^ 4) +Testing all collisions (low 36-bit) - Expected 179.0, actual 171 (0.955x) (^ 0) +Testing all collisions (high 32-bit) - Expected 2862.9, actual 2912 (1.017x) (^ 2) +Testing all collisions (low 32-bit) - Expected 2862.9, actual 2915 (1.018x) (^ 2) +Testing all collisions (high 20..40 bits) - Worst is 28 bits: 46078/45543 (1.012x) (^ 3) +Testing all collisions (low 20..40 bits) - Worst is 40 bits: 18/11 (1.609x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 17 bits at bit 96: 0.401x (^ 0) + +Keyset 'Long' - 8112-8272 random chars from alnum charset - varying first 80 chars - 4960000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 179.0, actual 163 (0.911x) (^ 0) +Testing all collisions (low 36-bit) - Expected 179.0, actual 173 (0.967x) (^ 0) +Testing all collisions (high 32-bit) - Expected 2862.9, actual 2943 (1.028x) (^ 3) +Testing all collisions (low 32-bit) - Expected 2862.9, actual 2895 (1.011x) (^ 1) +Testing all collisions (high 20..40 bits) - Worst is 32 bits: 2943/2863 (1.028x) (^ 0) +Testing all collisions (low 20..40 bits) - Worst is 32 bits: 2895/2863 (1.011x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 16 bits at bit 0: 0.587x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 179.0, actual 181 (1.011x) (^ 1) +Testing all collisions (low 36-bit) - Expected 179.0, actual 184 (1.028x) (^ 1) +Testing all collisions (high 32-bit) - Expected 2862.9, actual 2811 (0.982x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2862.9, actual 2794 (0.976x) (^ 0) +Testing all collisions (high 20..40 bits) - Worst is 36 bits: 181/179 (1.011x) (^ 0) +Testing all collisions (low 20..40 bits) - Worst is 28 bits: 45983/45543 (1.010x) (^ 1) +Testing distribution (any 8..19 bits) - Worst bias is 15 bits at bit 30: 0.611x (^ 1) + +Keyset 'Long' - 8112-8272 random chars from alnum charset - varying last 80 chars - 4960000 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 179.0, actual 199 (1.112x) (^ 3) +Testing all collisions (low 36-bit) - Expected 179.0, actual 174 (0.972x) (^ 0) +Testing all collisions (high 32-bit) - Expected 2862.9, actual 2954 (1.032x) (^ 4) +Testing all collisions (low 32-bit) - Expected 2862.9, actual 2799 (0.978x) (^ 0) +Testing all collisions (high 20..40 bits) - Worst is 35 bits: 404/358 (1.129x) (^ 2) +Testing all collisions (low 20..40 bits) - Worst is 38 bits: 49/45 (1.095x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 14 bits at bit 80: 0.631x (^ 1) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 179.0, actual 179 (1.000x) (^ 1) +Testing all collisions (low 36-bit) - Expected 179.0, actual 177 (0.989x) (^ 0) +Testing all collisions (high 32-bit) - Expected 2862.9, actual 2884 (1.007x) (^ 1) +Testing all collisions (low 32-bit) - Expected 2862.9, actual 2828 (0.988x) (^ 0) +Testing all collisions (high 20..40 bits) - Worst is 23 bits: 1217288/1215487 (1.001x) (^ 0) +Testing all collisions (low 20..40 bits) - Worst is 35 bits: 380/358 (1.062x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 10 bits at bit 0: 0.667x (^ 0) + + +[[[ Keyset 'TwoBytes' Tests ]]] + +Keyset 'TwoBytes' - all [2, 20]-byte keys with 1 or 2 non-zero bytes - 86536545 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 45-bit) - Expected 106.4, actual 109 (1.024x) (^ 1) +Testing all collisions (low 45-bit) - Expected 106.4, actual 93 (0.874x) (^ 0) +Testing all collisions (high 32-bit) - Expected 865959.1, actual 866199 (1.000x) (^ 1) +Testing all collisions (low 32-bit) - Expected 865959.1, actual 867096 (1.001x) (^ 3) +Testing all collisions (high 25..48 bits) - Worst is 34 bits: 218096/217581 (1.002x) (^ 0) +Testing all collisions (low 25..48 bits) - Worst is 32 bits: 867096/865959 (1.001x) (^ 0) +Testing distribution (any 8..24 bits) - Worst bias is 22 bits at bit 113: 0.510x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 45-bit) - Expected 106.4, actual 114 (1.071x) (^ 2) +Testing all collisions (low 45-bit) - Expected 106.4, actual 118 (1.109x) (^ 2) +Testing all collisions (high 32-bit) - Expected 865959.1, actual 865624 (1.000x) (^ 0) +Testing all collisions (low 32-bit) - Expected 865959.1, actual 865543 (1.000x) (^ 0) +Testing all collisions (high 25..48 bits) - Worst is 43 bits: 466/426 (1.095x) (^ 0) +Testing all collisions (low 25..48 bits) - Worst is 47 bits: 34/27 (1.278x) (^ 0) +Testing distribution (any 8..24 bits) - Worst bias is 12 bits at bit 44: 0.676x (^ 0) + +Keyset 'TwoBytes' - all 32-byte keys with 1 or 2 non-zero bytes - 32260560 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 42-bit) - Expected 118.3, actual 125 (1.056x) (^ 1) +Testing all collisions (low 42-bit) - Expected 118.3, actual 110 (0.930x) (^ 0) +Testing all collisions (high 32-bit) - Expected 120855.7, actual 120594 (0.998x) (^ 0) +Testing all collisions (low 32-bit) - Expected 120855.7, actual 120579 (0.998x) (^ 0) +Testing all collisions (high 23..45 bits) - Worst is 36 bits: 7812/7571 (1.032x) (^ 3) +Testing all collisions (low 23..45 bits) - Worst is 45 bits: 17/15 (1.149x) (^ 0) +Testing distribution (any 8..22 bits) - Worst bias is 17 bits at bit 68: 0.533x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 42-bit) - Expected 118.3, actual 108 (0.913x) (^ 0) +Testing all collisions (low 42-bit) - Expected 118.3, actual 146 (1.234x) (^ 6) +Testing all collisions (high 32-bit) - Expected 120855.7, actual 120857 (1.000x) (^ 1) +Testing all collisions (low 32-bit) - Expected 120855.7, actual 120734 (0.999x) (^ 0) +Testing all collisions (high 23..45 bits) - Worst is 37 bits: 3859/3786 (1.019x) (^ 0) +Testing all collisions (low 23..45 bits) - Worst is 41 bits: 282/237 (1.192x) (^ 4) +Testing distribution (any 8..22 bits) - Worst bias is 16 bits at bit 72: 0.511x (^ 0) + +Keyset 'TwoBytes' - all 48-byte keys with 1 or 2 non-zero bytes - 73360440 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 44-bit) - Expected 153.0, actual 168 (1.098x) (^ 3) +Testing all collisions (low 44-bit) - Expected 153.0, actual 152 (0.994x) (^ 0) +Testing all collisions (high 32-bit) - Expected 622966.7, actual 623769 (1.001x) (^ 2) +Testing all collisions (low 32-bit) - Expected 622966.7, actual 622665 (1.000x) (^ 0) +Testing all collisions (high 24..47 bits) - Worst is 43 bits: 341/306 (1.115x) (^ 1) +Testing all collisions (low 24..47 bits) - Worst is 34 bits: 157189/156407 (1.005x) (^ 1) +Testing distribution (any 8..23 bits) - Worst bias is 19 bits at bit 114: 0.555x (^ 1) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 44-bit) - Expected 153.0, actual 139 (0.909x) (^ 0) +Testing all collisions (low 44-bit) - Expected 153.0, actual 172 (1.124x) (^ 3) +Testing all collisions (high 32-bit) - Expected 622966.7, actual 623035 (1.000x) (^ 1) +Testing all collisions (low 32-bit) - Expected 622966.7, actual 622901 (1.000x) (^ 0) +Testing all collisions (high 24..47 bits) - Worst is 31 bits: 1239830/1238890 (1.001x) (^ 0) +Testing all collisions (low 24..47 bits) - Worst is 42 bits: 679/612 (1.110x) (^ 3) +Testing distribution (any 8..23 bits) - Worst bias is 9 bits at bit 0: 0.739x (^ 0) + +Keyset 'OneByte ' - all 1024-byte keys with 1 non-zero byte - 261120 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 7.9, actual 4 (0.504x) (^ 0) +Testing all collisions (low 32-bit) - Expected 7.9, actual 7 (0.882x) (^ 0) +Testing all collisions (high 28-bit) - Expected 127.0, actual 127 (1.000x) (^ 1) +Testing all collisions (low 28-bit) - Expected 127.0, actual 151 (1.189x) (^ 5) +Testing all collisions (high 16..31 bits) - Worst is 22 bits: 8039/7962 (1.010x) (^ 0) +Testing all collisions (low 16..31 bits) - Worst is 28 bits: 151/127 (1.189x) (^ 1) +Testing distribution (any 8..15 bits) - Worst bias is 15 bits at bit 6: 0.758x (^ 5) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 7.9, actual 7 (0.882x) (^ 0) +Testing all collisions (low 32-bit) - Expected 7.9, actual 6 (0.756x) (^ 0) +Testing all collisions (high 28-bit) - Expected 127.0, actual 120 (0.945x) (^ 0) +Testing all collisions (low 28-bit) - Expected 127.0, actual 131 (1.032x) (^ 1) +Testing all collisions (high 16..31 bits) - Worst is 21 bits: 15748/15602 (1.009x) (^ 0) +Testing all collisions (low 16..31 bits) - Worst is 26 bits: 527/507 (1.039x) (^ 0) +Testing distribution (any 8..15 bits) - Worst bias is 10 bits at bit 53: 0.594x (^ 0) + +Keyset 'OneByte ' - all 2048-byte keys with 1 non-zero byte - 522240 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 31.7, actual 40 (1.260x) (^ 3) +Testing all collisions (low 32-bit) - Expected 31.7, actual 24 (0.756x) (^ 0) +Testing all collisions (high 30-bit) - Expected 127.0, actual 126 (0.992x) (^ 0) +Testing all collisions (low 30-bit) - Expected 127.0, actual 118 (0.929x) (^ 0) +Testing all collisions (high 17..33 bits) - Worst is 33 bits: 27/16 (1.701x) (^ 3) +Testing all collisions (low 17..33 bits) - Worst is 17 bits: 393678/393606 (1.000x) (^ 0) +Testing distribution (any 8..16 bits) - Worst bias is 8 bits at bit 25: 0.759x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 31.7, actual 25 (0.787x) (^ 0) +Testing all collisions (low 32-bit) - Expected 31.7, actual 26 (0.819x) (^ 0) +Testing all collisions (high 30-bit) - Expected 127.0, actual 123 (0.969x) (^ 0) +Testing all collisions (low 30-bit) - Expected 127.0, actual 136 (1.071x) (^ 2) +Testing all collisions (high 17..33 bits) - Worst is 22 bits: 31417/31204 (1.007x) (^ 0) +Testing all collisions (low 17..33 bits) - Worst is 28 bits: 532/508 (1.048x) (^ 0) +Testing distribution (any 8..16 bits) - Worst bias is 10 bits at bit 56: 0.554x (^ 0) + +Keyset 'OneByte ' - all 4096-byte keys with 1 non-zero byte - 1044480 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 127.0, actual 132 (1.039x) (^ 1) +Testing all collisions (low 32-bit) - Expected 127.0, actual 119 (0.937x) (^ 0) +Testing all collisions (high 18..35 bits) - Worst is 31 bits: 264/254 (1.040x) (^ 0) +Testing all collisions (low 18..35 bits) - Worst is 28 bits: 2062/2029 (1.016x) (^ 0) +Testing distribution (any 8..17 bits) - Worst bias is 17 bits at bit 29: 0.532x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 32-bit) - Expected 127.0, actual 135 (1.063x) (^ 1) +Testing all collisions (low 32-bit) - Expected 127.0, actual 118 (0.929x) (^ 0) +Testing all collisions (high 18..35 bits) - Worst is 21 bits: 222556/221802 (1.003x) (^ 0) +Testing all collisions (low 18..35 bits) - Worst is 27 bits: 4094/4054 (1.010x) (^ 0) +Testing distribution (any 8..17 bits) - Worst bias is 9 bits at bit 74: 0.817x (^ 1) + + +[[[ Keyset 'PerlinNoise' Tests ]]] + +Generating coordinates from 2-byte keys - 16777216 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 139 (1.086x) (^ 2) +Testing all collisions (low 40-bit) - Expected 128.0, actual 126 (0.984x) (^ 0) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32641 (0.997x) (^ 0) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32558 (0.995x) (^ 0) +Testing all collisions (high 22..43 bits) - Worst is 42 bits: 42/32 (1.313x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 43 bits: 21/16 (1.313x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 19 bits at bit 100: 0.526x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 154 (1.203x) (^ 6) +Testing all collisions (low 40-bit) - Expected 128.0, actual 129 (1.008x) (^ 1) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32752 (1.001x) (^ 1) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 33099 (1.011x) (^ 5) +Testing all collisions (high 22..43 bits) - Worst is 40 bits: 154/128 (1.203x) (^ 1) +Testing all collisions (low 22..43 bits) - Worst is 32 bits: 33099/32725 (1.011x) (^ 1) +Testing distribution (any 8..21 bits) - Worst bias is 11 bits at bit 9: 0.662x (^ 0) +---Analyzing additional differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 120 (0.938x) (^ 0) +Testing all collisions (low 40-bit) - Expected 128.0, actual 126 (0.984x) (^ 0) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32633 (0.997x) (^ 0) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32499 (0.993x) (^ 0) +Testing all collisions (high 22..43 bits) - Worst is 37 bits: 1091/1024 (1.065x) (^ 1) +Testing all collisions (low 22..43 bits) - Worst is 27 bits: 1007795/1006217 (1.002x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 15 bits at bit 31: 0.550x (^ 0) + +Generating coordinates from 4-byte keys - 16777216 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 138 (1.078x) (^ 2) +Testing all collisions (low 40-bit) - Expected 128.0, actual 135 (1.055x) (^ 1) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32588 (0.996x) (^ 0) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32630 (0.997x) (^ 0) +Testing all collisions (high 22..43 bits) - Worst is 37 bits: 1074/1024 (1.049x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 34 bits: 8351/8189 (1.020x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 11 bits at bit 47: 0.772x (^ 2) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 130 (1.016x) (^ 1) +Testing all collisions (low 40-bit) - Expected 128.0, actual 123 (0.961x) (^ 0) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32811 (1.003x) (^ 1) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32721 (1.000x) (^ 0) +Testing all collisions (high 22..43 bits) - Worst is 43 bits: 23/16 (1.438x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 25 bits: 3577627/3574576 (1.001x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 19 bits at bit 110: 0.547x (^ 1) +---Analyzing additional differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 130 (1.016x) (^ 1) +Testing all collisions (low 40-bit) - Expected 128.0, actual 133 (1.039x) (^ 1) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32834 (1.003x) (^ 1) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32840 (1.004x) (^ 1) +Testing all collisions (high 22..43 bits) - Worst is 37 bits: 1083/1024 (1.058x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 26 bits: 1934888/1932788 (1.001x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 9 bits at bit 36: 0.788x (^ 0) + +Generating coordinates from 8-byte keys - 16777216 keys +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 111 (0.867x) (^ 0) +Testing all collisions (low 40-bit) - Expected 128.0, actual 134 (1.047x) (^ 1) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32793 (1.002x) (^ 1) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 33183 (1.014x) (^ 7) +Testing all collisions (high 22..43 bits) - Worst is 26 bits: 1934220/1932788 (1.001x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 33 bits: 16823/16373 (1.027x) (^ 7) +Testing distribution (any 8..21 bits) - Worst bias is 8 bits at bit 118: 0.864x (^ 1) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 155 (1.211x) (^ 6) +Testing all collisions (low 40-bit) - Expected 128.0, actual 108 (0.844x) (^ 0) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32828 (1.003x) (^ 1) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32904 (1.005x) (^ 2) +Testing all collisions (high 22..43 bits) - Worst is 39 bits: 300/256 (1.172x) (^ 3) +Testing all collisions (low 22..43 bits) - Worst is 32 bits: 32904/32725 (1.005x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 15 bits at bit 65: 0.726x (^ 4) +---Analyzing additional differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 128.0, actual 133 (1.039x) (^ 1) +Testing all collisions (low 40-bit) - Expected 128.0, actual 103 (0.805x) (^ 0) +Testing all collisions (high 32-bit) - Expected 32725.4, actual 32946 (1.007x) (^ 3) +Testing all collisions (low 32-bit) - Expected 32725.4, actual 32715 (1.000x) (^ 0) +Testing all collisions (high 22..43 bits) - Worst is 38 bits: 551/512 (1.076x) (^ 0) +Testing all collisions (low 22..43 bits) - Worst is 26 bits: 1934503/1932788 (1.001x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 16 bits at bit 82: 0.636x (^ 1) + + +[[[ Keyset 'Bitflip' Tests ]]] + +Testing 3-byte keys, 2097152 reps.................... 0 failed, worst is key bit 4 +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 148 (1.156x) (^ 4) +Testing all collisions (low 36-bit) - Expected 128.0, actual 147 (1.148x) (^ 4) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2172 (1.061x) (^ 8) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 2133 (1.042x) (^ 5) +Testing all collisions (high 20..39 bits) - Worst is 32 bits: 2172/2047 (1.061x) (^ 3) +Testing all collisions (low 20..39 bits) - Worst is 34 bits: 565/512 (1.104x) (^ 2) +Testing distribution (any 8..19 bits) - Worst bias is 13 bits at bit 37: 0.789x (^ 4) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 34-bit) - Expected 128.0, actual 149 (1.164x) (^ 4) +Testing all collisions (low 34-bit) - Expected 128.0, actual 135 (1.055x) (^ 1) +Testing all collisions (high 32-bit) - Expected 511.9, actual 534 (1.043x) (^ 2) +Testing all collisions (low 32-bit) - Expected 511.9, actual 532 (1.039x) (^ 2) +Testing all collisions (high 19..37 bits) - Worst is 34 bits: 149/128 (1.164x) (^ 0) +Testing all collisions (low 19..37 bits) - Worst is 26 bits: 32697/32429 (1.008x) (^ 0) +Testing distribution (any 8..18 bits) - Worst bias is 15 bits at bit 96: 0.682x (^ 3) + +Testing 4-byte keys, 2097152 reps.................... 0 failed, worst is key bit 7 +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 132 (1.031x) (^ 1) +Testing all collisions (low 36-bit) - Expected 128.0, actual 130 (1.016x) (^ 1) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2104 (1.028x) (^ 3) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 2098 (1.025x) (^ 2) +Testing all collisions (high 20..39 bits) - Worst is 32 bits: 2104/2047 (1.028x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 25 bits: 252486/251554 (1.004x) (^ 1) +Testing distribution (any 8..19 bits) - Worst bias is 9 bits at bit 3: 0.936x (^ 4) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 34-bit) - Expected 128.0, actual 147 (1.148x) (^ 4) +Testing all collisions (low 34-bit) - Expected 128.0, actual 151 (1.180x) (^ 5) +Testing all collisions (high 32-bit) - Expected 511.9, actual 543 (1.061x) (^ 3) +Testing all collisions (low 32-bit) - Expected 511.9, actual 498 (0.973x) (^ 0) +Testing all collisions (high 19..37 bits) - Worst is 27 bits: 16626/16299 (1.020x) (^ 3) +Testing all collisions (low 19..37 bits) - Worst is 36 bits: 48/32 (1.500x) (^ 3) +Testing distribution (any 8..18 bits) - Worst bias is 15 bits at bit 12: 0.558x (^ 0) + +Testing 8-byte keys, 2097152 reps.................... 0 failed, worst is key bit 1 +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 146 (1.141x) (^ 3) +Testing all collisions (low 36-bit) - Expected 128.0, actual 154 (1.203x) (^ 6) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2162 (1.056x) (^ 7) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 2110 (1.031x) (^ 3) +Testing all collisions (high 20..39 bits) - Worst is 32 bits: 2162/2047 (1.056x) (^ 3) +Testing all collisions (low 20..39 bits) - Worst is 35 bits: 294/256 (1.148x) (^ 2) +Testing distribution (any 8..19 bits) - Worst bias is 16 bits at bit 45: 0.618x (^ 1) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 34-bit) - Expected 128.0, actual 141 (1.102x) (^ 2) +Testing all collisions (low 34-bit) - Expected 128.0, actual 141 (1.102x) (^ 2) +Testing all collisions (high 32-bit) - Expected 511.9, actual 527 (1.029x) (^ 1) +Testing all collisions (low 32-bit) - Expected 511.9, actual 498 (0.973x) (^ 0) +Testing all collisions (high 19..37 bits) - Worst is 25 bits: 64739/64192 (1.009x) (^ 1) +Testing all collisions (low 19..37 bits) - Worst is 34 bits: 141/128 (1.102x) (^ 0) +Testing distribution (any 8..18 bits) - Worst bias is 15 bits at bit 54: 0.614x (^ 1) + +Testing 20-byte keys, 2097152 reps.................... 1 failed, worst is key bit 84 !!!!! +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 155 (1.211x) (^ 6) +Testing all collisions (low 36-bit) - Expected 128.0, actual 131 (1.023x) (^ 1) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2291 (1.119x) (^23) !!!!! +Testing all collisions (low 32-bit) - Expected 2047.3, actual 1983 (0.969x) (^ 0) +Testing all collisions (high 20..39 bits) - Worst is 32 bits: 2291/2047 (1.119x) (^19) ! +Testing all collisions (low 20..39 bits) - Worst is 29 bits: 16403/16341 (1.004x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 13 bits at bit 47: 0.629x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 34-bit) - Expected 128.0, actual 139 (1.086x) (^ 2) +Testing all collisions (low 34-bit) - Expected 128.0, actual 129 (1.008x) (^ 1) +Testing all collisions (high 32-bit) - Expected 511.9, actual 527 (1.029x) (^ 1) +Testing all collisions (low 32-bit) - Expected 511.9, actual 525 (1.026x) (^ 1) +Testing all collisions (high 19..37 bits) - Worst is 28 bits: 8308/8171 (1.017x) (^ 0) +Testing all collisions (low 19..37 bits) - Worst is 30 bits: 2093/2047 (1.023x) (^ 0) +Testing distribution (any 8..18 bits) - Worst bias is 13 bits at bit 35: 0.563x (^ 0) + +Testing 32-byte keys, 2097152 reps.................... 0 failed, worst is key bit 126 +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 152 (1.188x) (^ 5) +Testing all collisions (low 36-bit) - Expected 128.0, actual 127 (0.992x) (^ 0) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2101 (1.026x) (^ 3) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 1985 (0.970x) (^ 0) +Testing all collisions (high 20..39 bits) - Worst is 33 bits: 1103/1024 (1.077x) (^ 2) +Testing all collisions (low 20..39 bits) - Worst is 26 bits: 128740/128383 (1.003x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 17 bits at bit 124: 0.663x (^ 3) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 34-bit) - Expected 128.0, actual 123 (0.961x) (^ 0) +Testing all collisions (low 34-bit) - Expected 128.0, actual 154 (1.203x) (^ 6) +Testing all collisions (high 32-bit) - Expected 511.9, actual 508 (0.992x) (^ 0) +Testing all collisions (low 32-bit) - Expected 511.9, actual 565 (1.104x) (^ 6) +Testing all collisions (high 19..37 bits) - Worst is 23 bits: 241838/241598 (1.001x) (^ 0) +Testing all collisions (low 19..37 bits) - Worst is 33 bits: 297/256 (1.160x) (^ 3) +Testing distribution (any 8..18 bits) - Worst bias is 9 bits at bit 61: 0.911x (^ 3) + +*********FAIL********* + +[[[ Seed 'Zeroes' Tests ]]] + +Keyset 'SeedZeroes' - up to 1280-byte keys, seeds with up to 2 set bits - 4160 seeds - 5324800 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 37-bit) - Expected 103.1, actual 103 (1.000x) (^ 0) +Testing all collisions (low 37-bit) - Expected 103.1, actual 89 (0.863x) (^ 0) +Testing all collisions (high 32-bit) - Expected 3299.4, actual 3317 (1.005x) (^ 1) +Testing all collisions (low 32-bit) - Expected 3299.4, actual 3292 (0.998x) (^ 0) +Testing all collisions (high 21..40 bits) - Worst is 25 bits: 401460/401010 (1.001x) (^ 0) +Testing all collisions (low 21..40 bits) - Worst is 25 bits: 401717/401010 (1.002x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 8 bits at bit 4: 0.699x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 1 (------) (^12) +Testing all collisions (high 37-bit) - Expected 103.1, actual 147 (1.425x) (^15) +Testing all collisions (low 37-bit) - Expected 103.1, actual 130 (1.260x) (^ 7) +Testing all collisions (high 32-bit) - Expected 3299.4, actual 3508 (1.063x) (^12) +Testing all collisions (low 32-bit) - Expected 3299.4, actual 3230 (0.979x) (^ 0) +Testing all collisions (high 21..40 bits) - Worst is 33 bits: 1832/1650 (1.110x) (^13) +Testing all collisions (low 21..40 bits) - Worst is 37 bits: 130/103 (1.260x) (^ 3) +Testing distribution (any 8..20 bits) - Worst bias is 17 bits at bit 108: 0.559x (^ 0) +---Analyzing additional differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 37-bit) - Expected 103.1, actual 92 (0.892x) (^ 0) +Testing all collisions (low 37-bit) - Expected 103.1, actual 90 (0.873x) (^ 0) +Testing all collisions (high 32-bit) - Expected 3299.4, actual 3258 (0.987x) (^ 0) +Testing all collisions (low 32-bit) - Expected 3299.4, actual 3209 (0.973x) (^ 0) +Testing all collisions (high 21..40 bits) - Worst is 24 bits: 763789/762269 (1.002x) (^ 0) +Testing all collisions (low 21..40 bits) - Worst is 29 bits: 26391/26319 (1.003x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 16 bits at bit 34: 0.565x (^ 0) + +Keyset 'SeedZeroes' - up to 8448-byte keys, seeds with up to 2 set bits - 4160 seeds - 35143680 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 42-bit) - Expected 140.4, actual 134 (0.954x) (^ 0) +Testing all collisions (low 42-bit) - Expected 140.4, actual 145 (1.033x) (^ 1) +Testing all collisions (high 32-bit) - Expected 143390.7, actual 143396 (1.000x) (^ 1) +Testing all collisions (low 32-bit) - Expected 143390.7, actual 142964 (0.997x) (^ 0) +Testing all collisions (high 23..45 bits) - Worst is 31 bits: 286458/286002 (1.002x) (^ 0) +Testing all collisions (low 23..45 bits) - Worst is 44 bits: 39/35 (1.111x) (^ 0) +Testing distribution (any 8..22 bits) - Worst bias is 13 bits at bit 51: 0.594x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 1 (------) (^ 9) +Testing all collisions (high 42-bit) - Expected 140.4, actual 359 (2.557x) (^99) !!!!! +Testing all collisions (low 42-bit) - Expected 140.4, actual 229 (1.631x) (^37) !!!!! +Testing all collisions (high 32-bit) - Expected 143390.7, actual 147267 (1.027x) (^79) !!!!! +Testing all collisions (low 32-bit) - Expected 143390.7, actual 142963 (0.997x) (^ 0) +Testing all collisions (high 23..45 bits) - Worst is 44 bits: 167/35 (4.757x) (^99) !!!!! +Testing all collisions (low 23..45 bits) - Worst is 38 bits: 3428/2246 (1.526x) (^99) !!!!! +Testing distribution (any 8..22 bits) - Worst bias is 21 bits at bit 106: 1.720x (^83) !!!!! +---Analyzing additional differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 42-bit) - Expected 140.4, actual 142 (1.011x) (^ 1) +Testing all collisions (low 42-bit) - Expected 140.4, actual 135 (0.961x) (^ 0) +Testing all collisions (high 32-bit) - Expected 143390.7, actual 143665 (1.002x) (^ 2) +Testing all collisions (low 32-bit) - Expected 143390.7, actual 143066 (0.998x) (^ 0) +Testing all collisions (high 23..45 bits) - Worst is 33 bits: 72303/71793 (1.007x) (^ 1) +Testing all collisions (low 23..45 bits) - Worst is 39 bits: 1131/1123 (1.007x) (^ 0) +Testing distribution (any 8..22 bits) - Worst bias is 9 bits at bit 107: 0.686x (^ 0) + +*********FAIL********* + +[[[ Keyset 'SeedSparse' Tests ]]] + +Keyset 'SeedSparse' - 2-byte keys - seeds with up to 5 bits set - 8303633 seeds +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 125.4, actual 127 (1.013x) (^ 1) +Testing all collisions (low 38-bit) - Expected 125.4, actual 123 (0.981x) (^ 0) +Testing all collisions (high 32-bit) - Expected 8021.7, actual 8021 (1.000x) (^ 0) +Testing all collisions (low 32-bit) - Expected 8021.7, actual 8083 (1.008x) (^ 2) +Testing all collisions (high 21..41 bits) - Worst is 35 bits: 1071/1003 (1.068x) (^ 1) +Testing all collisions (low 21..41 bits) - Worst is 34 bits: 2128/2006 (1.061x) (^ 3) +Testing distribution (any 8..20 bits) - Worst bias is 12 bits at bit 16: 0.783x (^ 3) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 125.4, actual 140 (1.116x) (^ 3) +Testing all collisions (low 38-bit) - Expected 125.4, actual 115 (0.917x) (^ 0) +Testing all collisions (high 32-bit) - Expected 8021.7, actual 8103 (1.010x) (^ 2) +Testing all collisions (low 32-bit) - Expected 8021.7, actual 8093 (1.009x) (^ 2) +Testing all collisions (high 21..41 bits) - Worst is 36 bits: 539/502 (1.074x) (^ 0) +Testing all collisions (low 21..41 bits) - Worst is 29 bits: 64387/63885 (1.008x) (^ 1) +Testing distribution (any 8..20 bits) - Worst bias is 15 bits at bit 124: 0.650x (^ 1) + +Keyset 'SeedSparse' - 3-byte keys - seeds with up to 5 bits set - 8303633 seeds +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 125.4, actual 141 (1.124x) (^ 3) +Testing all collisions (low 38-bit) - Expected 125.4, actual 129 (1.029x) (^ 1) +Testing all collisions (high 32-bit) - Expected 8021.7, actual 8038 (1.002x) (^ 1) +Testing all collisions (low 32-bit) - Expected 8021.7, actual 8041 (1.002x) (^ 1) +Testing all collisions (high 21..41 bits) - Worst is 41 bits: 27/16 (1.722x) (^ 2) +Testing all collisions (low 21..41 bits) - Worst is 33 bits: 4072/4012 (1.015x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 15 bits at bit 116: 0.575x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 125.4, actual 138 (1.100x) (^ 2) +Testing all collisions (low 38-bit) - Expected 125.4, actual 95 (0.757x) (^ 0) +Testing all collisions (high 32-bit) - Expected 8021.7, actual 7895 (0.984x) (^ 0) +Testing all collisions (low 32-bit) - Expected 8021.7, actual 7887 (0.983x) (^ 0) +Testing all collisions (high 21..41 bits) - Worst is 39 bits: 87/63 (1.387x) (^ 4) +Testing all collisions (low 21..41 bits) - Worst is 25 bits: 948363/947681 (1.001x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 9 bits at bit 43: 0.729x (^ 0) + +Keyset 'SeedSparse' - 6-byte keys - seeds with up to 5 bits set - 8303633 seeds +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 125.4, actual 127 (1.013x) (^ 1) +Testing all collisions (low 38-bit) - Expected 125.4, actual 131 (1.045x) (^ 1) +Testing all collisions (high 32-bit) - Expected 8021.7, actual 8089 (1.008x) (^ 2) +Testing all collisions (low 32-bit) - Expected 8021.7, actual 7983 (0.995x) (^ 0) +Testing all collisions (high 21..41 bits) - Worst is 35 bits: 1057/1003 (1.054x) (^ 0) +Testing all collisions (low 21..41 bits) - Worst is 37 bits: 261/251 (1.041x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 9 bits at bit 18: 0.809x (^ 1) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 125.4, actual 135 (1.076x) (^ 2) +Testing all collisions (low 38-bit) - Expected 125.4, actual 137 (1.092x) (^ 2) +Testing all collisions (high 32-bit) - Expected 8021.7, actual 8118 (1.012x) (^ 2) +Testing all collisions (low 32-bit) - Expected 8021.7, actual 7852 (0.979x) (^ 0) +Testing all collisions (high 21..41 bits) - Worst is 34 bits: 2141/2006 (1.067x) (^ 4) +Testing all collisions (low 21..41 bits) - Worst is 38 bits: 137/125 (1.092x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 11 bits at bit 11: 0.649x (^ 0) + +Keyset 'SeedSparse' - 15-byte keys - seeds with up to 5 bits set - 8303633 seeds +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 125.4, actual 113 (0.901x) (^ 0) +Testing all collisions (low 38-bit) - Expected 125.4, actual 121 (0.965x) (^ 0) +Testing all collisions (high 32-bit) - Expected 8021.7, actual 8037 (1.002x) (^ 1) +Testing all collisions (low 32-bit) - Expected 8021.7, actual 7980 (0.995x) (^ 0) +Testing all collisions (high 21..41 bits) - Worst is 27 bits: 252064/251644 (1.002x) (^ 0) +Testing all collisions (low 21..41 bits) - Worst is 25 bits: 948587/947681 (1.001x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 12 bits at bit 41: 0.668x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 125.4, actual 126 (1.005x) (^ 1) +Testing all collisions (low 38-bit) - Expected 125.4, actual 99 (0.789x) (^ 0) +Testing all collisions (high 32-bit) - Expected 8021.7, actual 8090 (1.009x) (^ 2) +Testing all collisions (low 32-bit) - Expected 8021.7, actual 7993 (0.996x) (^ 0) +Testing all collisions (high 21..41 bits) - Worst is 31 bits: 16258/16033 (1.014x) (^ 0) +Testing all collisions (low 21..41 bits) - Worst is 30 bits: 32389/32025 (1.011x) (^ 1) +Testing distribution (any 8..20 bits) - Worst bias is 13 bits at bit 122: 0.584x (^ 0) + +Keyset 'SeedSparse' - 18-byte keys - seeds with up to 5 bits set - 8303633 seeds +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 125.4, actual 116 (0.925x) (^ 0) +Testing all collisions (low 38-bit) - Expected 125.4, actual 105 (0.837x) (^ 0) +Testing all collisions (high 32-bit) - Expected 8021.7, actual 8147 (1.016x) (^ 3) +Testing all collisions (low 32-bit) - Expected 8021.7, actual 7982 (0.995x) (^ 0) +Testing all collisions (high 21..41 bits) - Worst is 33 bits: 4139/4012 (1.032x) (^ 1) +Testing all collisions (low 21..41 bits) - Worst is 25 bits: 949120/947681 (1.002x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 16 bits at bit 33: 0.529x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 125.4, actual 101 (0.805x) (^ 0) +Testing all collisions (low 38-bit) - Expected 125.4, actual 136 (1.084x) (^ 2) +Testing all collisions (high 32-bit) - Expected 8021.7, actual 7992 (0.996x) (^ 0) +Testing all collisions (low 32-bit) - Expected 8021.7, actual 7960 (0.992x) (^ 0) +Testing all collisions (high 21..41 bits) - Worst is 35 bits: 1023/1003 (1.020x) (^ 0) +Testing all collisions (low 21..41 bits) - Worst is 37 bits: 279/251 (1.112x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 19 bits at bit 117: 0.597x (^ 2) + +Keyset 'SeedSparse' - 31-byte keys - seeds with up to 5 bits set - 8303633 seeds +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 125.4, actual 113 (0.901x) (^ 0) +Testing all collisions (low 38-bit) - Expected 125.4, actual 134 (1.068x) (^ 2) +Testing all collisions (high 32-bit) - Expected 8021.7, actual 8043 (1.003x) (^ 1) +Testing all collisions (low 32-bit) - Expected 8021.7, actual 7923 (0.988x) (^ 0) +Testing all collisions (high 21..41 bits) - Worst is 25 bits: 948894/947681 (1.001x) (^ 0) +Testing all collisions (low 21..41 bits) - Worst is 37 bits: 270/251 (1.076x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 20 bits at bit 41: 0.451x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 125.4, actual 123 (0.981x) (^ 0) +Testing all collisions (low 38-bit) - Expected 125.4, actual 130 (1.037x) (^ 1) +Testing all collisions (high 32-bit) - Expected 8021.7, actual 8008 (0.998x) (^ 0) +Testing all collisions (low 32-bit) - Expected 8021.7, actual 7874 (0.982x) (^ 0) +Testing all collisions (high 21..41 bits) - Worst is 22 bits: 4689222/4688584 (1.000x) (^ 0) +Testing all collisions (low 21..41 bits) - Worst is 29 bits: 64243/63885 (1.006x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 8 bits at bit 90: 0.747x (^ 0) + +Keyset 'SeedSparse' - 52-byte keys - seeds with up to 5 bits set - 8303633 seeds +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 125.4, actual 98 (0.781x) (^ 0) +Testing all collisions (low 38-bit) - Expected 125.4, actual 130 (1.037x) (^ 1) +Testing all collisions (high 32-bit) - Expected 8021.7, actual 8033 (1.001x) (^ 1) +Testing all collisions (low 32-bit) - Expected 8021.7, actual 7962 (0.993x) (^ 0) +Testing all collisions (high 21..41 bits) - Worst is 27 bits: 252511/251644 (1.003x) (^ 0) +Testing all collisions (low 21..41 bits) - Worst is 23 bits: 3034164/3032441 (1.001x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 16 bits at bit 42: 0.519x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 125.4, actual 126 (1.005x) (^ 1) +Testing all collisions (low 38-bit) - Expected 125.4, actual 116 (0.925x) (^ 0) +Testing all collisions (high 32-bit) - Expected 8021.7, actual 8119 (1.012x) (^ 2) +Testing all collisions (low 32-bit) - Expected 8021.7, actual 7925 (0.988x) (^ 0) +Testing all collisions (high 21..41 bits) - Worst is 30 bits: 32414/32025 (1.012x) (^ 1) +Testing all collisions (low 21..41 bits) - Worst is 41 bits: 17/16 (1.084x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 11 bits at bit 6: 0.711x (^ 0) + +Keyset 'SeedSparse' - 80-byte keys - seeds with up to 5 bits set - 8303633 seeds +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 125.4, actual 139 (1.108x) (^ 2) +Testing all collisions (low 38-bit) - Expected 125.4, actual 134 (1.068x) (^ 2) +Testing all collisions (high 32-bit) - Expected 8021.7, actual 8161 (1.017x) (^ 4) +Testing all collisions (low 32-bit) - Expected 8021.7, actual 8035 (1.002x) (^ 1) +Testing all collisions (high 21..41 bits) - Worst is 36 bits: 560/502 (1.116x) (^ 3) +Testing all collisions (low 21..41 bits) - Worst is 39 bits: 71/63 (1.132x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 13 bits at bit 61: 0.588x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 125.4, actual 153 (1.220x) (^ 6) +Testing all collisions (low 38-bit) - Expected 125.4, actual 123 (0.981x) (^ 0) +Testing all collisions (high 32-bit) - Expected 8021.7, actual 8047 (1.003x) (^ 1) +Testing all collisions (low 32-bit) - Expected 8021.7, actual 8043 (1.003x) (^ 1) +Testing all collisions (high 21..41 bits) - Worst is 38 bits: 153/125 (1.220x) (^ 2) +Testing all collisions (low 21..41 bits) - Worst is 40 bits: 34/31 (1.084x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 19 bits at bit 25: 0.590x (^ 2) + +Keyset 'SeedSparse' - 200-byte keys - seeds with up to 5 bits set - 8303633 seeds +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 125.4, actual 132 (1.052x) (^ 1) +Testing all collisions (low 38-bit) - Expected 125.4, actual 139 (1.108x) (^ 2) +Testing all collisions (high 32-bit) - Expected 8021.7, actual 8032 (1.001x) (^ 1) +Testing all collisions (low 32-bit) - Expected 8021.7, actual 8106 (1.011x) (^ 2) +Testing all collisions (high 21..41 bits) - Worst is 35 bits: 1128/1003 (1.124x) (^ 9) +Testing all collisions (low 21..41 bits) - Worst is 35 bits: 1062/1003 (1.059x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 19 bits at bit 47: 0.599x (^ 2) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 125.4, actual 126 (1.005x) (^ 1) +Testing all collisions (low 38-bit) - Expected 125.4, actual 131 (1.045x) (^ 1) +Testing all collisions (high 32-bit) - Expected 8021.7, actual 8015 (0.999x) (^ 0) +Testing all collisions (low 32-bit) - Expected 8021.7, actual 7967 (0.993x) (^ 0) +Testing all collisions (high 21..41 bits) - Worst is 41 bits: 21/16 (1.340x) (^ 0) +Testing all collisions (low 21..41 bits) - Worst is 26 bits: 493895/493171 (1.001x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 8 bits at bit 84: 0.772x (^ 0) + +Keyset 'SeedSparse' - 1025-byte keys - seeds with up to 5 bits set - 8303633 seeds +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 125.4, actual 132 (1.052x) (^ 1) +Testing all collisions (low 38-bit) - Expected 125.4, actual 112 (0.893x) (^ 0) +Testing all collisions (high 32-bit) - Expected 8021.7, actual 7970 (0.994x) (^ 0) +Testing all collisions (low 32-bit) - Expected 8021.7, actual 7974 (0.994x) (^ 0) +Testing all collisions (high 21..41 bits) - Worst is 40 bits: 40/31 (1.276x) (^ 0) +Testing all collisions (low 21..41 bits) - Worst is 27 bits: 252329/251644 (1.003x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 13 bits at bit 24: 0.626x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 125.4, actual 127 (1.013x) (^ 1) +Testing all collisions (low 38-bit) - Expected 125.4, actual 114 (0.909x) (^ 0) +Testing all collisions (high 32-bit) - Expected 8021.7, actual 8144 (1.015x) (^ 3) +Testing all collisions (low 32-bit) - Expected 8021.7, actual 7966 (0.993x) (^ 0) +Testing all collisions (high 21..41 bits) - Worst is 32 bits: 8144/8022 (1.015x) (^ 0) +Testing all collisions (low 21..41 bits) - Worst is 30 bits: 32162/32025 (1.004x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 20 bits at bit 26: 0.517x (^ 0) + + +[[[ Seed BlockLength Tests ]]] + +Seeds have up to 2 bits set, 4-byte blocks have up to 2 bits set + +Keyset 'SeedBlockLen' - 8-byte keys with block at offsets [0..4, by 4s] - 2196480 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 34-bit) - Expected 140.4, actual 148 (1.054x) (^ 1) +Testing all collisions (low 34-bit) - Expected 140.4, actual 121 (0.862x) (^ 0) +Testing all collisions (high 32-bit) - Expected 561.6, actual 574 (1.022x) (^ 1) +Testing all collisions (low 32-bit) - Expected 561.6, actual 533 (0.949x) (^ 0) +Testing all collisions (high 19..37 bits) - Worst is 25 bits: 70724/70348 (1.005x) (^ 0) +Testing all collisions (low 19..37 bits) - Worst is 22 bits: 487077/486612 (1.001x) (^ 0) +Testing distribution (any 8..18 bits) - Worst bias is 9 bits at bit 111: 0.711x (^ 0) + +Keyset 'SeedBlockLen' - 9-byte keys with block at offsets [0..4, by 4s] - 2196480 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 34-bit) - Expected 140.4, actual 159 (1.132x) (^ 3) +Testing all collisions (low 34-bit) - Expected 140.4, actual 135 (0.961x) (^ 0) +Testing all collisions (high 32-bit) - Expected 561.6, actual 576 (1.026x) (^ 1) +Testing all collisions (low 32-bit) - Expected 561.6, actual 540 (0.962x) (^ 0) +Testing all collisions (high 19..37 bits) - Worst is 34 bits: 159/140 (1.132x) (^ 0) +Testing all collisions (low 19..37 bits) - Worst is 35 bits: 80/70 (1.140x) (^ 0) +Testing distribution (any 8..18 bits) - Worst bias is 17 bits at bit 94: 0.580x (^ 1) + +Keyset 'SeedBlockLen' - 10-byte keys with block at offsets [0..4, by 4s] - 2196480 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 34-bit) - Expected 140.4, actual 148 (1.054x) (^ 1) +Testing all collisions (low 34-bit) - Expected 140.4, actual 129 (0.919x) (^ 0) +Testing all collisions (high 32-bit) - Expected 561.6, actual 564 (1.004x) (^ 1) +Testing all collisions (low 32-bit) - Expected 561.6, actual 563 (1.003x) (^ 1) +Testing all collisions (high 19..37 bits) - Worst is 37 bits: 22/18 (1.253x) (^ 0) +Testing all collisions (low 19..37 bits) - Worst is 25 bits: 70700/70348 (1.005x) (^ 0) +Testing distribution (any 8..18 bits) - Worst bias is 9 bits at bit 71: 0.830x (^ 1) + +Keyset 'SeedBlockLen' - 11-byte keys with block at offsets [0..4, by 4s] - 2196480 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 34-bit) - Expected 140.4, actual 145 (1.033x) (^ 1) +Testing all collisions (low 34-bit) - Expected 140.4, actual 147 (1.047x) (^ 1) +Testing all collisions (high 32-bit) - Expected 561.6, actual 559 (0.995x) (^ 0) +Testing all collisions (low 32-bit) - Expected 561.6, actual 601 (1.070x) (^ 4) +Testing all collisions (high 19..37 bits) - Worst is 30 bits: 2318/2245 (1.032x) (^ 0) +Testing all collisions (low 19..37 bits) - Worst is 37 bits: 26/18 (1.481x) (^ 0) +Testing distribution (any 8..18 bits) - Worst bias is 18 bits at bit 13: 0.521x (^ 0) + +Keyset 'SeedBlockLen' - 12-byte keys with block at offsets [0..8, by 4s] - 3294720 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 35-bit) - Expected 158.0, actual 161 (1.019x) (^ 1) +Testing all collisions (low 35-bit) - Expected 158.0, actual 173 (1.095x) (^ 2) +Testing all collisions (high 32-bit) - Expected 1263.4, actual 1254 (0.993x) (^ 0) +Testing all collisions (low 32-bit) - Expected 1263.4, actual 1314 (1.040x) (^ 3) +Testing all collisions (high 20..38 bits) - Worst is 29 bits: 10219/10089 (1.013x) (^ 0) +Testing all collisions (low 20..38 bits) - Worst is 27 bits: 40392/40110 (1.007x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 11 bits at bit 100: 0.608x (^ 0) + +Keyset 'SeedBlockLen' - 13-byte keys with block at offsets [0..8, by 4s] - 3294720 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 35-bit) - Expected 158.0, actual 156 (0.988x) (^ 0) +Testing all collisions (low 35-bit) - Expected 158.0, actual 163 (1.032x) (^ 1) +Testing all collisions (high 32-bit) - Expected 1263.4, actual 1252 (0.991x) (^ 0) +Testing all collisions (low 32-bit) - Expected 1263.4, actual 1279 (1.012x) (^ 1) +Testing all collisions (high 20..38 bits) - Worst is 24 bits: 303974/303333 (1.002x) (^ 0) +Testing all collisions (low 20..38 bits) - Worst is 30 bits: 5191/5050 (1.028x) (^ 1) +Testing distribution (any 8..19 bits) - Worst bias is 13 bits at bit 42: 0.673x (^ 1) + +Keyset 'SeedBlockLen' - 14-byte keys with block at offsets [0..8, by 4s] - 3294720 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 35-bit) - Expected 158.0, actual 189 (1.197x) (^ 6) +Testing all collisions (low 35-bit) - Expected 158.0, actual 141 (0.893x) (^ 0) +Testing all collisions (high 32-bit) - Expected 1263.4, actual 1322 (1.046x) (^ 4) +Testing all collisions (low 32-bit) - Expected 1263.4, actual 1226 (0.970x) (^ 0) +Testing all collisions (high 20..38 bits) - Worst is 36 bits: 104/79 (1.317x) (^ 3) +Testing all collisions (low 20..38 bits) - Worst is 28 bits: 20276/20137 (1.007x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 16 bits at bit 28: 0.570x (^ 0) + +Keyset 'SeedBlockLen' - 15-byte keys with block at offsets [0..8, by 4s] - 3294720 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 35-bit) - Expected 158.0, actual 160 (1.013x) (^ 1) +Testing all collisions (low 35-bit) - Expected 158.0, actual 160 (1.013x) (^ 1) +Testing all collisions (high 32-bit) - Expected 1263.4, actual 1266 (1.002x) (^ 1) +Testing all collisions (low 32-bit) - Expected 1263.4, actual 1293 (1.023x) (^ 2) +Testing all collisions (high 20..38 bits) - Worst is 34 bits: 334/316 (1.057x) (^ 0) +Testing all collisions (low 20..38 bits) - Worst is 31 bits: 2579/2526 (1.021x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 15 bits at bit 89: 0.673x (^ 2) + +Keyset 'SeedBlockLen' - 16-byte keys with block at offsets [0..12, by 4s] - 4392960 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 140.4, actual 139 (0.990x) (^ 0) +Testing all collisions (low 36-bit) - Expected 140.4, actual 150 (1.068x) (^ 2) +Testing all collisions (high 32-bit) - Expected 2245.8, actual 2278 (1.014x) (^ 1) +Testing all collisions (low 32-bit) - Expected 2245.8, actual 2269 (1.010x) (^ 1) +Testing all collisions (high 20..39 bits) - Worst is 31 bits: 4597/4490 (1.024x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 28 bits: 36189/35750 (1.012x) (^ 2) +Testing distribution (any 8..19 bits) - Worst bias is 13 bits at bit 37: 0.547x (^ 0) + +Keyset 'SeedBlockLen' - 17-byte keys with block at offsets [0..12, by 4s] - 4392960 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 140.4, actual 148 (1.054x) (^ 1) +Testing all collisions (low 36-bit) - Expected 140.4, actual 155 (1.104x) (^ 3) +Testing all collisions (high 32-bit) - Expected 2245.8, actual 2213 (0.985x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2245.8, actual 2164 (0.964x) (^ 0) +Testing all collisions (high 20..39 bits) - Worst is 38 bits: 41/35 (1.168x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 36 bits: 155/140 (1.104x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 19 bits at bit 110: 0.545x (^ 1) + +Keyset 'SeedBlockLen' - 18-byte keys with block at offsets [0..12, by 4s] - 4392960 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 140.4, actual 140 (1.000x) (^ 0) +Testing all collisions (low 36-bit) - Expected 140.4, actual 149 (1.061x) (^ 2) +Testing all collisions (high 32-bit) - Expected 2245.8, actual 2230 (0.993x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2245.8, actual 2260 (1.006x) (^ 1) +Testing all collisions (high 20..39 bits) - Worst is 34 bits: 579/562 (1.031x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 37 bits: 94/70 (1.339x) (^ 3) +Testing distribution (any 8..19 bits) - Worst bias is 12 bits at bit 47: 0.713x (^ 1) + +Keyset 'SeedBlockLen' - 19-byte keys with block at offsets [0..12, by 4s] - 4392960 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 140.4, actual 118 (0.840x) (^ 0) +Testing all collisions (low 36-bit) - Expected 140.4, actual 147 (1.047x) (^ 1) +Testing all collisions (high 32-bit) - Expected 2245.8, actual 2241 (0.998x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2245.8, actual 2270 (1.011x) (^ 1) +Testing all collisions (high 20..39 bits) - Worst is 26 bits: 141287/140695 (1.004x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 31 bits: 4612/4490 (1.027x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 18 bits at bit 113: 0.582x (^ 1) + +Keyset 'SeedBlockLen' - 20-byte keys with block at offsets [0..16, by 4s] - 5491200 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 37-bit) - Expected 109.7, actual 102 (0.930x) (^ 0) +Testing all collisions (low 37-bit) - Expected 109.7, actual 95 (0.866x) (^ 0) +Testing all collisions (high 32-bit) - Expected 3508.8, actual 3434 (0.979x) (^ 0) +Testing all collisions (low 32-bit) - Expected 3508.8, actual 3533 (1.007x) (^ 1) +Testing all collisions (high 21..40 bits) - Worst is 27 bits: 111001/110813 (1.002x) (^ 0) +Testing all collisions (low 21..40 bits) - Worst is 28 bits: 55984/55784 (1.004x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 11 bits at bit 84: 0.625x (^ 0) + +Keyset 'SeedBlockLen' - 21-byte keys with block at offsets [0..16, by 4s] - 5491200 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 37-bit) - Expected 109.7, actual 123 (1.121x) (^ 3) +Testing all collisions (low 37-bit) - Expected 109.7, actual 101 (0.921x) (^ 0) +Testing all collisions (high 32-bit) - Expected 3508.8, actual 3475 (0.990x) (^ 0) +Testing all collisions (low 32-bit) - Expected 3508.8, actual 3467 (0.988x) (^ 0) +Testing all collisions (high 21..40 bits) - Worst is 36 bits: 258/219 (1.176x) (^ 3) +Testing all collisions (low 21..40 bits) - Worst is 39 bits: 31/27 (1.130x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 17 bits at bit 125: 0.534x (^ 0) + +Keyset 'SeedBlockLen' - 22-byte keys with block at offsets [0..16, by 4s] - 5491200 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 37-bit) - Expected 109.7, actual 112 (1.021x) (^ 1) +Testing all collisions (low 37-bit) - Expected 109.7, actual 107 (0.975x) (^ 0) +Testing all collisions (high 32-bit) - Expected 3508.8, actual 3489 (0.994x) (^ 0) +Testing all collisions (low 32-bit) - Expected 3508.8, actual 3523 (1.004x) (^ 1) +Testing all collisions (high 21..40 bits) - Worst is 28 bits: 55998/55784 (1.004x) (^ 0) +Testing all collisions (low 21..40 bits) - Worst is 24 bits: 809525/808120 (1.002x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 13 bits at bit 92: 0.551x (^ 0) + +Keyset 'SeedBlockLen' - 23-byte keys with block at offsets [0..16, by 4s] - 5491200 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 37-bit) - Expected 109.7, actual 103 (0.939x) (^ 0) +Testing all collisions (low 37-bit) - Expected 109.7, actual 96 (0.875x) (^ 0) +Testing all collisions (high 32-bit) - Expected 3508.8, actual 3410 (0.972x) (^ 0) +Testing all collisions (low 32-bit) - Expected 3508.8, actual 3595 (1.025x) (^ 3) +Testing all collisions (high 21..40 bits) - Worst is 21 bits: 3546936/3546970 (1.000x) (^ 0) +Testing all collisions (low 21..40 bits) - Worst is 29 bits: 28295/27987 (1.011x) (^ 1) +Testing distribution (any 8..20 bits) - Worst bias is 20 bits at bit 5: 0.526x (^ 0) + +Keyset 'SeedBlockLen' - 24-byte keys with block at offsets [0..20, by 4s] - 6589440 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 37-bit) - Expected 158.0, actual 147 (0.931x) (^ 0) +Testing all collisions (low 37-bit) - Expected 158.0, actual 154 (0.975x) (^ 0) +Testing all collisions (high 32-bit) - Expected 5052.3, actual 5094 (1.008x) (^ 1) +Testing all collisions (low 32-bit) - Expected 5052.3, actual 5058 (1.001x) (^ 1) +Testing all collisions (high 21..40 bits) - Worst is 31 bits: 10272/10099 (1.017x) (^ 0) +Testing all collisions (low 21..40 bits) - Worst is 33 bits: 2566/2527 (1.016x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 12 bits at bit 44: 0.605x (^ 0) + +Keyset 'SeedBlockLen' - 25-byte keys with block at offsets [0..20, by 4s] - 6589440 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 37-bit) - Expected 158.0, actual 154 (0.975x) (^ 0) +Testing all collisions (low 37-bit) - Expected 158.0, actual 148 (0.937x) (^ 0) +Testing all collisions (high 32-bit) - Expected 5052.3, actual 5086 (1.007x) (^ 1) +Testing all collisions (low 32-bit) - Expected 5052.3, actual 5032 (0.996x) (^ 0) +Testing all collisions (high 21..40 bits) - Worst is 27 bits: 160513/159140 (1.009x) (^ 7) +Testing all collisions (low 21..40 bits) - Worst is 26 bits: 313682/313176 (1.002x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 12 bits at bit 127: 0.702x (^ 1) + +Keyset 'SeedBlockLen' - 26-byte keys with block at offsets [0..20, by 4s] - 6589440 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 37-bit) - Expected 158.0, actual 162 (1.026x) (^ 1) +Testing all collisions (low 37-bit) - Expected 158.0, actual 172 (1.089x) (^ 2) +Testing all collisions (high 32-bit) - Expected 5052.3, actual 4978 (0.985x) (^ 0) +Testing all collisions (low 32-bit) - Expected 5052.3, actual 5087 (1.007x) (^ 1) +Testing all collisions (high 21..40 bits) - Worst is 25 bits: 607322/606665 (1.001x) (^ 0) +Testing all collisions (low 21..40 bits) - Worst is 37 bits: 172/158 (1.089x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 14 bits at bit 97: 0.594x (^ 0) + +Keyset 'SeedBlockLen' - 27-byte keys with block at offsets [0..20, by 4s] - 6589440 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 37-bit) - Expected 158.0, actual 158 (1.000x) (^ 1) +Testing all collisions (low 37-bit) - Expected 158.0, actual 166 (1.051x) (^ 1) +Testing all collisions (high 32-bit) - Expected 5052.3, actual 5033 (0.996x) (^ 0) +Testing all collisions (low 32-bit) - Expected 5052.3, actual 4967 (0.983x) (^ 0) +Testing all collisions (high 21..40 bits) - Worst is 36 bits: 321/316 (1.016x) (^ 0) +Testing all collisions (low 21..40 bits) - Worst is 26 bits: 313776/313176 (1.002x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 10 bits at bit 118: 0.675x (^ 0) + +Keyset 'SeedBlockLen' - 28-byte keys with block at offsets [0..24, by 4s] - 7687680 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 107.5, actual 103 (0.958x) (^ 0) +Testing all collisions (low 38-bit) - Expected 107.5, actual 99 (0.921x) (^ 0) +Testing all collisions (high 32-bit) - Expected 6876.1, actual 6908 (1.005x) (^ 1) +Testing all collisions (low 32-bit) - Expected 6876.1, actual 6749 (0.982x) (^ 0) +Testing all collisions (high 21..41 bits) - Worst is 33 bits: 3533/3439 (1.027x) (^ 0) +Testing all collisions (low 21..41 bits) - Worst is 24 bits: 1521281/1520500 (1.001x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 20 bits at bit 71: 0.482x (^ 0) + +Keyset 'SeedBlockLen' - 29-byte keys with block at offsets [0..24, by 4s] - 7687680 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 107.5, actual 129 (1.200x) (^ 5) +Testing all collisions (low 38-bit) - Expected 107.5, actual 97 (0.902x) (^ 0) +Testing all collisions (high 32-bit) - Expected 6876.1, actual 6833 (0.994x) (^ 0) +Testing all collisions (low 32-bit) - Expected 6876.1, actual 6821 (0.992x) (^ 0) +Testing all collisions (high 21..41 bits) - Worst is 38 bits: 129/108 (1.200x) (^ 1) +Testing all collisions (low 21..41 bits) - Worst is 26 bits: 424278/423989 (1.001x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 19 bits at bit 88: 0.673x (^ 5) + +Keyset 'SeedBlockLen' - 30-byte keys with block at offsets [0..24, by 4s] - 7687680 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 107.5, actual 113 (1.051x) (^ 1) +Testing all collisions (low 38-bit) - Expected 107.5, actual 87 (0.809x) (^ 0) +Testing all collisions (high 32-bit) - Expected 6876.1, actual 7026 (1.022x) (^ 4) +Testing all collisions (low 32-bit) - Expected 6876.1, actual 6865 (0.998x) (^ 0) +Testing all collisions (high 21..41 bits) - Worst is 29 bits: 55246/54780 (1.009x) (^ 1) +Testing all collisions (low 21..41 bits) - Worst is 30 bits: 27522/27455 (1.002x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 8 bits at bit 44: 0.836x (^ 1) + +Keyset 'SeedBlockLen' - 31-byte keys with block at offsets [0..24, by 4s] - 7687680 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 107.5, actual 94 (0.874x) (^ 0) +Testing all collisions (low 38-bit) - Expected 107.5, actual 106 (0.986x) (^ 0) +Testing all collisions (high 32-bit) - Expected 6876.1, actual 6969 (1.014x) (^ 2) +Testing all collisions (low 32-bit) - Expected 6876.1, actual 6958 (1.012x) (^ 2) +Testing all collisions (high 21..41 bits) - Worst is 32 bits: 6969/6876 (1.014x) (^ 0) +Testing all collisions (low 21..41 bits) - Worst is 33 bits: 3498/3439 (1.017x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 18 bits at bit 32: 0.568x (^ 1) + +Keyset 'SeedBlockLen' - 32-byte keys with block at offsets [0..28, by 4s] - 8785920 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 140.4, actual 144 (1.026x) (^ 1) +Testing all collisions (low 38-bit) - Expected 140.4, actual 126 (0.897x) (^ 0) +Testing all collisions (high 32-bit) - Expected 8980.3, actual 8938 (0.995x) (^ 0) +Testing all collisions (low 32-bit) - Expected 8980.3, actual 8989 (1.001x) (^ 1) +Testing all collisions (high 21..41 bits) - Worst is 40 bits: 49/35 (1.396x) (^ 1) +Testing all collisions (low 21..41 bits) - Worst is 35 bits: 1154/1123 (1.027x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 18 bits at bit 34: 0.539x (^ 0) + +Keyset 'SeedBlockLen' - 33-byte keys with block at offsets [0..28, by 4s] - 8785920 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 140.4, actual 147 (1.047x) (^ 1) +Testing all collisions (low 38-bit) - Expected 140.4, actual 138 (0.983x) (^ 0) +Testing all collisions (high 32-bit) - Expected 8980.3, actual 8891 (0.990x) (^ 0) +Testing all collisions (low 32-bit) - Expected 8980.3, actual 9069 (1.010x) (^ 2) +Testing all collisions (high 21..41 bits) - Worst is 41 bits: 27/18 (1.538x) (^ 1) +Testing all collisions (low 21..41 bits) - Worst is 31 bits: 18207/17948 (1.014x) (^ 1) +Testing distribution (any 8..20 bits) - Worst bias is 9 bits at bit 51: 0.683x (^ 0) + +Keyset 'SeedBlockLen' - 34-byte keys with block at offsets [0..28, by 4s] - 8785920 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 140.4, actual 118 (0.840x) (^ 0) +Testing all collisions (low 38-bit) - Expected 140.4, actual 151 (1.075x) (^ 2) +Testing all collisions (high 32-bit) - Expected 8980.3, actual 8883 (0.989x) (^ 0) +Testing all collisions (low 32-bit) - Expected 8980.3, actual 9077 (1.011x) (^ 2) +Testing all collisions (high 21..41 bits) - Worst is 25 bits: 1056448/1056104 (1.000x) (^ 0) +Testing all collisions (low 21..41 bits) - Worst is 37 bits: 315/281 (1.122x) (^ 1) +Testing distribution (any 8..20 bits) - Worst bias is 14 bits at bit 66: 0.683x (^ 2) + +Keyset 'SeedBlockLen' - 35-byte keys with block at offsets [0..28, by 4s] - 8785920 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 140.4, actual 134 (0.954x) (^ 0) +Testing all collisions (low 38-bit) - Expected 140.4, actual 164 (1.168x) (^ 5) +Testing all collisions (high 32-bit) - Expected 8980.3, actual 9072 (1.010x) (^ 2) +Testing all collisions (low 32-bit) - Expected 8980.3, actual 8930 (0.994x) (^ 0) +Testing all collisions (high 21..41 bits) - Worst is 33 bits: 4577/4492 (1.019x) (^ 0) +Testing all collisions (low 21..41 bits) - Worst is 38 bits: 164/140 (1.168x) (^ 1) +Testing distribution (any 8..20 bits) - Worst bias is 8 bits at bit 44: 0.831x (^ 0) + +Keyset 'SeedBlockLen' - 36-byte keys with block at offsets [0..32, by 4s] - 9884160 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 177.7, actual 186 (1.047x) (^ 1) +Testing all collisions (low 38-bit) - Expected 177.7, actual 173 (0.974x) (^ 0) +Testing all collisions (high 32-bit) - Expected 11364.7, actual 11314 (0.996x) (^ 0) +Testing all collisions (low 32-bit) - Expected 11364.7, actual 11463 (1.009x) (^ 2) +Testing all collisions (high 21..42 bits) - Worst is 30 bits: 45572/45354 (1.005x) (^ 0) +Testing all collisions (low 21..42 bits) - Worst is 34 bits: 2921/2843 (1.028x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 9 bits at bit 126: 0.762x (^ 0) + +Keyset 'SeedBlockLen' - 37-byte keys with block at offsets [0..32, by 4s] - 9884160 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 177.7, actual 173 (0.974x) (^ 0) +Testing all collisions (low 38-bit) - Expected 177.7, actual 193 (1.086x) (^ 2) +Testing all collisions (high 32-bit) - Expected 11364.7, actual 11358 (0.999x) (^ 0) +Testing all collisions (low 32-bit) - Expected 11364.7, actual 11543 (1.016x) (^ 4) +Testing all collisions (high 21..42 bits) - Worst is 35 bits: 1481/1422 (1.042x) (^ 0) +Testing all collisions (low 21..42 bits) - Worst is 32 bits: 11543/11365 (1.016x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 16 bits at bit 80: 0.514x (^ 0) + +Keyset 'SeedBlockLen' - 38-byte keys with block at offsets [0..32, by 4s] - 9884160 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 177.7, actual 192 (1.080x) (^ 2) +Testing all collisions (low 38-bit) - Expected 177.7, actual 184 (1.035x) (^ 1) +Testing all collisions (high 32-bit) - Expected 11364.7, actual 11575 (1.019x) (^ 5) +Testing all collisions (low 32-bit) - Expected 11364.7, actual 11448 (1.007x) (^ 2) +Testing all collisions (high 21..42 bits) - Worst is 40 bits: 72/44 (1.621x) (^ 8) +Testing all collisions (low 21..42 bits) - Worst is 24 bits: 2417688/2414997 (1.001x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 12 bits at bit 45: 0.590x (^ 0) + +Keyset 'SeedBlockLen' - 39-byte keys with block at offsets [0..32, by 4s] - 9884160 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 38-bit) - Expected 177.7, actual 184 (1.035x) (^ 1) +Testing all collisions (low 38-bit) - Expected 177.7, actual 173 (0.974x) (^ 0) +Testing all collisions (high 32-bit) - Expected 11364.7, actual 11333 (0.997x) (^ 0) +Testing all collisions (low 32-bit) - Expected 11364.7, actual 11283 (0.993x) (^ 0) +Testing all collisions (high 21..42 bits) - Worst is 37 bits: 389/355 (1.095x) (^ 0) +Testing all collisions (low 21..42 bits) - Worst is 41 bits: 32/22 (1.441x) (^ 0) +Testing distribution (any 8..20 bits) - Worst bias is 8 bits at bit 23: 0.847x (^ 1) + + +[[[ Seed BlockOffset Tests ]]] + +Seeds have up to 2 bits set, 4-byte blocks have up to 2 bits set + +Keyset 'SeedBlockOffset' - [4..31]-byte keys with block at offset 0 - 30750720 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 42-bit) - Expected 107.5, actual 83 (0.772x) (^ 0) +Testing all collisions (low 42-bit) - Expected 107.5, actual 101 (0.940x) (^ 0) +Testing all collisions (high 32-bit) - Expected 109820.9, actual 109567 (0.998x) (^ 0) +Testing all collisions (low 32-bit) - Expected 109820.9, actual 109719 (0.999x) (^ 0) +Testing all collisions (high 23..45 bits) - Worst is 36 bits: 6997/6879 (1.017x) (^ 0) +Testing all collisions (low 23..45 bits) - Worst is 29 bits: 864709/864089 (1.001x) (^ 0) +Testing distribution (any 8..22 bits) - Worst bias is 22 bits at bit 107: 0.549x (^ 2) + +Keyset 'SeedBlockOffset' - [5..31]-byte keys with block at offset 1 - 29652480 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 41-bit) - Expected 199.9, actual 189 (0.945x) (^ 0) +Testing all collisions (low 41-bit) - Expected 199.9, actual 192 (0.960x) (^ 0) +Testing all collisions (high 32-bit) - Expected 102125.3, actual 101971 (0.998x) (^ 0) +Testing all collisions (low 32-bit) - Expected 102125.3, actual 101722 (0.996x) (^ 0) +Testing all collisions (high 23..45 bits) - Worst is 39 bits: 816/800 (1.020x) (^ 0) +Testing all collisions (low 23..45 bits) - Worst is 36 bits: 6519/6397 (1.019x) (^ 0) +Testing distribution (any 8..22 bits) - Worst bias is 15 bits at bit 93: 0.643x (^ 1) + +Keyset 'SeedBlockOffset' - [6..31]-byte keys with block at offset 2 - 28554240 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 41-bit) - Expected 185.4, actual 194 (1.046x) (^ 1) +Testing all collisions (low 41-bit) - Expected 185.4, actual 194 (1.046x) (^ 1) +Testing all collisions (high 32-bit) - Expected 94708.6, actual 94050 (0.993x) (^ 0) +Testing all collisions (low 32-bit) - Expected 94708.6, actual 94449 (0.997x) (^ 0) +Testing all collisions (high 23..45 bits) - Worst is 24 bits: 14839017/14835927 (1.000x) (^ 0) +Testing all collisions (low 23..45 bits) - Worst is 29 bits: 747501/746064 (1.002x) (^ 0) +Testing distribution (any 8..22 bits) - Worst bias is 17 bits at bit 82: 0.447x (^ 0) + +Keyset 'SeedBlockOffset' - [7..31]-byte keys with block at offset 3 - 27456000 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 41-bit) - Expected 171.4, actual 181 (1.056x) (^ 2) +Testing all collisions (low 41-bit) - Expected 171.4, actual 177 (1.033x) (^ 1) +Testing all collisions (high 32-bit) - Expected 87570.9, actual 87331 (0.997x) (^ 0) +Testing all collisions (low 32-bit) - Expected 87570.9, actual 87202 (0.996x) (^ 0) +Testing all collisions (high 23..45 bits) - Worst is 40 bits: 361/343 (1.053x) (^ 0) +Testing all collisions (low 23..45 bits) - Worst is 43 bits: 46/43 (1.074x) (^ 0) +Testing distribution (any 8..22 bits) - Worst bias is 12 bits at bit 56: 0.719x (^ 1) + +Keyset 'SeedBlockOffset' - [8..31]-byte keys with block at offset 4 - 26357760 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 41-bit) - Expected 158.0, actual 169 (1.070x) (^ 2) +Testing all collisions (low 41-bit) - Expected 158.0, actual 156 (0.988x) (^ 0) +Testing all collisions (high 32-bit) - Expected 80712.2, actual 80435 (0.997x) (^ 0) +Testing all collisions (low 32-bit) - Expected 80712.2, actual 80921 (1.003x) (^ 2) +Testing all collisions (high 23..44 bits) - Worst is 40 bits: 344/316 (1.089x) (^ 0) +Testing all collisions (low 23..44 bits) - Worst is 30 bits: 321709/320879 (1.003x) (^ 0) +Testing distribution (any 8..22 bits) - Worst bias is 19 bits at bit 62: 0.534x (^ 0) + +Keyset 'SeedBlockOffset' - [9..31]-byte keys with block at offset 5 - 25259520 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 41-bit) - Expected 145.1, actual 153 (1.055x) (^ 1) +Testing all collisions (low 41-bit) - Expected 145.1, actual 158 (1.089x) (^ 2) +Testing all collisions (high 32-bit) - Expected 74132.6, actual 74109 (1.000x) (^ 0) +Testing all collisions (low 32-bit) - Expected 74132.6, actual 74332 (1.003x) (^ 2) +Testing all collisions (high 23..44 bits) - Worst is 30 bits: 295319/294796 (1.002x) (^ 0) +Testing all collisions (low 23..44 bits) - Worst is 44 bits: 28/18 (1.544x) (^ 1) +Testing distribution (any 8..22 bits) - Worst bias is 22 bits at bit 62: 0.514x (^ 1) + +Keyset 'SeedBlockOffset' - [10..31]-byte keys with block at offset 6 - 24161280 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 41-bit) - Expected 132.7, actual 128 (0.964x) (^ 0) +Testing all collisions (low 41-bit) - Expected 132.7, actual 132 (0.994x) (^ 0) +Testing all collisions (high 32-bit) - Expected 67832.2, actual 67848 (1.000x) (^ 1) +Testing all collisions (low 32-bit) - Expected 67832.2, actual 67977 (1.002x) (^ 1) +Testing all collisions (high 23..44 bits) - Worst is 32 bits: 67848/67832 (1.000x) (^ 0) +Testing all collisions (low 23..44 bits) - Worst is 39 bits: 580/531 (1.092x) (^ 1) +Testing distribution (any 8..22 bits) - Worst bias is 8 bits at bit 102: 0.728x (^ 0) + +Keyset 'SeedBlockOffset' - [11..31]-byte keys with block at offset 7 - 23063040 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 41-bit) - Expected 120.9, actual 126 (1.042x) (^ 1) +Testing all collisions (low 41-bit) - Expected 120.9, actual 126 (1.042x) (^ 1) +Testing all collisions (high 32-bit) - Expected 61811.1, actual 61884 (1.001x) (^ 1) +Testing all collisions (low 32-bit) - Expected 61811.1, actual 61648 (0.997x) (^ 0) +Testing all collisions (high 23..44 bits) - Worst is 29 bits: 488940/488356 (1.001x) (^ 0) +Testing all collisions (low 23..44 bits) - Worst is 38 bits: 1058/968 (1.094x) (^ 4) +Testing distribution (any 8..22 bits) - Worst bias is 16 bits at bit 84: 0.619x (^ 1) + +Keyset 'SeedBlockOffset' - [12..31]-byte keys with block at offset 8 - 21964800 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 41-bit) - Expected 109.7, actual 115 (1.048x) (^ 1) +Testing all collisions (low 41-bit) - Expected 109.7, actual 104 (0.948x) (^ 0) +Testing all collisions (high 32-bit) - Expected 56069.2, actual 56104 (1.001x) (^ 1) +Testing all collisions (low 32-bit) - Expected 56069.2, actual 56360 (1.005x) (^ 3) +Testing all collisions (high 23..44 bits) - Worst is 28 bits: 876677/874621 (1.002x) (^ 1) +Testing all collisions (low 23..44 bits) - Worst is 36 bits: 3610/3510 (1.029x) (^ 0) +Testing distribution (any 8..22 bits) - Worst bias is 17 bits at bit 60: 0.564x (^ 0) + +Keyset 'SeedBlockOffset' - [13..31]-byte keys with block at offset 9 - 20866560 hashes +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 40-bit) - Expected 198.0, actual 186 (0.939x) (^ 0) +Testing all collisions (low 40-bit) - Expected 198.0, actual 214 (1.081x) (^ 2) +Testing all collisions (high 32-bit) - Expected 50606.8, actual 50714 (1.002x) (^ 1) +Testing all collisions (low 32-bit) - Expected 50606.8, actual 50689 (1.002x) (^ 1) +Testing all collisions (high 22..44 bits) - Worst is 28 bits: 792132/790408 (1.002x) (^ 1) +Testing all collisions (low 22..44 bits) - Worst is 40 bits: 214/198 (1.081x) (^ 0) +Testing distribution (any 8..21 bits) - Worst bias is 21 bits at bit 86: 0.474x (^ 0) + + +[[[ Keyset 'Seed' Tests ]]] + +Keyset 'Seed' - 2-byte keys - 4194304 seeds +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 119 (0.930x) (^ 0) +Testing all collisions (low 36-bit) - Expected 128.0, actual 132 (1.031x) (^ 1) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2010 (0.982x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 2046 (0.999x) (^ 0) +Testing all collisions (high 20..39 bits) - Worst is 27 bits: 65253/64859 (1.006x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 25 bits: 252491/251554 (1.004x) (^ 1) +Testing distribution (any 8..19 bits) - Worst bias is 13 bits at bit 109: 0.584x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 131 (1.023x) (^ 1) +Testing all collisions (low 36-bit) - Expected 128.0, actual 154 (1.203x) (^ 6) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2015 (0.984x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 2154 (1.052x) (^ 6) +Testing all collisions (high 20..39 bits) - Worst is 39 bits: 22/16 (1.375x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 31 bits: 4338/4093 (1.060x) (^ 9) +Testing distribution (any 8..19 bits) - Worst bias is 16 bits at bit 111: 0.658x (^ 2) +---Analyzing additional differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 124 (0.969x) (^ 0) +Testing all collisions (low 36-bit) - Expected 128.0, actual 130 (1.016x) (^ 1) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2060 (1.006x) (^ 1) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 2063 (1.008x) (^ 1) +Testing all collisions (high 20..39 bits) - Worst is 24 bits: 484581/483197 (1.003x) (^ 1) +Testing all collisions (low 20..39 bits) - Worst is 34 bits: 548/512 (1.070x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 9 bits at bit 107: 0.875x (^ 2) + +Keyset 'Seed' - 3-byte keys - 4194304 seeds +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 135 (1.055x) (^ 1) +Testing all collisions (low 36-bit) - Expected 128.0, actual 147 (1.148x) (^ 4) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2073 (1.013x) (^ 1) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 2029 (0.991x) (^ 0) +Testing all collisions (high 20..39 bits) - Worst is 33 bits: 1064/1024 (1.039x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 25 bits: 252710/251554 (1.005x) (^ 2) +Testing distribution (any 8..19 bits) - Worst bias is 14 bits at bit 23: 0.694x (^ 2) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 128 (1.000x) (^ 1) +Testing all collisions (low 36-bit) - Expected 128.0, actual 134 (1.047x) (^ 1) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2029 (0.991x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 2015 (0.984x) (^ 0) +Testing all collisions (high 20..39 bits) - Worst is 38 bits: 40/32 (1.250x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 35 bits: 270/256 (1.055x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 8 bits at bit 63: 0.824x (^ 0) +---Analyzing additional differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 118 (0.922x) (^ 0) +Testing all collisions (low 36-bit) - Expected 128.0, actual 135 (1.055x) (^ 1) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2083 (1.017x) (^ 2) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 2048 (1.000x) (^ 1) +Testing all collisions (high 20..39 bits) - Worst is 38 bits: 40/32 (1.250x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 35 bits: 269/256 (1.051x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 14 bits at bit 118: 0.516x (^ 0) + +Keyset 'Seed' - 6-byte keys - 4194304 seeds +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 129 (1.008x) (^ 1) +Testing all collisions (low 36-bit) - Expected 128.0, actual 111 (0.867x) (^ 0) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2039 (0.996x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 1986 (0.970x) (^ 0) +Testing all collisions (high 20..39 bits) - Worst is 28 bits: 32918/32598 (1.010x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 26 bits: 129243/128383 (1.007x) (^ 2) +Testing distribution (any 8..19 bits) - Worst bias is 9 bits at bit 21: 0.734x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 119 (0.930x) (^ 0) +Testing all collisions (low 36-bit) - Expected 128.0, actual 139 (1.086x) (^ 2) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2029 (0.991x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 2080 (1.016x) (^ 2) +Testing all collisions (high 20..39 bits) - Worst is 33 bits: 1043/1024 (1.019x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 36 bits: 139/128 (1.086x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 14 bits at bit 10: 0.643x (^ 1) +---Analyzing additional differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 112 (0.875x) (^ 0) +Testing all collisions (low 36-bit) - Expected 128.0, actual 134 (1.047x) (^ 1) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2063 (1.008x) (^ 1) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 2112 (1.032x) (^ 3) +Testing all collisions (high 20..39 bits) - Worst is 27 bits: 65504/64859 (1.010x) (^ 3) +Testing all collisions (low 20..39 bits) - Worst is 32 bits: 2112/2047 (1.032x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 8 bits at bit 77: 0.760x (^ 0) + +Keyset 'Seed' - 15-byte keys - 4194304 seeds +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 113 (0.883x) (^ 0) +Testing all collisions (low 36-bit) - Expected 128.0, actual 129 (1.008x) (^ 1) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2005 (0.979x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 2065 (1.009x) (^ 1) +Testing all collisions (high 20..39 bits) - Worst is 24 bits: 485012/483197 (1.004x) (^ 3) +Testing all collisions (low 20..39 bits) - Worst is 25 bits: 252515/251554 (1.004x) (^ 1) +Testing distribution (any 8..19 bits) - Worst bias is 12 bits at bit 119: 0.582x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 135 (1.055x) (^ 1) +Testing all collisions (low 36-bit) - Expected 128.0, actual 116 (0.906x) (^ 0) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2088 (1.020x) (^ 2) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 2067 (1.010x) (^ 1) +Testing all collisions (high 20..39 bits) - Worst is 38 bits: 49/32 (1.531x) (^ 3) +Testing all collisions (low 20..39 bits) - Worst is 32 bits: 2067/2047 (1.010x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 10 bits at bit 77: 0.782x (^ 1) +---Analyzing additional differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 150 (1.172x) (^ 4) +Testing all collisions (low 36-bit) - Expected 128.0, actual 130 (1.016x) (^ 1) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2003 (0.978x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 2047 (1.000x) (^ 0) +Testing all collisions (high 20..39 bits) - Worst is 27 bits: 65341/64859 (1.007x) (^ 1) +Testing all collisions (low 20..39 bits) - Worst is 34 bits: 543/512 (1.061x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 11 bits at bit 111: 0.602x (^ 0) + +Keyset 'Seed' - 18-byte keys - 4194304 seeds +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 132 (1.031x) (^ 1) +Testing all collisions (low 36-bit) - Expected 128.0, actual 129 (1.008x) (^ 1) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2061 (1.007x) (^ 1) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 1949 (0.952x) (^ 0) +Testing all collisions (high 20..39 bits) - Worst is 27 bits: 65216/64859 (1.006x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 27 bits: 65201/64859 (1.005x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 18 bits at bit 26: 0.485x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 135 (1.055x) (^ 1) +Testing all collisions (low 36-bit) - Expected 128.0, actual 136 (1.063x) (^ 1) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2078 (1.015x) (^ 1) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 2081 (1.016x) (^ 2) +Testing all collisions (high 20..39 bits) - Worst is 39 bits: 20/16 (1.250x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 37 bits: 84/64 (1.313x) (^ 2) +Testing distribution (any 8..19 bits) - Worst bias is 12 bits at bit 5: 0.640x (^ 0) +---Analyzing additional differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 117 (0.914x) (^ 0) +Testing all collisions (low 36-bit) - Expected 128.0, actual 135 (1.055x) (^ 1) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2031 (0.992x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 2043 (0.998x) (^ 0) +Testing all collisions (high 20..39 bits) - Worst is 26 bits: 128839/128383 (1.004x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 39 bits: 22/16 (1.375x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 8 bits at bit 69: 0.775x (^ 0) + +Keyset 'Seed' - 31-byte keys - 4194304 seeds +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 119 (0.930x) (^ 0) +Testing all collisions (low 36-bit) - Expected 128.0, actual 118 (0.922x) (^ 0) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2025 (0.989x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 2056 (1.004x) (^ 1) +Testing all collisions (high 20..39 bits) - Worst is 33 bits: 1056/1024 (1.031x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 24 bits: 484439/483197 (1.003x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 16 bits at bit 30: 0.718x (^ 4) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 144 (1.125x) (^ 3) +Testing all collisions (low 36-bit) - Expected 128.0, actual 149 (1.164x) (^ 4) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2071 (1.012x) (^ 1) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 2066 (1.009x) (^ 1) +Testing all collisions (high 20..39 bits) - Worst is 34 bits: 548/512 (1.070x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 38 bits: 47/32 (1.469x) (^ 2) +Testing distribution (any 8..19 bits) - Worst bias is 14 bits at bit 55: 0.513x (^ 0) +---Analyzing additional differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 140 (1.094x) (^ 2) +Testing all collisions (low 36-bit) - Expected 128.0, actual 111 (0.867x) (^ 0) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2103 (1.027x) (^ 3) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 2093 (1.022x) (^ 2) +Testing all collisions (high 20..39 bits) - Worst is 32 bits: 2103/2047 (1.027x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 32 bits: 2093/2047 (1.022x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 14 bits at bit 8: 0.590x (^ 0) + +Keyset 'Seed' - 52-byte keys - 4194304 seeds +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 126 (0.984x) (^ 0) +Testing all collisions (low 36-bit) - Expected 128.0, actual 109 (0.852x) (^ 0) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2043 (0.998x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 1948 (0.951x) (^ 0) +Testing all collisions (high 20..39 bits) - Worst is 23 bits: 894376/893644 (1.001x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 26 bits: 128716/128383 (1.003x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 17 bits at bit 55: 0.611x (^ 2) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 105 (0.820x) (^ 0) +Testing all collisions (low 36-bit) - Expected 128.0, actual 135 (1.055x) (^ 1) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2011 (0.982x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 2136 (1.043x) (^ 5) +Testing all collisions (high 20..39 bits) - Worst is 25 bits: 252024/251554 (1.002x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 31 bits: 4253/4093 (1.039x) (^ 2) +Testing distribution (any 8..19 bits) - Worst bias is 18 bits at bit 103: 0.610x (^ 2) +---Analyzing additional differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 120 (0.938x) (^ 0) +Testing all collisions (low 36-bit) - Expected 128.0, actual 121 (0.945x) (^ 0) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2038 (0.995x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 2018 (0.986x) (^ 0) +Testing all collisions (high 20..39 bits) - Worst is 27 bits: 65381/64859 (1.008x) (^ 1) +Testing all collisions (low 20..39 bits) - Worst is 20 bits: 3164956/3164933 (1.000x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 11 bits at bit 121: 0.820x (^ 3) + +Keyset 'Seed' - 80-byte keys - 4194304 seeds +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 147 (1.148x) (^ 4) +Testing all collisions (low 36-bit) - Expected 128.0, actual 126 (0.984x) (^ 0) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2045 (0.999x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 2039 (0.996x) (^ 0) +Testing all collisions (high 20..39 bits) - Worst is 24 bits: 484631/483197 (1.003x) (^ 1) +Testing all collisions (low 20..39 bits) - Worst is 24 bits: 484571/483197 (1.003x) (^ 1) +Testing distribution (any 8..19 bits) - Worst bias is 18 bits at bit 76: 0.556x (^ 1) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 133 (1.039x) (^ 1) +Testing all collisions (low 36-bit) - Expected 128.0, actual 141 (1.102x) (^ 2) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2116 (1.034x) (^ 3) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 1973 (0.964x) (^ 0) +Testing all collisions (high 20..39 bits) - Worst is 32 bits: 2116/2047 (1.034x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 38 bits: 42/32 (1.313x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 19 bits at bit 127: 0.580x (^ 2) +---Analyzing additional differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 118 (0.922x) (^ 0) +Testing all collisions (low 36-bit) - Expected 128.0, actual 132 (1.031x) (^ 1) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2058 (1.005x) (^ 1) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 2007 (0.980x) (^ 0) +Testing all collisions (high 20..39 bits) - Worst is 27 bits: 65108/64859 (1.004x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 29 bits: 16535/16341 (1.012x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 8 bits at bit 87: 0.796x (^ 0) + +Keyset 'Seed' - 200-byte keys - 4194304 seeds +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 134 (1.047x) (^ 1) +Testing all collisions (low 36-bit) - Expected 128.0, actual 106 (0.828x) (^ 0) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2054 (1.003x) (^ 1) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 2038 (0.995x) (^ 0) +Testing all collisions (high 20..39 bits) - Worst is 37 bits: 70/64 (1.094x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 23 bits: 894710/893644 (1.001x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 9 bits at bit 117: 0.764x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 107 (0.836x) (^ 0) +Testing all collisions (low 36-bit) - Expected 128.0, actual 121 (0.945x) (^ 0) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2061 (1.007x) (^ 1) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 2095 (1.023x) (^ 2) +Testing all collisions (high 20..39 bits) - Worst is 26 bits: 128533/128383 (1.001x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 32 bits: 2095/2047 (1.023x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 11 bits at bit 53: 0.664x (^ 0) +---Analyzing additional differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 106 (0.828x) (^ 0) +Testing all collisions (low 36-bit) - Expected 128.0, actual 123 (0.961x) (^ 0) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2023 (0.988x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 2087 (1.019x) (^ 2) +Testing all collisions (high 20..39 bits) - Worst is 26 bits: 128720/128383 (1.003x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 32 bits: 2087/2047 (1.019x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 8 bits at bit 107: 0.738x (^ 0) + +Keyset 'Seed' - 1025-byte keys - 4194304 seeds +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 126 (0.984x) (^ 0) +Testing all collisions (low 36-bit) - Expected 128.0, actual 101 (0.789x) (^ 0) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2041 (0.997x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 1977 (0.966x) (^ 0) +Testing all collisions (high 20..39 bits) - Worst is 21 bits: 2381294/2380971 (1.000x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 24 bits: 483417/483197 (1.000x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 8 bits at bit 6: 0.874x (^ 1) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 139 (1.086x) (^ 2) +Testing all collisions (low 36-bit) - Expected 128.0, actual 116 (0.906x) (^ 0) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2036 (0.994x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 2016 (0.985x) (^ 0) +Testing all collisions (high 20..39 bits) - Worst is 38 bits: 42/32 (1.313x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 39 bits: 19/16 (1.188x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 18 bits at bit 55: 0.582x (^ 1) +---Analyzing additional differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 36-bit) - Expected 128.0, actual 101 (0.789x) (^ 0) +Testing all collisions (low 36-bit) - Expected 128.0, actual 119 (0.930x) (^ 0) +Testing all collisions (high 32-bit) - Expected 2047.3, actual 2021 (0.987x) (^ 0) +Testing all collisions (low 32-bit) - Expected 2047.3, actual 1954 (0.954x) (^ 0) +Testing all collisions (high 20..39 bits) - Worst is 25 bits: 251950/251554 (1.002x) (^ 0) +Testing all collisions (low 20..39 bits) - Worst is 24 bits: 484192/483197 (1.002x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 13 bits at bit 23: 0.473x (^ 0) + + +[[[ Seed Avalanche Tests ]]] + +Testing 3-byte keys, 300000 reps..................max is 0.673% at bit 49 -> out 125 (^ 0) +Testing 4-byte keys, 300000 reps..................max is 0.737% at bit 27 -> out 27 (^ 1) +Testing 6-byte keys, 300000 reps..................max is 0.733% at bit 10 -> out 94 (^ 1) +Testing 8-byte keys, 300000 reps..................max is 0.709% at bit 53 -> out 89 (^ 0) +Testing 12-byte keys, 300000 reps..................max is 0.677% at bit 33 -> out 26 (^ 0) +Testing 16-byte keys, 300000 reps..................max is 0.745% at bit 20 -> out 63 (^ 1) +Testing 20-byte keys, 300000 reps..................max is 0.716% at bit 6 -> out 33 (^ 0) +Testing 24-byte keys, 300000 reps..................max is 0.759% at bit 28 -> out 103 (^ 2) +Testing 28-byte keys, 300000 reps..................max is 0.741% at bit 6 -> out 65 (^ 1) +Testing 32-byte keys, 300000 reps..................max is 0.675% at bit 55 -> out 36 (^ 0) +Testing 64-byte keys, 300000 reps..................max is 0.777% at bit 15 -> out 1 (^ 2) +Testing 128-byte keys, 300000 reps..................max is 0.670% at bit 63 -> out 61 (^ 0) + + +[[[ Seed 'Bit Independence Criteria' Tests ]]] + +Testing 3-byte keys, 1200000 reps............max 0.0041 at bit 54 -> out ( 25, 50) (^ 0) +Testing 4-byte keys, 1200000 reps............max 0.0044 at bit 62 -> out ( 45, 94) (^ 1) +Testing 6-byte keys, 1200000 reps............max 0.0045 at bit 22 -> out ( 65,101) (^ 1) +Testing 8-byte keys, 1200000 reps............max 0.0044 at bit 2 -> out ( 13,105) (^ 1) +Testing 11-byte keys, 1200000 reps............max 0.0045 at bit 30 -> out ( 11,121) (^ 1) +Testing 15-byte keys, 1200000 reps............max 0.0042 at bit 34 -> out ( 51, 87) (^ 0) +Testing 28-byte keys, 600000 reps............max 0.0065 at bit 44 -> out ( 1,118) (^ 2) +Testing 52-byte keys, 600000 reps............max 0.0060 at bit 46 -> out ( 98,127) (^ 0) +Testing 1024-byte keys, 600000 reps............max 0.0062 at bit 34 -> out ( 58,114) (^ 0) + + +[[[ Seed Bitflip Tests ]]] + +Testing 3-byte keys, 64-bit seeds, 1572864 reps.......... 0 failed, worst is seed bit 57 +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 35-bit) - Expected 144.0, actual 168 (1.167x) (^ 5) +Testing all collisions (low 35-bit) - Expected 144.0, actual 178 (1.236x) (^ 8) +Testing all collisions (high 32-bit) - Expected 1151.7, actual 1208 (1.049x) (^ 4) +Testing all collisions (low 32-bit) - Expected 1151.7, actual 1129 (0.980x) (^ 0) +Testing all collisions (high 20..38 bits) - Worst is 36 bits: 90/72 (1.250x) (^ 1) +Testing all collisions (low 20..38 bits) - Worst is 35 bits: 178/144 (1.236x) (^ 3) +Testing distribution (any 8..19 bits) - Worst bias is 9 bits at bit 13: 0.694x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 33-bit) - Expected 144.0, actual 141 (0.979x) (^ 0) +Testing all collisions (low 33-bit) - Expected 144.0, actual 161 (1.118x) (^ 3) +Testing all collisions (high 32-bit) - Expected 288.0, actual 285 (0.990x) (^ 0) +Testing all collisions (low 32-bit) - Expected 288.0, actual 294 (1.021x) (^ 1) +Testing all collisions (high 19..36 bits) - Worst is 35 bits: 48/36 (1.333x) (^ 1) +Testing all collisions (low 19..36 bits) - Worst is 35 bits: 49/36 (1.361x) (^ 1) +Testing distribution (any 8..18 bits) - Worst bias is 17 bits at bit 101: 0.701x (^ 5) + +Testing 4-byte keys, 64-bit seeds, 1572864 reps.......... 0 failed, worst is seed bit 37 +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 35-bit) - Expected 144.0, actual 170 (1.181x) (^ 5) +Testing all collisions (low 35-bit) - Expected 144.0, actual 151 (1.049x) (^ 1) +Testing all collisions (high 32-bit) - Expected 1151.7, actual 1217 (1.057x) (^ 5) +Testing all collisions (low 32-bit) - Expected 1151.7, actual 1205 (1.046x) (^ 4) +Testing all collisions (high 20..38 bits) - Worst is 34 bits: 352/288 (1.222x) (^ 8) +Testing all collisions (low 20..38 bits) - Worst is 32 bits: 1205/1152 (1.046x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 11 bits at bit 42: 0.642x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 33-bit) - Expected 144.0, actual 150 (1.042x) (^ 1) +Testing all collisions (low 33-bit) - Expected 144.0, actual 160 (1.111x) (^ 3) +Testing all collisions (high 32-bit) - Expected 288.0, actual 273 (0.948x) (^ 0) +Testing all collisions (low 32-bit) - Expected 288.0, actual 300 (1.042x) (^ 2) +Testing all collisions (high 19..36 bits) - Worst is 33 bits: 150/144 (1.042x) (^ 0) +Testing all collisions (low 19..36 bits) - Worst is 36 bits: 33/18 (1.833x) (^ 5) +Testing distribution (any 8..18 bits) - Worst bias is 16 bits at bit 91: 0.537x (^ 0) + +Testing 8-byte keys, 64-bit seeds, 1572864 reps.......... 0 failed, worst is seed bit 17 +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 35-bit) - Expected 144.0, actual 156 (1.083x) (^ 2) +Testing all collisions (low 35-bit) - Expected 144.0, actual 128 (0.889x) (^ 0) +Testing all collisions (high 32-bit) - Expected 1151.7, actual 1121 (0.973x) (^ 0) +Testing all collisions (low 32-bit) - Expected 1151.7, actual 1129 (0.980x) (^ 0) +Testing all collisions (high 20..38 bits) - Worst is 24 bits: 277870/277313 (1.002x) (^ 0) +Testing all collisions (low 20..38 bits) - Worst is 30 bits: 4651/4604 (1.010x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 15 bits at bit 13: 0.503x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 33-bit) - Expected 144.0, actual 171 (1.188x) (^ 5) +Testing all collisions (low 33-bit) - Expected 144.0, actual 180 (1.250x) (^ 8) +Testing all collisions (high 32-bit) - Expected 288.0, actual 328 (1.139x) (^ 6) +Testing all collisions (low 32-bit) - Expected 288.0, actual 315 (1.094x) (^ 4) +Testing all collisions (high 19..36 bits) - Worst is 32 bits: 328/288 (1.139x) (^ 2) +Testing all collisions (low 19..36 bits) - Worst is 33 bits: 180/144 (1.250x) (^ 4) +Testing distribution (any 8..18 bits) - Worst bias is 8 bits at bit 35: 0.823x (^ 0) + +Testing 20-byte keys, 64-bit seeds, 1572864 reps.......... 0 failed, worst is seed bit 41 +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 35-bit) - Expected 144.0, actual 171 (1.188x) (^ 5) +Testing all collisions (low 35-bit) - Expected 144.0, actual 136 (0.944x) (^ 0) +Testing all collisions (high 32-bit) - Expected 1151.7, actual 1178 (1.023x) (^ 2) +Testing all collisions (low 32-bit) - Expected 1151.7, actual 1180 (1.025x) (^ 2) +Testing all collisions (high 20..38 bits) - Worst is 36 bits: 95/72 (1.319x) (^ 3) +Testing all collisions (low 20..38 bits) - Worst is 32 bits: 1180/1152 (1.025x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 15 bits at bit 31: 0.569x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 33-bit) - Expected 144.0, actual 170 (1.181x) (^ 5) +Testing all collisions (low 33-bit) - Expected 144.0, actual 127 (0.882x) (^ 0) +Testing all collisions (high 32-bit) - Expected 288.0, actual 338 (1.174x) (^ 8) +Testing all collisions (low 32-bit) - Expected 288.0, actual 270 (0.938x) (^ 0) +Testing all collisions (high 19..36 bits) - Worst is 32 bits: 338/288 (1.174x) (^ 4) +Testing all collisions (low 19..36 bits) - Worst is 21 bits: 466861/466336 (1.001x) (^ 0) +Testing distribution (any 8..18 bits) - Worst bias is 15 bits at bit 29: 0.616x (^ 1) + +Testing 32-byte keys, 64-bit seeds, 1572864 reps.......... 0 failed, worst is seed bit 17 +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 35-bit) - Expected 144.0, actual 142 (0.986x) (^ 0) +Testing all collisions (low 35-bit) - Expected 144.0, actual 151 (1.049x) (^ 1) +Testing all collisions (high 32-bit) - Expected 1151.7, actual 1217 (1.057x) (^ 5) +Testing all collisions (low 32-bit) - Expected 1151.7, actual 1154 (1.002x) (^ 1) +Testing all collisions (high 20..38 bits) - Worst is 27 bits: 37005/36578 (1.012x) (^ 2) +Testing all collisions (low 20..38 bits) - Worst is 30 bits: 4689/4604 (1.019x) (^ 0) +Testing distribution (any 8..19 bits) - Worst bias is 9 bits at bit 32: 0.764x (^ 0) +---Analyzing differential distribution +Testing all collisions ( 128-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (low 64-bit) - Expected 0.0, actual 0 (1.000x) (^ 0) +Testing all collisions (high 33-bit) - Expected 144.0, actual 176 (1.222x) (^ 7) +Testing all collisions (low 33-bit) - Expected 144.0, actual 125 (0.868x) (^ 0) +Testing all collisions (high 32-bit) - Expected 288.0, actual 328 (1.139x) (^ 6) +Testing all collisions (low 32-bit) - Expected 288.0, actual 282 (0.979x) (^ 0) +Testing all collisions (high 19..36 bits) - Worst is 36 bits: 31/18 (1.722x) (^ 3) +Testing all collisions (low 19..36 bits) - Worst is 26 bits: 18680/18289 (1.021x) (^ 4) +Testing distribution (any 8..18 bits) - Worst bias is 18 bits at bit 12: 0.673x (^ 4) + + +---------------------------------------------------------------------------------------------- +-log2(p-value) summary: + + 0 1 2 3 4 5 6 7 8 9 10 11 12 + ----- ----- ----- ----- ----- ----- ----- ----- ----- ----- ----- ----- ----- + 14375 3067 1354 733 337 183 95 46 34 11 3 1 3 + + 13 14 15 16 17 18 19 20 21 22 23 24 25+ + ----- ----- ----- ----- ----- ----- ----- ----- ----- ----- ----- ----- ----- + 1 0 1 0 0 0 2 0 0 0 2 0 6 + +---------------------------------------------------------------------------------------------- +Summary for: XXH3-128-snapraid [sse2] +Overall result: FAIL ( 250 / 252 passed) +Failures: + Bitflip : [20] + SeedZeroes : [8448] + +---------------------------------------------------------------------------------------------- +Verification value is 0x00000001 - Testing took 3012.724836 seconds + diff --git a/smhasher3/xxh3_snapraid.cpp b/smhasher3/xxh3_snapraid.cpp new file mode 100644 index 00000000..a51cb766 --- /dev/null +++ b/smhasher3/xxh3_snapraid.cpp @@ -0,0 +1,651 @@ +// SPDX-License-Identifier: GPL-3.0-or-later +// Copyright (C) 2026 Andrea Mazzoleni + +/* + * Derivative work of the XXH3-128 v8.4 implementation. + * + * This file implements the XXH3 long accumulator mode with support for + * arbitrary input lengths. Unlike the original XXH3, which switches to separate + * small/midsize routines for len <= 240 bytes, this implementation extends the + * long mode: + * - For len >= 64 bytes, it uses the striped accumulator loop directly. + * - For len < 64 bytes, the input is zero-padded to 64 bytes, and the original + * length is folded into the finalizer (preventing padding collisions). + * + * The motivation for extending the long mode to all lengths rather than using + * the upstream short/midsize routines is that SnapRAID operates primarily on + * large data blocks (typically 256 KB) where SIMD-accelerated long mode delivers + * maximum throughput. Short inputs occur only as rare edge cases (such as + * empty or small files), and maintaining a single code path reduces algorithmic + * complexity and defect potential. + * + * seed points to 16 bytes, interpreted as two little-endian uint64_t words: + * seed_lo then seed_hi. + * - An all-zero seed uses the unmodified standard XXH3 secret. + * - For len > 240, setting seed_lo == seed_hi matches standard + * XXH3_128bits_withSeed() with that 64-bit seed value. + * - When seed_lo != seed_hi, the 128-bit seed extends the secret by adding + * seed_lo to even 64-bit words and subtracting seed_hi from odd words. + * + * For len <= 240, the output is not bit-compatible with original xxHash due to + * using the padded long mode rather than the upstream short/midsize routines. + */ + +/* + * xxHash - Extremely Fast Hash algorithm + * Development source file for `xxh3` + * Copyright (C) 2019-2021 Yann Collet + * + * BSD 2-Clause License (https://www.opensource.org/licenses/bsd-license.php) + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are + * met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above + * copyright notice, this list of conditions and the following disclaimer + * in the documentation and/or other materials provided with the + * distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You can contact the author at: + * - xxHash homepage: https://www.xxhash.com + * - xxHash source repository: https://github.com/Cyan4973/xxHash + */ + +/** + * Standalone SMHasher3 adapter for cmdline/xxh3.c. + * Both entry points retain SnapRAID's canonical little-endian reads and output. + * SMHasher3's 64-bit seed is duplicated into the two 64-bit seed halves. + */ +#include "Platform.h" +#include "Hashlib.h" +#include "Mathmult.h" + +/** + * Change the #if values here to select an implementation manually. + * SIMD entry points require a compatible CPU; there is no runtime dispatch. + * The target attributes below preserve the existing SMHasher3 compiler flags. + */ +#if 0 +#define XXH3_SNAPRAID_HASH_FN xxh3_128 +#define XXH3_SNAPRAID_IMPL "scalar" +#elif 0 +#define XXH3_SNAPRAID_HASH_FN xxh3_128_avx512 +#define XXH3_SNAPRAID_IMPL "avx512" +#elif 0 +#define XXH3_SNAPRAID_HASH_FN xxh3_128_avx2 +#define XXH3_SNAPRAID_IMPL "avx2" +#elif defined(__i386__) || defined(__x86_64__) +#define XXH3_SNAPRAID_HASH_FN xxh3_128_sse2 +#define XXH3_SNAPRAID_IMPL "sse2" +#elif defined(__ARM_NEON) || defined(__ARM_NEON__) +#define XXH3_SNAPRAID_HASH_FN xxh3_128_neon +#define XXH3_SNAPRAID_IMPL "neon" +#else +#define XXH3_SNAPRAID_HASH_FN xxh3_128 +#define XXH3_SNAPRAID_IMPL "scalar" +#endif + +static FORCE_INLINE uint64_t xxh3_read64(const uint8_t* ptr) +{ + return COND_BSWAP(GET_U64(ptr, 0), isBE()); +} + +static FORCE_INLINE void xxh3_write64(uint8_t* ptr, uint64_t value) +{ + PUT_U64(COND_BSWAP(value, isBE()), ptr, 0); +} + +#if defined(__i386__) || defined(__x86_64__) +#include + +#define XXH3_TARGET_SSE2 __attribute__((target("sse2"))) +#define XXH3_TARGET_AVX2 __attribute__((target("avx2"))) +#define XXH3_TARGET_AVX512 __attribute__((target("avx512f"))) +#endif + +#if defined(__ARM_NEON) || defined(__ARM_NEON__) +#include +#endif + +#define XXH3_STRIPE_LEN 64 +#define XXH3_SECRET_SIZE 192 +#define XXH3_SECRET_CONSUME_RATE 8 +#define XXH3_ACC_NB 8 +#define XXH3_STRIPES_PER_BLOCK 16 +#define XXH3_BLOCK_LEN 1024 +#define XXH3_LAST_SECRET_OFFSET 121 +#define XXH3_MERGE_OFFSET 11 + +#define XXH_PRIME32_1 0x9E3779B1U +#define XXH_PRIME32_2 0x85EBCA77U +#define XXH_PRIME32_3 0xC2B2AE3DU + +#define XXH_PRIME64_1 0x9E3779B185EBCA87ULL +#define XXH_PRIME64_2 0xC2B2AE3D27D4EB4FULL +#define XXH_PRIME64_3 0x165667B19E3779F9ULL +#define XXH_PRIME64_4 0x85EBCA77C2B2AE63ULL +#define XXH_PRIME64_5 0x27D4EB2F165667C5ULL + +#define XXH_PRIME_MX1 0x165667919E3779F9ULL + +#define XXH3_INIT_ACC_VALUES \ + { XXH_PRIME32_3, XXH_PRIME64_1, XXH_PRIME64_2, XXH_PRIME64_3, \ + XXH_PRIME64_4, XXH_PRIME32_2, XXH_PRIME64_5, XXH_PRIME32_1 } + +alignas(64) static const uint8_t xxh3_secret[XXH3_SECRET_SIZE] = { + 0xb8, 0xfe, 0x6c, 0x39, 0x23, 0xa4, 0x4b, 0xbe, 0x7c, 0x01, 0x81, 0x2c, 0xf7, 0x21, 0xad, 0x1c, + 0xde, 0xd4, 0x6d, 0xe9, 0x83, 0x90, 0x97, 0xdb, 0x72, 0x40, 0xa4, 0xa4, 0xb7, 0xb3, 0x67, 0x1f, + 0xcb, 0x79, 0xe6, 0x4e, 0xcc, 0xc0, 0xe5, 0x78, 0x82, 0x5a, 0xd0, 0x7d, 0xcc, 0xff, 0x72, 0x21, + 0xb8, 0x08, 0x46, 0x74, 0xf7, 0x43, 0x24, 0x8e, 0xe0, 0x35, 0x90, 0xe6, 0x81, 0x3a, 0x26, 0x4c, + 0x3c, 0x28, 0x52, 0xbb, 0x91, 0xc3, 0x00, 0xcb, 0x88, 0xd0, 0x65, 0x8b, 0x1b, 0x53, 0x2e, 0xa3, + 0x71, 0x64, 0x48, 0x97, 0xa2, 0x0d, 0xf9, 0x4e, 0x38, 0x19, 0xef, 0x46, 0xa9, 0xde, 0xac, 0xd8, + 0xa8, 0xfa, 0x76, 0x3f, 0xe3, 0x9c, 0x34, 0x3f, 0xf9, 0xdc, 0xbb, 0xc7, 0xc7, 0x0b, 0x4f, 0x1d, + 0x8a, 0x51, 0xe0, 0x4b, 0xcd, 0xb4, 0x59, 0x31, 0xc8, 0x9f, 0x7e, 0xc9, 0xd9, 0x78, 0x73, 0x64, + 0xea, 0xc5, 0xac, 0x83, 0x34, 0xd3, 0xeb, 0xc3, 0xc5, 0x81, 0xa0, 0xff, 0xfa, 0x13, 0x63, 0xeb, + 0x17, 0x0d, 0xdd, 0x51, 0xb7, 0xf0, 0xda, 0x49, 0xd3, 0x16, 0x55, 0x26, 0x29, 0xd4, 0x68, 0x9e, + 0x2b, 0x16, 0xbe, 0x58, 0x7d, 0x47, 0xa1, 0xfc, 0x8f, 0xf8, 0xb8, 0xd1, 0x7a, 0xd0, 0x31, 0xce, + 0x45, 0xcb, 0x3a, 0x8f, 0x95, 0x16, 0x04, 0x28, 0xaf, 0xd7, 0xfb, 0xca, 0xbb, 0x4b, 0x40, 0x7e +}; + +static FORCE_INLINE uint64_t xxh3_xorshift64(uint64_t x, unsigned shift) +{ + return x ^ (x >> shift); +} + +static FORCE_INLINE uint64_t xxh3_avalanche(uint64_t x) +{ + x = xxh3_xorshift64(x, 37); + x *= XXH_PRIME_MX1; + return xxh3_xorshift64(x, 32); +} + +static FORCE_INLINE uint64_t xxh3_mul128_fold64(uint64_t a, uint64_t b) +{ + MathMult::mult64_128(a, b, a, b); + return a ^ b; +} + +/* + * 128-bit seed extension. + * + * Standard XXH3 with a 64-bit seed transforms every 16-byte secret pair as: + * + * secret[even] += seed; + * secret[odd] -= seed; + * + * Here the 16-byte seed is split into two little-endian 64-bit words and the + * same construction is extended naturally to: + * + * secret[even] += seed_lo; + * secret[odd] -= seed_hi; + * + * Therefore both halves of the seed affect every 16-byte secret pair. + */ +static void xxh3_make_seeded_secret(uint8_t* out, uint64_t seed_lo, uint64_t seed_hi) +{ + for (size_t i = 0; i < XXH3_SECRET_SIZE; i += 16) { + xxh3_write64(out + i, xxh3_read64(xxh3_secret + i) + seed_lo); + xxh3_write64(out + i + 8, xxh3_read64(xxh3_secret + i + 8) - seed_hi); + } +} + +static FORCE_INLINE const uint8_t* xxh3_select_secret(const uint8_t* seed, uint8_t* custom) +{ + uint64_t seed_lo = xxh3_read64(seed); + uint64_t seed_hi = xxh3_read64(seed + 8); + + if ((seed_lo | seed_hi) == 0) + return xxh3_secret; + + xxh3_make_seeded_secret(custom, seed_lo, seed_hi); + return custom; +} + +static FORCE_INLINE uint64_t xxh3_mix2accs(const uint64_t* acc, const uint8_t* secret) +{ + return xxh3_mul128_fold64(acc[0] ^ xxh3_read64(secret), acc[1] ^ xxh3_read64(secret + 8)); +} + +static FORCE_INLINE uint64_t xxh3_merge_accs(const uint64_t* acc, const uint8_t* secret, uint64_t start) +{ + uint64_t h = start; + for (unsigned i = 0; i < 4; ++i) + h += xxh3_mix2accs(acc + 2 * i, secret + 16 * i); + return xxh3_avalanche(h); +} + +static FORCE_INLINE void xxh3_finalize128(const uint64_t* acc, const uint8_t* secret, size_t len, uint8_t* out) +{ + uint64_t low64 = xxh3_merge_accs(acc, secret + XXH3_MERGE_OFFSET, (uint64_t)len * XXH_PRIME64_1); + uint64_t high64 = xxh3_merge_accs(acc, secret + XXH3_SECRET_SIZE - XXH3_STRIPE_LEN - XXH3_MERGE_OFFSET, ~((uint64_t)len * XXH_PRIME64_2)); + xxh3_write64(out, low64); + xxh3_write64(out + 8, high64); +} + +static FORCE_INLINE void xxh3_acc512_c(uint64_t* acc, const uint8_t* input, const uint8_t* secret) +{ + for (unsigned lane = 0; lane < XXH3_ACC_NB; ++lane) { + uint64_t data = xxh3_read64(input + 8 * lane); + uint64_t keyed = data ^ xxh3_read64(secret + 8 * lane); + uint64_t product = (uint64_t)(uint32_t)keyed * (uint32_t)(keyed >> 32); + + acc[lane ^ 1] += data; /* exchange adjacent 64-bit lanes */ + acc[lane] += product; + } +} + +static FORCE_INLINE void xxh3_scramble_c(uint64_t* acc, const uint8_t* secret) +{ + for (unsigned lane = 0; lane < XXH3_ACC_NB; ++lane) { + uint64_t x = xxh3_xorshift64(acc[lane], 47); + x ^= xxh3_read64(secret + 8 * lane); + acc[lane] = x * XXH_PRIME32_1; + } +} + +static FORCE_INLINE void xxh3_short_core(const void* input, size_t len, const uint8_t* secret, uint8_t* out) +{ + alignas(64) uint8_t buf[XXH3_STRIPE_LEN]; + alignas(64) uint64_t acc[XXH3_ACC_NB] = XXH3_INIT_ACC_VALUES; + + memset(buf, 0, XXH3_STRIPE_LEN); + if (len > 0) + memcpy(buf, input, len); + + xxh3_acc512_c(acc, buf, secret + XXH3_LAST_SECRET_OFFSET); + xxh3_finalize128(acc, secret, len, out); +} + +/* + * With the 192-byte default secret: + * stripes per block = (192 - 64) / 8 = 16 + * block size = 16 * 64 = 1024 bytes + */ +static FORCE_INLINE void xxh3_long_core_c(const void* input, size_t len, const uint8_t* secret, uint8_t* out) +{ + const uint8_t* p = static_cast(input); + alignas(64) uint64_t acc[XXH3_ACC_NB] = XXH3_INIT_ACC_VALUES; + size_t blocks = (len - 1) / XXH3_BLOCK_LEN; + + for (size_t b = 0; b < blocks; ++b) { + const uint8_t* block = p + b * XXH3_BLOCK_LEN; + for (size_t s = 0; s < XXH3_STRIPES_PER_BLOCK; ++s) + xxh3_acc512_c(acc, block + s * XXH3_STRIPE_LEN, secret + s * XXH3_SECRET_CONSUME_RATE); + xxh3_scramble_c(acc, secret + XXH3_SECRET_SIZE - XXH3_STRIPE_LEN); + } + + size_t stripes = ((len - 1) - blocks * XXH3_BLOCK_LEN) / XXH3_STRIPE_LEN; + const uint8_t* block = p + blocks * XXH3_BLOCK_LEN; + for (size_t s = 0; s < stripes; ++s) + xxh3_acc512_c(acc, block + s * XXH3_STRIPE_LEN, secret + s * XXH3_SECRET_CONSUME_RATE); + + xxh3_acc512_c(acc, p + len - XXH3_STRIPE_LEN, secret + XXH3_LAST_SECRET_OFFSET); + xxh3_finalize128(acc, secret, len, out); +} + +/* + * seed points to 16 bytes: seed_lo then seed_hi, both little-endian. + * out receives low64 then high64, both little-endian. + * + * No CPU detection is performed. The caller must invoke only a SIMD entry + * point supported by the current CPU. + */ +static void xxh3_128(const void* bytes, size_t len, const uint8_t* seed, uint8_t* out) +{ + alignas(64) uint8_t custom[XXH3_SECRET_SIZE]; + const uint8_t* secret; + + secret = xxh3_select_secret(seed, custom); + + if (unlikely(len < XXH3_STRIPE_LEN)) + xxh3_short_core(bytes, len, secret, out); + else + xxh3_long_core_c(bytes, len, secret, out); +} + +#if defined(__ARM_NEON) || defined(__ARM_NEON__) +static FORCE_INLINE uint64x2_t xxh3_vld1q_u64(const void* ptr) +{ + return vreinterpretq_u64_u8(vld1q_u8((const uint8_t*)ptr)); +} + +static FORCE_INLINE uint64x2_t xxh3_vmlal_low_u32(uint64x2_t acc, uint32x4_t lhs, uint32x4_t rhs) +{ + return vmlal_u32(acc, vget_low_u32(lhs), vget_low_u32(rhs)); +} + +static FORCE_INLINE uint64x2_t xxh3_vmlal_high_u32(uint64x2_t acc, uint32x4_t lhs, uint32x4_t rhs) +{ +#if defined(__aarch64__) + return vmlal_high_u32(acc, lhs, rhs); +#else + return vmlal_u32(acc, vget_high_u32(lhs), vget_high_u32(rhs)); +#endif +} + +static FORCE_INLINE void xxh3_acc512_neon(uint64_t* acc, const uint8_t* input, const uint8_t* secret) +{ + for (unsigned i = 0; i < 4; i += 2) { + uint64x2_t data_vec_1 = xxh3_vld1q_u64(input + i * 16); + uint64x2_t data_vec_2 = xxh3_vld1q_u64(input + (i + 1) * 16); + uint64x2_t key_vec_1 = xxh3_vld1q_u64(secret + i * 16); + uint64x2_t key_vec_2 = xxh3_vld1q_u64(secret + (i + 1) * 16); + + uint64x2_t data_swap_1 = vextq_u64(data_vec_1, data_vec_1, 1); + uint64x2_t data_swap_2 = vextq_u64(data_vec_2, data_vec_2, 1); + + uint64x2_t data_key_1 = veorq_u64(data_vec_1, key_vec_1); + uint64x2_t data_key_2 = veorq_u64(data_vec_2, key_vec_2); + + uint32x4x2_t unzipped = vuzpq_u32( + vreinterpretq_u32_u64(data_key_1), + vreinterpretq_u32_u64(data_key_2) + ); + uint32x4_t data_key_lo = unzipped.val[0]; + uint32x4_t data_key_hi = unzipped.val[1]; + + uint64x2_t sum_1 = xxh3_vmlal_low_u32(data_swap_1, data_key_lo, data_key_hi); + uint64x2_t sum_2 = xxh3_vmlal_high_u32(data_swap_2, data_key_lo, data_key_hi); + + /* typed loads and stores preserve scalar lane order on big-endian ARM */ + vst1q_u64(acc + i * 2, vaddq_u64(vld1q_u64(acc + i * 2), sum_1)); + vst1q_u64(acc + (i + 1) * 2, vaddq_u64(vld1q_u64(acc + (i + 1) * 2), sum_2)); + } +} + +static FORCE_INLINE void xxh3_scramble_neon(uint64_t* acc, const uint8_t* secret) +{ + const uint32x2_t prime_lo = vdup_n_u32(XXH_PRIME32_1); + const uint32x4_t prime_hi = vreinterpretq_u32_u64(vdupq_n_u64((uint64_t)XXH_PRIME32_1 << 32)); + + for (unsigned i = 0; i < 4; ++i) { + uint64x2_t acc_vec = vld1q_u64(acc + i * 2); + uint64x2_t shifted = vshrq_n_u64(acc_vec, 47); + uint64x2_t data_vec = veorq_u64(acc_vec, shifted); + + uint64x2_t key_vec = xxh3_vld1q_u64(secret + i * 16); + uint64x2_t data_key = veorq_u64(data_vec, key_vec); + + uint32x4_t prod_hi = vmulq_u32(vreinterpretq_u32_u64(data_key), prime_hi); + uint32x2_t data_key_lo = vmovn_u64(data_key); + vst1q_u64(acc + i * 2, vmlal_u32(vreinterpretq_u64_u32(prod_hi), data_key_lo, prime_lo)); + } +} + +static FORCE_INLINE void xxh3_long_core_neon(const void* input, size_t len, const uint8_t* secret, uint8_t* out) +{ + const uint8_t* p = static_cast(input); + alignas(64) uint64_t acc[XXH3_ACC_NB] = XXH3_INIT_ACC_VALUES; + size_t blocks = (len - 1) / XXH3_BLOCK_LEN; + + for (size_t b = 0; b < blocks; ++b) { + const uint8_t* block = p + b * XXH3_BLOCK_LEN; + for (size_t s = 0; s < XXH3_STRIPES_PER_BLOCK; ++s) + xxh3_acc512_neon(acc, block + s * XXH3_STRIPE_LEN, secret + s * XXH3_SECRET_CONSUME_RATE); + xxh3_scramble_neon(acc, secret + XXH3_SECRET_SIZE - XXH3_STRIPE_LEN); + } + + size_t stripes = ((len - 1) - blocks * XXH3_BLOCK_LEN) / XXH3_STRIPE_LEN; + const uint8_t* block = p + blocks * XXH3_BLOCK_LEN; + for (size_t s = 0; s < stripes; ++s) + xxh3_acc512_neon(acc, block + s * XXH3_STRIPE_LEN, secret + s * XXH3_SECRET_CONSUME_RATE); + + xxh3_acc512_neon(acc, p + len - XXH3_STRIPE_LEN, secret + XXH3_LAST_SECRET_OFFSET); + xxh3_finalize128(acc, secret, len, out); +} + +static void xxh3_128_neon(const void* bytes, size_t len, const uint8_t* seed, uint8_t* out) +{ + alignas(64) uint8_t custom[XXH3_SECRET_SIZE]; + const uint8_t* secret; + + secret = xxh3_select_secret(seed, custom); + + if (unlikely(len < XXH3_STRIPE_LEN)) + xxh3_short_core(bytes, len, secret, out); + else + xxh3_long_core_neon(bytes, len, secret, out); +} +#endif + +#if defined(__i386__) || defined(__x86_64__) +static XXH3_TARGET_SSE2 FORCE_INLINE void xxh3_acc512_sse2(uint64_t* acc, const uint8_t* input, const uint8_t* secret) +{ + __m128i* a = (__m128i*)(void*)acc; + + for (unsigned i = 0; i < 4; ++i) { + __m128i data = _mm_loadu_si128((const __m128i*)(const void*)(input + 16 * i)); + __m128i key = _mm_loadu_si128((const __m128i*)(const void*)(secret + 16 * i)); + __m128i mix = _mm_xor_si128(data, key); + __m128i hi32 = _mm_srli_epi64(mix, 32); + __m128i prod = _mm_mul_epu32(mix, hi32); + __m128i swap = _mm_shuffle_epi32(data, _MM_SHUFFLE(1, 0, 3, 2)); + a[i] = _mm_add_epi64(_mm_add_epi64(a[i], swap), prod); + } +} + +static XXH3_TARGET_SSE2 FORCE_INLINE void xxh3_scramble_sse2(uint64_t* acc, const uint8_t* secret) +{ + __m128i* a = (__m128i*)(void*)acc; + const __m128i prime = _mm_set1_epi32((int)XXH_PRIME32_1); + + for (unsigned i = 0; i < 4; ++i) { + __m128i x = a[i]; + __m128i key = _mm_loadu_si128((const __m128i*)(const void*)(secret + 16 * i)); + x = _mm_xor_si128(x, _mm_srli_epi64(x, 47)); + x = _mm_xor_si128(x, key); + + /* 64-bit x * 32-bit prime, modulo 2^64, using SSE2 32x32 multiplies. */ + __m128i lo = _mm_mul_epu32(x, prime); + __m128i hi = _mm_mul_epu32(_mm_srli_epi64(x, 32), prime); + a[i] = _mm_add_epi64(lo, _mm_slli_epi64(hi, 32)); + } +} + +static XXH3_TARGET_AVX2 FORCE_INLINE void xxh3_acc512_avx2(uint64_t* acc, const uint8_t* input, const uint8_t* secret) +{ + __m256i* a = (__m256i*)(void*)acc; + + for (unsigned i = 0; i < 2; ++i) { + __m256i data = _mm256_loadu_si256((const __m256i*)(const void*)(input + 32 * i)); + __m256i key = _mm256_loadu_si256((const __m256i*)(const void*)(secret + 32 * i)); + __m256i mix = _mm256_xor_si256(data, key); + __m256i hi32 = _mm256_srli_epi64(mix, 32); + __m256i prod = _mm256_mul_epu32(mix, hi32); + __m256i swap = _mm256_shuffle_epi32(data, _MM_SHUFFLE(1, 0, 3, 2)); + a[i] = _mm256_add_epi64(_mm256_add_epi64(a[i], swap), prod); + } +} + +static XXH3_TARGET_AVX2 FORCE_INLINE void xxh3_scramble_avx2(uint64_t* acc, const uint8_t* secret) +{ + __m256i* a = (__m256i*)(void*)acc; + const __m256i prime = _mm256_set1_epi32((int)XXH_PRIME32_1); + + for (unsigned i = 0; i < 2; ++i) { + __m256i x = a[i]; + __m256i key = _mm256_loadu_si256((const __m256i*)(const void*)(secret + 32 * i)); + x = _mm256_xor_si256(x, _mm256_srli_epi64(x, 47)); + x = _mm256_xor_si256(x, key); + + __m256i lo = _mm256_mul_epu32(x, prime); + __m256i hi = _mm256_mul_epu32(_mm256_srli_epi64(x, 32), prime); + a[i] = _mm256_add_epi64(lo, _mm256_slli_epi64(hi, 32)); + } +} + +static XXH3_TARGET_AVX512 FORCE_INLINE void xxh3_acc512_avx512(uint64_t* acc, const uint8_t* input, const uint8_t* secret) +{ + __m512i* a = (__m512i*)(void*)acc; + __m512i data = _mm512_loadu_si512((const void*)input); + __m512i key = _mm512_loadu_si512((const void*)secret); + __m512i mix = _mm512_xor_si512(data, key); + __m512i prod = _mm512_mul_epu32(mix, _mm512_srli_epi64(mix, 32)); + __m512i swap = _mm512_shuffle_epi32(data, _MM_PERM_BADC); + *a = _mm512_add_epi64(_mm512_add_epi64(*a, swap), prod); +} + +static XXH3_TARGET_AVX512 FORCE_INLINE void xxh3_scramble_avx512(uint64_t* acc, const uint8_t* secret) +{ + __m512i* a = (__m512i*)(void*)acc; + const __m512i prime = _mm512_set1_epi32((int)XXH_PRIME32_1); + __m512i x = *a; + __m512i key = _mm512_loadu_si512((const void*)secret); + __m512i shifted = _mm512_srli_epi64(x, 47); + + x = _mm512_ternarylogic_epi32(key, x, shifted, 0x96); + + __m512i lo = _mm512_mul_epu32(x, prime); + __m512i hi = _mm512_mul_epu32(_mm512_srli_epi64(x, 32), prime); + *a = _mm512_add_epi64(lo, _mm512_slli_epi64(hi, 32)); +} + +static XXH3_TARGET_SSE2 FORCE_INLINE void xxh3_long_core_sse2(const void* input, size_t len, const uint8_t* secret, uint8_t* out) +{ + const uint8_t* p = static_cast(input); + alignas(64) uint64_t acc[XXH3_ACC_NB] = XXH3_INIT_ACC_VALUES; + size_t blocks = (len - 1) / XXH3_BLOCK_LEN; + + for (size_t b = 0; b < blocks; ++b) { + const uint8_t* block = p + b * XXH3_BLOCK_LEN; + for (size_t s = 0; s < XXH3_STRIPES_PER_BLOCK; ++s) + xxh3_acc512_sse2(acc, block + s * XXH3_STRIPE_LEN, secret + s * XXH3_SECRET_CONSUME_RATE); + xxh3_scramble_sse2(acc, secret + XXH3_SECRET_SIZE - XXH3_STRIPE_LEN); + } + + size_t stripes = ((len - 1) - blocks * XXH3_BLOCK_LEN) / XXH3_STRIPE_LEN; + const uint8_t* block = p + blocks * XXH3_BLOCK_LEN; + for (size_t s = 0; s < stripes; ++s) + xxh3_acc512_sse2(acc, block + s * XXH3_STRIPE_LEN, secret + s * XXH3_SECRET_CONSUME_RATE); + + xxh3_acc512_sse2(acc, p + len - XXH3_STRIPE_LEN, secret + XXH3_LAST_SECRET_OFFSET); + xxh3_finalize128(acc, secret, len, out); +} + +static XXH3_TARGET_AVX2 FORCE_INLINE void xxh3_long_core_avx2(const void* input, size_t len, const uint8_t* secret, uint8_t* out) +{ + const uint8_t* p = static_cast(input); + alignas(64) uint64_t acc[XXH3_ACC_NB] = XXH3_INIT_ACC_VALUES; + size_t blocks = (len - 1) / XXH3_BLOCK_LEN; + + for (size_t b = 0; b < blocks; ++b) { + const uint8_t* block = p + b * XXH3_BLOCK_LEN; + for (size_t s = 0; s < XXH3_STRIPES_PER_BLOCK; ++s) + xxh3_acc512_avx2(acc, block + s * XXH3_STRIPE_LEN, secret + s * XXH3_SECRET_CONSUME_RATE); + xxh3_scramble_avx2(acc, secret + XXH3_SECRET_SIZE - XXH3_STRIPE_LEN); + } + + size_t stripes = ((len - 1) - blocks * XXH3_BLOCK_LEN) / XXH3_STRIPE_LEN; + const uint8_t* block = p + blocks * XXH3_BLOCK_LEN; + for (size_t s = 0; s < stripes; ++s) + xxh3_acc512_avx2(acc, block + s * XXH3_STRIPE_LEN, secret + s * XXH3_SECRET_CONSUME_RATE); + + xxh3_acc512_avx2(acc, p + len - XXH3_STRIPE_LEN, secret + XXH3_LAST_SECRET_OFFSET); + xxh3_finalize128(acc, secret, len, out); +} + +static XXH3_TARGET_AVX512 FORCE_INLINE void xxh3_long_core_avx512(const void* input, size_t len, const uint8_t* secret, uint8_t* out) +{ + const uint8_t* p = static_cast(input); + alignas(64) uint64_t acc[XXH3_ACC_NB] = XXH3_INIT_ACC_VALUES; + size_t blocks = (len - 1) / XXH3_BLOCK_LEN; + + for (size_t b = 0; b < blocks; ++b) { + const uint8_t* block = p + b * XXH3_BLOCK_LEN; + for (size_t s = 0; s < XXH3_STRIPES_PER_BLOCK; ++s) + xxh3_acc512_avx512(acc, block + s * XXH3_STRIPE_LEN, secret + s * XXH3_SECRET_CONSUME_RATE); + xxh3_scramble_avx512(acc, secret + XXH3_SECRET_SIZE - XXH3_STRIPE_LEN); + } + + size_t stripes = ((len - 1) - blocks * XXH3_BLOCK_LEN) / XXH3_STRIPE_LEN; + const uint8_t* block = p + blocks * XXH3_BLOCK_LEN; + for (size_t s = 0; s < stripes; ++s) + xxh3_acc512_avx512(acc, block + s * XXH3_STRIPE_LEN, secret + s * XXH3_SECRET_CONSUME_RATE); + + xxh3_acc512_avx512(acc, p + len - XXH3_STRIPE_LEN, secret + XXH3_LAST_SECRET_OFFSET); + xxh3_finalize128(acc, secret, len, out); +} + +static XXH3_TARGET_SSE2 void xxh3_128_sse2(const void* bytes, size_t len, const uint8_t* seed, uint8_t* out) +{ + alignas(64) uint8_t custom[XXH3_SECRET_SIZE]; + const uint8_t* secret; + + secret = xxh3_select_secret(seed, custom); + + if (unlikely(len < XXH3_STRIPE_LEN)) + xxh3_short_core(bytes, len, secret, out); + else + xxh3_long_core_sse2(bytes, len, secret, out); +} + +static XXH3_TARGET_AVX2 void xxh3_128_avx2(const void* bytes, size_t len, const uint8_t* seed, uint8_t* out) +{ + alignas(64) uint8_t custom[XXH3_SECRET_SIZE]; + const uint8_t* secret; + + secret = xxh3_select_secret(seed, custom); + + if (unlikely(len < XXH3_STRIPE_LEN)) + xxh3_short_core(bytes, len, secret, out); + else + xxh3_long_core_avx2(bytes, len, secret, out); +} + +static XXH3_TARGET_AVX512 void xxh3_128_avx512(const void* bytes, size_t len, const uint8_t* seed, uint8_t* out) +{ + alignas(64) uint8_t custom[XXH3_SECRET_SIZE]; + const uint8_t* secret; + + secret = xxh3_select_secret(seed, custom); + + if (unlikely(len < XXH3_STRIPE_LEN)) + xxh3_short_core(bytes, len, secret, out); + else + xxh3_long_core_avx512(bytes, len, secret, out); +} +#endif + +static void xxh3_snapraid(const void* in, size_t len, seed_t seed, void* out) +{ + uint8_t seed_bytes[16]; + + /* duplicate the seed, matching the other SnapRAID adapters */ + xxh3_write64(seed_bytes, seed); + xxh3_write64(seed_bytes + 8, seed); + XXH3_SNAPRAID_HASH_FN(in, len, seed_bytes, static_cast(out)); +} + +REGISTER_FAMILY(xxh3_snapraid, + $.src_url = "https://github.com/amadvance/snapraid/", + $.src_status = HashFamilyInfo::SRC_ACTIVE +); + +REGISTER_HASH(XXH3_128_snapraid, + $.desc = "XXH3-128, SnapRAID long mode for all input lengths", + $.impl = XXH3_SNAPRAID_IMPL, + $.hash_flags = FLAG_HASH_ENDIAN_INDEPENDENT, + $.impl_flags = FLAG_IMPL_MULTIPLY_64_128 | + FLAG_IMPL_CANONICAL_BOTH | + FLAG_IMPL_LICENSE_GPL3, + $.bits = 128, + $.verification_LE = 0xCFAD116F, + $.verification_BE = 0xCFAD116F, + $.hashfn_native = xxh3_snapraid, + $.hashfn_bswap = xxh3_snapraid +);