rt/snapraid
1
0
Fork 0
mirror of https://github.com/amadvance/snapraid.git synced 2026-10-26 10:51:54 -04:00
Code Issues Projects Releases Packages Wiki Activity Actions

Assume the assembler supports all x86 SSE/AVX instructions

Browse source
This commit is contained in:
Andrea Mazzoleni 2026-05-28 01:12:17 +02:00
parent 00d272a8b9
commit e3a0671c00
13 changed files with 225 additions and 782 deletions
Download patch file Download diff file Expand all files Collapse all files

10
cmdline/mingw.h
View file

@ -8,16 +8,6 @@
#include <wchar.h>
/**
* Always assume that the assembler supports SSE2, SSSE3, SSE42 and AVX2 instructions in x86
*/
#ifdef CONFIG_X86
#define HAVE_SSE2 1
#define HAVE_SSSE3 1
#define HAVE_SSE42 1
#define HAVE_AVX2 1
#endif
/* map Windows name to POSIX name */
#define strncasecmp _strnicmp

270
cmdline/speed.c
View file

@ -206,7 +206,7 @@ void speed(int period, int nd, int size)
printf("%8s", "intel");
fflush(stdout);
#if HAVE_SSE42
#if CONFIG_X86
if (raid_cpu_has_crc32()) {
SPEED_START {
for (j = 0; j < nd; ++j)
@ -275,26 +275,31 @@ void speed(int period, int nd, int size)
printf("%8s", "int32");
printf("%8s", "int64");
#ifdef CONFIG_X86
printf("%8s", "sse2");
if (raid_cpu_has_sse2()) {
printf("%8s", "sse2");
#ifdef CONFIG_X86_64
printf("%8s", "sse2e");
printf("%8s", "sse2e");
#endif
printf("%8s", "ssse3");
}
if (raid_cpu_has_ssse3()) {
printf("%8s", "ssse3");
#ifdef CONFIG_X86_64
printf("%8s", "ssse3e");
printf("%8s", "ssse3e");
#endif
printf("%8s", "avx2");
}
if (raid_cpu_has_avx2()) {
printf("%8s", "avx2");
#ifdef CONFIG_X86_64
printf("%8s", "avx2e");
#ifdef CONFIG_AVX512BW
printf("%8s", "avx512");
#endif
#ifdef CONFIG_AVX2GFNI
printf("%8s", "gfni");
#endif
#ifdef CONFIG_AVX512GFNI
printf("%8s", "gfni512");
printf("%8s", "avx2e");
#endif
}
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw())
printf("%8s", "avx512");
if (raid_cpu_has_avx2gfni())
printf("%8s", "gfni");
if (raid_cpu_has_avx512gfni())
printf("%8s", "gfni512");
#endif
#endif
printf("\n");
@ -321,7 +326,6 @@ void speed(int period, int nd, int size)
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
SPEED_START {
raid_gen1_sse2(nd, size, v);
@ -329,17 +333,16 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#ifdef CONFIG_X86_64
printf("%8s", "");
#endif
}
#endif
if (raid_cpu_has_ssse3()) {
printf("%8s", "");
#ifdef CONFIG_X86_64
printf("%8s", "");
printf("%8s", "");
#endif
printf("%8s", "");
#ifdef CONFIG_X86_64
printf("%8s", "");
#endif
#ifdef CONFIG_AVX2
}
if (raid_cpu_has_avx2()) {
SPEED_START {
raid_gen1_avx2(nd, size, v);
@ -347,12 +350,11 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_X86_64
printf("%8s", "");
printf("%8s", "");
#endif
#ifdef CONFIG_AVX512BW
}
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
SPEED_START {
raid_gen1_avx512bw(nd, size, v);
@ -387,7 +389,6 @@ void speed(int period, int nd, int size)
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
SPEED_START {
raid_gen2_sse2(nd, size, v);
@ -405,13 +406,12 @@ void speed(int period, int nd, int size)
fflush(stdout);
#endif
}
#endif
printf("%8s", "");
if (raid_cpu_has_ssse3()) {
printf("%8s", "");
#ifdef CONFIG_X86_64
printf("%8s", "");
printf("%8s", "");
#endif
#ifdef CONFIG_AVX2
}
if (raid_cpu_has_avx2()) {
SPEED_START {
raid_gen2_avx2(nd, size, v);
@ -419,12 +419,11 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_X86_64
printf("%8s", "");
printf("%8s", "");
#endif
#ifdef CONFIG_AVX512BW
}
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
SPEED_START {
raid_gen2_avx512bw(nd, size, v);
@ -433,8 +432,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2GFNI
if (raid_cpu_has_avx2gfni()) {
SPEED_START {
raid_gen2_avx2gfni(nd, size, v);
@ -443,8 +440,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512GFNI
if (raid_cpu_has_avx512gfni()) {
SPEED_START {
raid_gen2_avx512gfni(nd, size, v);
@ -479,7 +474,6 @@ void speed(int period, int nd, int size)
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
SPEED_START {
raid_genz_sse2(nd, size, v);
@ -497,26 +491,23 @@ void speed(int period, int nd, int size)
fflush(stdout);
#endif
}
#endif
printf("%8s", "");
if (raid_cpu_has_ssse3()) {
printf("%8s", "");
#ifdef CONFIG_X86_64
printf("%8s", "");
printf("%8s", "");
#endif
printf("%8s", "");
#ifdef CONFIG_X86_64
#ifdef CONFIG_AVX2
}
if (raid_cpu_has_avx2()) {
printf("%8s", "");
#ifdef CONFIG_X86_64
SPEED_START {
raid_genz_avx2ext(nd, size, v);
} SPEED_STOP
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#endif
}
#endif
#endif
#endif
printf("\n");
@ -543,10 +534,6 @@ void speed(int period, int nd, int size)
printf("%8s", "");
#endif
}
#endif
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
raid_gen3_ssse3(nd, size, v);
@ -564,22 +551,18 @@ void speed(int period, int nd, int size)
fflush(stdout);
#endif
}
#endif
printf("%8s", "");
#ifdef CONFIG_X86_64
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
printf("%8s", "");
#ifdef CONFIG_X86_64
SPEED_START {
raid_gen3_avx2ext(nd, size, v);
} SPEED_STOP
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512BW
}
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
SPEED_START {
raid_gen3_avx512bw(nd, size, v);
@ -588,8 +571,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2GFNI
if (raid_cpu_has_avx2gfni()) {
SPEED_START {
raid_gen3_avx2gfni(nd, size, v);
@ -598,8 +579,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512GFNI
if (raid_cpu_has_avx512gfni()) {
SPEED_START {
raid_gen3_avx512gfni(nd, size, v);
@ -609,7 +588,6 @@ void speed(int period, int nd, int size)
fflush(stdout);
}
#endif
#endif
#endif
printf("\n");
@ -629,7 +607,6 @@ void speed(int period, int nd, int size)
printf("%8s", "");
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
printf("%8s", "");
@ -637,11 +614,6 @@ void speed(int period, int nd, int size)
printf("%8s", "");
#endif
}
#endif
#endif
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
raid_gen4_ssse3(nd, size, v);
@ -659,22 +631,18 @@ void speed(int period, int nd, int size)
fflush(stdout);
#endif
}
#endif
printf("%8s", "");
#ifdef CONFIG_X86_64
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
printf("%8s", "");
#ifdef CONFIG_X86_64
SPEED_START {
raid_gen4_avx2ext(nd, size, v);
} SPEED_STOP
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512BW
}
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
SPEED_START {
raid_gen4_avx512bw(nd, size, v);
@ -683,8 +651,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2GFNI
if (raid_cpu_has_avx2gfni()) {
SPEED_START {
raid_gen4_avx2gfni(nd, size, v);
@ -693,8 +659,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512GFNI
if (raid_cpu_has_avx512gfni()) {
SPEED_START {
raid_gen4_avx512gfni(nd, size, v);
@ -704,7 +668,6 @@ void speed(int period, int nd, int size)
fflush(stdout);
}
#endif
#endif
#endif
printf("\n");
@ -724,19 +687,12 @@ void speed(int period, int nd, int size)
printf("%8s", "");
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
printf("%8s", "");
#ifdef CONFIG_X86_64
printf("%8s", "");
#endif
}
#endif
#endif
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
raid_gen5_ssse3(nd, size, v);
@ -754,22 +710,18 @@ void speed(int period, int nd, int size)
fflush(stdout);
#endif
}
#endif
printf("%8s", "");
#ifdef CONFIG_X86_64
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
printf("%8s", "");
#ifdef CONFIG_X86_64
SPEED_START {
raid_gen5_avx2ext(nd, size, v);
} SPEED_STOP
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512BW
}
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
SPEED_START {
raid_gen5_avx512bw(nd, size, v);
@ -778,8 +730,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2GFNI
if (raid_cpu_has_avx2gfni()) {
SPEED_START {
raid_gen5_avx2gfni(nd, size, v);
@ -788,8 +738,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512GFNI
if (raid_cpu_has_avx512gfni()) {
SPEED_START {
raid_gen5_avx512gfni(nd, size, v);
@ -799,7 +747,6 @@ void speed(int period, int nd, int size)
fflush(stdout);
}
#endif
#endif
#endif
printf("\n");
@ -819,19 +766,12 @@ void speed(int period, int nd, int size)
printf("%8s", "");
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
printf("%8s", "");
#ifdef CONFIG_X86_64
printf("%8s", "");
#endif
}
#endif
#endif
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
raid_gen6_ssse3(nd, size, v);
@ -849,22 +789,18 @@ void speed(int period, int nd, int size)
fflush(stdout);
#endif
}
#endif
printf("%8s", "");
#ifdef CONFIG_X86_64
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
printf("%8s", "");
#ifdef CONFIG_X86_64
SPEED_START {
raid_gen6_avx2ext(nd, size, v);
} SPEED_STOP
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512BW
}
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
SPEED_START {
raid_gen6_avx512bw(nd, size, v);
@ -873,8 +809,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2GFNI
if (raid_cpu_has_avx2gfni()) {
SPEED_START {
raid_gen6_avx2gfni(nd, size, v);
@ -883,8 +817,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512GFNI
if (raid_cpu_has_avx512gfni()) {
SPEED_START {
raid_gen6_avx512gfni(nd, size, v);
@ -894,7 +826,6 @@ void speed(int period, int nd, int size)
fflush(stdout);
}
#endif
#endif
#endif
printf("\n");
printf("\n");
@ -905,18 +836,17 @@ void speed(int period, int nd, int size)
printf("%8s", "best");
printf("%8s", "int8");
#ifdef CONFIG_X86
printf("%8s", "ssse3");
printf("%8s", "avx2");
if (raid_cpu_has_ssse3())
printf("%8s", "ssse3");
if (raid_cpu_has_avx2())
printf("%8s", "avx2");
#ifdef CONFIG_X86_64
#ifdef CONFIG_AVX512BW
printf("%8s", "avx512");
#endif
#ifdef CONFIG_AVX2GFNI
printf("%8s", "gfni");
#endif
#ifdef CONFIG_AVX512GFNI
printf("%8s", "gfni512");
#endif
if (raid_cpu_has_avx512bw())
printf("%8s", "avx512");
if (raid_cpu_has_avx2gfni())
printf("%8s", "gfni");
if (raid_cpu_has_avx512gfni())
printf("%8s", "gfni512");
#endif
#endif
printf("\n");
@ -936,7 +866,6 @@ void speed(int period, int nd, int size)
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -948,8 +877,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -961,8 +888,7 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512BW
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -974,8 +900,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2GFNI
if (raid_cpu_has_avx2gfni()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -987,8 +911,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512GFNI
if (raid_cpu_has_avx512gfni()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -1019,7 +941,6 @@ void speed(int period, int nd, int size)
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -1035,8 +956,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -1048,8 +967,7 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512BW
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -1061,8 +979,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2GFNI
if (raid_cpu_has_avx2gfni()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -1074,8 +990,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512GFNI
if (raid_cpu_has_avx512gfni()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -1105,7 +1019,6 @@ void speed(int period, int nd, int size)
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -1120,8 +1033,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -1136,8 +1047,7 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512BW
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -1149,8 +1059,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2GFNI
if (raid_cpu_has_avx2gfni()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -1161,8 +1069,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512GFNI
if (raid_cpu_has_avx512gfni()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -1191,7 +1097,6 @@ void speed(int period, int nd, int size)
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -1207,8 +1112,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -1223,8 +1126,7 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512BW
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -1236,8 +1138,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2GFNI
if (raid_cpu_has_avx2gfni()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -1248,8 +1148,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512GFNI
if (raid_cpu_has_avx512gfni()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -1278,7 +1176,6 @@ void speed(int period, int nd, int size)
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -1293,8 +1190,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -1309,8 +1204,7 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512BW
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -1322,8 +1216,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2GFNI
if (raid_cpu_has_avx2gfni()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -1334,8 +1226,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512GFNI
if (raid_cpu_has_avx512gfni()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -1364,7 +1254,6 @@ void speed(int period, int nd, int size)
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -1379,8 +1268,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -1395,8 +1282,7 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512BW
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -1408,8 +1294,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2GFNI
if (raid_cpu_has_avx2gfni()) {
SPEED_START {
/* ensure to use same hardware in the delta step */
@ -1420,8 +1304,6 @@ void speed(int period, int nd, int size)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512GFNI
if (raid_cpu_has_avx512gfni()) {
SPEED_START {
/* ensure to use same hardware in the delta step */

6
cmdline/util.c
View file

@ -398,7 +398,7 @@ uint32_t CRC32C_3[256] = {
0x4a21617b, 0x9764cbc3, 0xf54642fa, 0x2803e842
};
#if HAVE_SSE42
#if CONFIG_X86
int crc_x86;
#endif
@ -413,7 +413,7 @@ uint32_t crc32c_gen(uint32_t crc, const unsigned char* ptr, unsigned size)
return crc;
}
#if HAVE_SSE42
#if CONFIG_X86
uint32_t crc32c_x86(uint32_t crc, const unsigned char* ptr, unsigned size)
{
crc ^= CRC_IV;
@ -431,7 +431,7 @@ uint32_t (*crc32c)(uint32_t crc, const unsigned char* ptr, unsigned size);
void crc32c_init(void)
{
crc32c = crc32c_gen;
#if HAVE_SSE42
#if CONFIG_X86
if (raid_cpu_has_crc32()) {
crc_x86 = 1;
crc32c = crc32c_x86;

8
cmdline/util.h
View file

@ -62,7 +62,7 @@ extern uint32_t CRC32C_3[256];
/**
* If the CPU support the CRC instructions.
*/
#if HAVE_SSE42
#if CONFIG_X86
extern int crc_x86;
#endif
@ -71,7 +71,7 @@ extern int crc_x86;
*/
static inline uint32_t crc32c_plain_char(uint32_t crc, unsigned char c)
{
#if HAVE_SSE42
#if CONFIG_X86
if (tommy_likely(crc_x86)) {
asm ("crc32b %1, %0\n" : "+r" (crc) : "m" (c));
return crc;
@ -104,7 +104,7 @@ static inline uint32_t crc32c_gen_plain(uint32_t crc, const unsigned char* ptr,
/**
* Compute the CRC-32 (Castagnoli) without the IV.
*/
#if HAVE_SSE42
#if CONFIG_X86
static inline uint32_t crc32c_x86_plain(uint32_t crc, const unsigned char* ptr, unsigned size)
{
#ifdef CONFIG_X86_64
@ -137,7 +137,7 @@ static inline uint32_t crc32c_x86_plain(uint32_t crc, const unsigned char* ptr,
*/
static inline uint32_t crc32c_plain(uint32_t crc, const unsigned char* ptr, unsigned size)
{
#if HAVE_SSE42
#if CONFIG_X86
if (tommy_likely(crc_x86)) {
return crc32c_x86_plain(crc, ptr, size);
}

123
configure.ac
View file

@ -214,126 +214,9 @@ AC_CHECK_CC_OPT([-Wno-zero-length-bounds], CFLAGS="$CFLAGS -Wno-zero-length-boun
dnl Checks for asm
AC_ARG_ENABLE([asm],
AS_HELP_STRING([--disable-asm], [Disable inline assembly]))
AS_IF([test "x$enable_asm" != "xno"],
[AC_DEFINE([HAVE_ASSEMBLY], [1], [Define to 1 if inline assembly should be used.])]
dnl AS_IF(HAVE_ASSEMBLY) NOT closed here
dnl Checks for AS supporting the SSE2 instructions.
AC_MSG_CHECKING([for sse2])
asmsse2=no
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
#if defined(__i386__) || defined(__x86_64__)
void f(void)
{
asm volatile("pxor %xmm0,%xmm1");
}
#else
#error not x86
#endif
]])],
[AC_DEFINE([HAVE_SSE2], [1], [Define to 1 if sse2 is supported by the assembler.]) asmsse2=yes])
AC_MSG_RESULT([$asmsse2])
dnl Checks for AS supporting the SSSE3 instructions.
AC_MSG_CHECKING([for ssse3])
asmssse3=no
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
#if defined(__i386__) || defined(__x86_64__)
void f(void)
{
asm volatile("pshufb %xmm0,%xmm1");
}
#else
#error not x86
#endif
]])],
[AC_DEFINE([HAVE_SSSE3], [1], [Define to 1 if ssse3 is supported by the assembler.]) asmssse3=yes])
AC_MSG_RESULT([$asmssse3])
dnl Checks for AS supporting the SSE4.2 instructions.
AC_MSG_CHECKING([for sse42])
asmsse42=no
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
#if defined(__i386__) || defined(__x86_64__)
unsigned f(unsigned crc, unsigned char b)
{
asm volatile("crc32b %1, %0" : "+r" (crc) : "rm" (b));
return crc;
}
#else
#error not x86
#endif
]])],
[AC_DEFINE([HAVE_SSE42], [1], [Define to 1 if sse4.2 is supported by the assembler.]) asmsse42=yes])
AC_MSG_RESULT([$asmsse42])
dnl Checks for AS supporting the AVX2 instructions.
AC_MSG_CHECKING([for avx2])
asmavx2=no
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
#if defined(__i386__) || defined(__x86_64__)
void f(void* ptr)
{
asm volatile("vbroadcasti128 %0, %%ymm0" : : "m" (ptr));
}
#else
#error not x86
#endif
]])],
[AC_DEFINE([HAVE_AVX2], [1], [Define to 1 if avx2 is supported by the assembler.]) asmavx2=yes])
AC_MSG_RESULT([$asmavx2])
dnl Checks for AS supporting the AVX2FFNI instructions.
AC_MSG_CHECKING([for avx2gfni])
asmavx2gfni=no
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
#if defined(__x86_64__)
void f(void* ptr)
{
asm volatile ("vgf2p8mulb %0, %%ymm2, %%ymm2" : : "m" (ptr));
}
#else
#error not x86
#endif
]])],
[AC_DEFINE([HAVE_AVX2GFNI], [1], [Define to 1 if avx2gfni is supported by the assembler.]) asmavx2gfni=yes])
AC_MSG_RESULT([$asmavx2gfni])
dnl Checks for AS supporting the AVX512BW instructions.
AC_MSG_CHECKING([for avx512bw])
asmavx512bw=no
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
#if defined(__x86_64__)
void f(void* ptr)
{
asm volatile("vpshufb %0, %%zmm0, %%zmm1" : : "m" (ptr));
}
#else
#error not x86
#endif
]])],
[AC_DEFINE([HAVE_AVX512BW], [1], [Define to 1 if avx512bw is supported by the assembler.]) asmavx512bw=yes])
AC_MSG_RESULT([$asmavx512bw])
dnl Checks for AS supporting the AVX512GFNI instructions.
AC_MSG_CHECKING([for avx512gfni])
asmavx512gfni=no
AC_COMPILE_IFELSE([AC_LANG_PROGRAM([[
#if defined(__x86_64__)
void f(void* ptr)
{
asm volatile ("vgf2p8mulb %0, %%zmm2, %%zmm2" : : "m" (ptr));
}
#else
#error not x86
#endif
]])],
[AC_DEFINE([HAVE_AVX512GFNI], [1], [Define to 1 if avx512gfni is supported by the assembler.]) asmavx512gfni=yes])
AC_MSG_RESULT([$asmavx512gfni])
dnl AS_IF(HAVE_ASSEMBLY) closed here
)
AS_IF([test "x$enable_asm" != "xno"], [
AC_DEFINE([HAVE_ASSEMBLY], [1], [Define to 1 if inline assembly should be used.])
])
dnl Checks for test environment
AS_CASE([$host],

44
raid/gfni.c
View file

@ -5,7 +5,8 @@
#include "gf.h"
#include "cpu.h"
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX2GFNI)
#ifdef CONFIG_X86_64
/*
* GEN2 (RAID6 with powers of 2) AVX2 GFNI implementation
*/
@ -47,9 +48,7 @@ void raid_gen2_avx2gfni(int nd, size_t size, void **vv)
raid_avx_end();
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX512GFNI)
/*
* GEN2 (RAID6 with powers of 2) GFNI implementation
*/
@ -83,9 +82,7 @@ void raid_gen2_avx512gfni(int nd, size_t size, void **vv)
raid_avx_end();
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX2GFNI)
/*
* GEN3 (triple parity with Cauchy matrix) AVX2 GFNI implementation
*/
@ -164,9 +161,7 @@ void raid_gen3_avx2gfni(int nd, size_t size, void **vv)
raid_avx_end();
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX512GFNI)
/*
* GEN3 (triple parity with Cauchy matrix) GFNI implementation
*/
@ -227,9 +222,7 @@ void raid_gen3_avx512gfni(int nd, size_t size, void **vv)
raid_avx_end();
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX2GFNI)
/*
* GEN4 (quad parity with Cauchy matrix) AVX2 GFNI implementation
*/
@ -322,9 +315,7 @@ void raid_gen4_avx2gfni(int nd, size_t size, void **vv)
raid_avx_end();
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX512GFNI)
/*
* GEN4 (quad parity with Cauchy matrix) GFNI implementation
*/
@ -393,9 +384,7 @@ void raid_gen4_avx512gfni(int nd, size_t size, void **vv)
raid_avx_end();
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX2GFNI)
/*
* GEN5 (penta parity with Cauchy matrix) AVX2 GFNI implementation
*/
@ -504,9 +493,7 @@ void raid_gen5_avx2gfni(int nd, size_t size, void **vv)
raid_avx_end();
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX512GFNI)
/*
* GEN5 (penta parity with Cauchy matrix) GFNI implementation
*/
@ -583,9 +570,7 @@ void raid_gen5_avx512gfni(int nd, size_t size, void **vv)
raid_avx_end();
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX2GFNI)
/*
* GEN6 (hexa parity with Cauchy matrix) AVX2 GFNI implementation
*/
@ -709,9 +694,7 @@ void raid_gen6_avx2gfni(int nd, size_t size, void **vv)
raid_avx_end();
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX512GFNI)
/*
* GEN6 (hexa parity with Cauchy matrix) GFNI implementation
*/
@ -796,9 +779,7 @@ void raid_gen6_avx512gfni(int nd, size_t size, void **vv)
raid_avx_end();
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX2GFNI)
/*
* RAID recovering for one disk AVX2 GFNI implementation
*/
@ -847,9 +828,7 @@ void raid_rec1_avx2gfni(int nr, int *id, int *ip, int nd, size_t size, void **vv
raid_avx_end();
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX512GFNI)
/*
* RAID recovering for one disk GFNI implementation
*/
@ -889,9 +868,7 @@ void raid_rec1_avx512gfni(int nr, int *id, int *ip, int nd, size_t size, void **
raid_avx_end();
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX2GFNI)
/*
* RAID recovering for two disks AVX2 GFNI implementation
*/
@ -968,9 +945,7 @@ void raid_rec2_avx2gfni(int nr, int *id, int *ip, int nd, size_t size, void **vv
raid_avx_end();
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX512GFNI)
/*
* RAID recovering for two disks GFNI implementation
*/
@ -1034,9 +1009,7 @@ void raid_rec2_avx512gfni(int nr, int *id, int *ip, int nd, size_t size, void **
raid_avx_end();
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX2GFNI)
/*
* RAID recovering AVX2 GFNI implementation
*/
@ -1106,9 +1079,7 @@ void raid_recX_avx2gfni(int nr, int *id, int *ip, int nd, size_t size, void **vv
raid_avx_end();
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX512GFNI)
/*
* RAID recovering GFNI implementation
*/
@ -1163,13 +1134,10 @@ void raid_recX_avx512gfni(int nr, int *id, int *ip, int nd, size_t size, void **
raid_avx_end();
}
#endif
void raid_register_avx2gfni(void)
{
#ifdef USE_RAID_AES
#ifdef CONFIG_AVX2GFNI
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx2gfni()) {
raid_gen_register(RAID_ALGO_CAUCHY_PAR2, "gfni", raid_gen2_avx2gfni);
raid_gen_register(RAID_ALGO_CAUCHY_PAR3, "gfni", raid_gen3_avx2gfni);
@ -1185,15 +1153,11 @@ void raid_register_avx2gfni(void)
raid_rec_register(RAID_ALGO_CAUCHY_PAR6, "gfni", raid_recX_avx2gfni);
}
#endif
#endif
#endif
}
void raid_register_avx512gfni(void)
{
#ifdef USE_RAID_AES
#ifdef CONFIG_AVX512GFNI
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512gfni()) {
if (!raid_cpu_has_slow_avx512()) {
raid_gen_register(RAID_ALGO_CAUCHY_PAR2, "gfni512", raid_gen2_avx512gfni);
@ -1211,6 +1175,6 @@ void raid_register_avx512gfni(void)
}
}
#endif
#endif
#endif
}
#endif /* CONFIG_X86_64 */

81
raid/internal.h
View file

@ -4,22 +4,15 @@
#ifndef __RAID_INTERNAL_H
#define __RAID_INTERNAL_H
/*
* Supported instruction sets.
*
* It may happen that the assembler is too old to support
* all instructions, even if the architecture supports them.
* These defines allow to exclude from the build the unsupported ones.
*
* If in your project you use a predefined assembler, you can define them
* using fixed values, instead of using the HAVE_* defines.
*/
#if HAVE_CONFIG_H
/* Includes the project configuration for HAVE_* defines */
#include "config.h"
#else
/* Assume that assembly is always supported */
#define HAVE_ASSEMBLY 1
#endif
/* If the compiler supports assembly */
/* If the platforms supports assembly */
#if HAVE_ASSEMBLY
/* Autodetect from the compiler */
#if defined(__i386__)
@ -32,52 +25,6 @@
#endif
#endif
/* Enables SSE2, SSSE3, AVX2, AVX512BW, GFNI only if the assembler supports it */
#if HAVE_SSE2
#define CONFIG_SSE2 1
#endif
#if HAVE_SSSE3
#define CONFIG_SSSE3 1
#endif
#if HAVE_AVX2
#define CONFIG_AVX2 1
#endif
#if HAVE_AVX512BW
#define CONFIG_AVX512BW 1
#endif
#if HAVE_AVX512GFNI
#define CONFIG_AVX512GFNI 1
#endif
#if HAVE_AVX2GFNI
#define CONFIG_AVX2GFNI 1
#endif
#else /* if HAVE_CONFIG_H is not defined */
/* Assume that assembly is always supported */
#if defined(__i386__)
#define CONFIG_X86 1
#define CONFIG_X86_32 1
#endif
#if defined(__x86_64__)
#define CONFIG_X86 1
#define CONFIG_X86_64 1
#endif
/* Assumes that the assembler supports everything */
#ifdef CONFIG_X86
#define CONFIG_SSE2 1
#define CONFIG_SSSE3 1
#define CONFIG_AVX2 1
#endif
#ifdef CONFIG_X86_64
#define CONFIG_AVX512BW 1
#define CONFIG_AVX512GFNI 1
#define CONFIG_AVX2GFNI 1
#endif
#endif
/*
* Includes anything required for compatibility.
*/
@ -344,7 +291,6 @@ extern const uint8_t (*raid_gfgen)[256];
* Assembler blocks.
*/
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
static __always_inline void raid_sse_begin(void)
{
}
@ -363,10 +309,16 @@ static __always_inline void raid_sse_end(void)
* Clobbers registers used in the asm code
* this is required because in the Windows ABI,
* registers xmm6-xmm15 should be kept by the callee.
* this clobber list force the compiler to save any
* register that needs to be saved
* we check for __SSE2_ because we require that the
* compiler supports SSE2 registers in the clobber list
*
* This clobber list forces the compiler to save any
* register that needs to be saved.
*
* We check for __SSE2__ because we require that the
* compiler supports SSE2 registers in the clobber list.
* If the compiler doesn't support SSE2 registers, we can
* clobber them freely.
*
* Registers ymm and zmm don't have this requirement.
*/
#ifdef __SSE2__
asm volatile ("" : : : "%xmm0", "%xmm1", "%xmm2", "%xmm3");
@ -377,9 +329,7 @@ static __always_inline void raid_sse_end(void)
#endif
#endif
}
#endif
#ifdef CONFIG_AVX2
static __always_inline void raid_avx_begin(void)
{
raid_sse_begin();
@ -396,7 +346,6 @@ static __always_inline void raid_avx_end(void)
*/
asm volatile ("vzeroupper" : : : "memory");
}
#endif
#endif /* CONFIG_X86 */
#endif

6
raid/module.c
View file

@ -244,13 +244,11 @@ void raid_rec_register(int na, const char *tag, raid_rec_fn *rec)
void raid_init(void)
{
raid_register_int();
#if defined(CONFIG_X86) && defined(CONFIG_SSE2)
#ifdef CONFIG_X86
raid_register_x86();
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX2GFNI)
#ifdef CONFIG_X86_64
raid_register_avx2gfni();
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX512GFNI)
raid_register_avx512gfni();
#endif

72
raid/test.c
View file

@ -202,86 +202,56 @@ int raid_test_rec(int mode, int nd, size_t size)
if (i == 1) {
test_setup(i) = raid_rec1_int8;
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3())
test_setup(i) = raid_rec1_ssse3;
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2())
test_setup(i) = raid_rec1_avx2;
#endif
#endif
#ifdef CONFIG_X86_64
#ifdef CONFIG_AVX512BW
if (raid_cpu_has_avx512bw())
test_setup(i) = raid_rec1_avx512bw;
#endif
#endif
#ifdef USE_RAID_AES
#ifdef CONFIG_AVX2GFNI
if (raid_cpu_has_avx2gfni())
test_setup(i) = raid_rec1_avx2gfni;
#endif
#ifdef CONFIG_AVX512GFNI
if (raid_cpu_has_avx512gfni())
test_setup(i) = raid_rec1_avx512gfni;
#endif
#endif
#endif
} else if (i == 2) {
test_setup(i) = raid_rec2_int8;
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3())
test_setup(i) = raid_rec2_ssse3;
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2())
test_setup(i) = raid_rec2_avx2;
#endif
#endif
#ifdef CONFIG_X86_64
#ifdef CONFIG_AVX512BW
if (raid_cpu_has_avx512bw())
test_setup(i) = raid_rec2_avx512bw;
#endif
#endif
#ifdef USE_RAID_AES
#ifdef CONFIG_AVX2GFNI
if (raid_cpu_has_avx2gfni())
test_setup(i) = raid_rec2_avx2gfni;
#endif
#ifdef CONFIG_AVX512GFNI
if (raid_cpu_has_avx512gfni())
test_setup(i) = raid_rec2_avx512gfni;
#endif
#endif
#endif
} else {
test_setup(i) = raid_recX_int8;
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3())
test_setup(i) = raid_recX_ssse3;
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2())
test_setup(i) = raid_recX_avx2;
#endif
#endif
#ifdef CONFIG_X86_64
#ifdef CONFIG_AVX512BW
if (raid_cpu_has_avx512bw())
test_setup(i) = raid_recX_avx512bw;
#endif
#endif
#ifdef USE_RAID_AES
#ifdef CONFIG_AVX2GFNI
if (raid_cpu_has_avx2gfni())
test_setup(i) = raid_recX_avx2gfni;
#endif
#ifdef CONFIG_AVX512GFNI
if (raid_cpu_has_avx512gfni())
test_setup(i) = raid_recX_avx512gfni;
#endif
#endif
#endif
}
}
@ -401,7 +371,6 @@ int raid_test_par(int mode, int nd, size_t size)
test_setup(2) = raid_gen2_int64;
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
test_setup(1) = raid_gen1_sse2;
test_setup(2) = raid_gen2_sse2;
@ -409,36 +378,25 @@ int raid_test_par(int mode, int nd, size_t size)
test_setup(2) = raid_gen2_sse2ext;
#endif
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
test_setup(1) = raid_gen1_avx2;
test_setup(2) = raid_gen2_avx2;
}
#endif
#ifdef CONFIG_AVX512BW
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
test_setup(1) = raid_gen1_avx512bw;
test_setup(2) = raid_gen2_avx512bw;
}
#endif
#endif
#ifdef USE_RAID_AES
#ifdef CONFIG_AVX2GFNI
if (raid_cpu_has_avx2gfni()) {
test_setup(2) = raid_gen2_avx2gfni;
}
#endif
#ifdef CONFIG_AVX512GFNI
if (raid_cpu_has_avx512gfni()) {
test_setup(2) = raid_gen2_avx512gfni;
}
#endif
#endif
#endif /* CONFIG_X86 */
#endif
if (mode == RAID_MODE_CAUCHY) {
test_setup(3) = raid_gen3_int8;
@ -447,7 +405,6 @@ int raid_test_par(int mode, int nd, size_t size)
test_setup(6) = raid_gen6_int8;
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
test_setup(3) = raid_gen3_ssse3;
test_setup(4) = raid_gen4_ssse3;
@ -460,9 +417,6 @@ int raid_test_par(int mode, int nd, size_t size)
test_setup(6) = raid_gen6_ssse3ext;
#endif
}
#endif
#ifdef CONFIG_AVX2
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx2()) {
test_setup(3) = raid_gen3_avx2ext;
@ -470,29 +424,19 @@ int raid_test_par(int mode, int nd, size_t size)
test_setup(5) = raid_gen5_avx2ext;
test_setup(6) = raid_gen6_avx2ext;
}
#endif
#endif
#ifdef CONFIG_AVX512BW
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
test_setup(3) = raid_gen3_avx512bw;
test_setup(4) = raid_gen4_avx512bw;
test_setup(5) = raid_gen5_avx512bw;
test_setup(6) = raid_gen6_avx512bw;
}
#endif
#endif
#ifdef USE_RAID_AES
#ifdef CONFIG_AVX2GFNI
if (raid_cpu_has_avx2gfni()) {
test_setup(3) = raid_gen3_avx2gfni;
test_setup(4) = raid_gen4_avx2gfni;
test_setup(5) = raid_gen5_avx2gfni;
test_setup(6) = raid_gen6_avx2gfni;
}
#endif
#ifdef CONFIG_AVX512GFNI
if (raid_cpu_has_avx512gfni()) {
test_setup(3) = raid_gen3_avx512gfni;
test_setup(4) = raid_gen4_avx512gfni;
@ -501,29 +445,23 @@ int raid_test_par(int mode, int nd, size_t size)
}
#endif
#endif
#endif /* CONFIG_X86 */
#endif
} else {
test_setup(3) = raid_genz_int32;
test_setup(3) = raid_genz_int64;
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
test_setup(3) = raid_genz_sse2;
#ifdef CONFIG_X86_64
test_setup(3) = raid_genz_sse2ext;
#endif
}
#endif
#ifdef CONFIG_AVX2
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx2())
test_setup(3) = raid_genz_avx2ext;
#endif
#endif
#endif /* CONFIG_X86 */
}
/* check all the functions */

3
raid/test/fulltest.c
View file

@ -37,6 +37,7 @@ int main(void)
printf("Including x86 SSSE3\n");
if (raid_cpu_has_avx2())
printf("Including x86 AVX2\n");
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw())
printf("Including x86 AVX512BW\n");
if (raid_cpu_has_avx2gfni())
@ -52,8 +53,6 @@ int main(void)
printf("Excluding x86 AVX512GFNI due polynomial mismatch\n");
#endif
#endif
#ifdef CONFIG_X86_64
printf("Including x64 extended SSE register set\n");
#endif
printf("\nPlease wait about 60 seconds...\n\n");

293
raid/test/speedtest.c
View file

@ -126,26 +126,34 @@ void speed(void)
printf("%8s", "int32");
printf("%8s", "int64");
#ifdef CONFIG_X86
printf("%8s", "sse2");
if (raid_cpu_has_sse2()) {
printf("%8s", "sse2");
#ifdef CONFIG_X86_64
printf("%8s", "sse2e");
printf("%8s", "sse2e");
#endif
printf("%8s", "ssse3");
}
if (raid_cpu_has_ssse3()) {
printf("%8s", "ssse3");
#ifdef CONFIG_X86_64
printf("%8s", "ssse3e");
printf("%8s", "ssse3e");
#endif
printf("%8s", "avx2");
}
if (raid_cpu_has_avx2()) {
printf("%8s", "avx2");
#ifdef CONFIG_X86_64
printf("%8s", "avx2e");
#ifdef CONFIG_AVX512BW
printf("%8s", "avx512");
#endif
#ifdef CONFIG_AVX2GFNI
printf("%8s", "gfni");
#endif
#ifdef CONFIG_AVX512GFNI
printf("%8s", "gfni512");
printf("%8s", "avx2e");
#endif
}
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
printf("%8s", "avx512");
}
if (raid_cpu_has_avx2gfni()) {
printf("%8s", "gfni");
}
if (raid_cpu_has_avx512gfni()) {
printf("%8s", "gfni512");
}
#endif
#endif
printf("\n");
@ -172,7 +180,6 @@ void speed(void)
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
SPEED_START {
raid_gen1_sse2(nd, size, v);
@ -180,17 +187,16 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#ifdef CONFIG_X86_64
printf("%8s", "");
#endif
}
#endif
if (raid_cpu_has_ssse3()) {
printf("%8s", "");
#ifdef CONFIG_X86_64
printf("%8s", "");
printf("%8s", "");
#endif
printf("%8s", "");
#ifdef CONFIG_X86_64
printf("%8s", "");
#endif
#ifdef CONFIG_AVX2
}
if (raid_cpu_has_avx2()) {
SPEED_START {
raid_gen1_avx2(nd, size, v);
@ -198,12 +204,11 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_X86_64
printf("%8s", "");
printf("%8s", "");
#endif
#ifdef CONFIG_AVX512BW
}
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
SPEED_START {
raid_gen1_avx512bw(nd, size, v);
@ -238,7 +243,6 @@ void speed(void)
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
SPEED_START {
raid_gen2_sse2(nd, size, v);
@ -256,13 +260,12 @@ void speed(void)
fflush(stdout);
#endif
}
#endif
printf("%8s", "");
if (raid_cpu_has_ssse3()) {
printf("%8s", "");
#ifdef CONFIG_X86_64
printf("%8s", "");
printf("%8s", "");
#endif
#ifdef CONFIG_AVX2
}
if (raid_cpu_has_avx2()) {
SPEED_START {
raid_gen2_avx2(nd, size, v);
@ -270,12 +273,11 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_X86_64
printf("%8s", "");
printf("%8s", "");
#endif
#ifdef CONFIG_AVX512BW
}
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
SPEED_START {
raid_gen2_avx512bw(nd, size, v);
@ -284,8 +286,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2GFNI
if (raid_cpu_has_avx2gfni()) {
SPEED_START {
raid_gen2_avx2gfni(nd, size, v);
@ -294,8 +294,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512GFNI
if (raid_cpu_has_avx512gfni()) {
SPEED_START {
raid_gen2_avx512gfni(nd, size, v);
@ -330,7 +328,6 @@ void speed(void)
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
SPEED_START {
raid_genz_sse2(nd, size, v);
@ -348,27 +345,25 @@ void speed(void)
fflush(stdout);
#endif
}
#endif
printf("%8s", "");
if (raid_cpu_has_ssse3()) {
printf("%8s", "");
#ifdef CONFIG_X86_64
printf("%8s", "");
printf("%8s", "");
#endif
printf("%8s", "");
#ifdef CONFIG_X86_64
#ifdef CONFIG_AVX2
}
if (raid_cpu_has_avx2()) {
printf("%8s", "");
#ifdef CONFIG_X86_64
SPEED_START {
raid_genz_avx2ext(nd, size, v);
} SPEED_STOP
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#endif
}
#endif
#endif
#endif
printf("\n");
/* GEN3 */
@ -389,15 +384,10 @@ void speed(void)
#ifdef CONFIG_X86
if (raid_cpu_has_sse2()) {
printf("%8s", "");
#ifdef CONFIG_X86_64
printf("%8s", "");
#endif
}
#endif
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
raid_gen3_ssse3(nd, size, v);
@ -405,7 +395,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#ifdef CONFIG_X86_64
SPEED_START {
raid_gen3_ssse3ext(nd, size, v);
@ -415,22 +404,18 @@ void speed(void)
fflush(stdout);
#endif
}
#endif
printf("%8s", "");
#ifdef CONFIG_X86_64
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
printf("%8s", "");
#ifdef CONFIG_X86_64
SPEED_START {
raid_gen3_avx2ext(nd, size, v);
} SPEED_STOP
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512BW
}
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
SPEED_START {
raid_gen3_avx512bw(nd, size, v);
@ -439,8 +424,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2GFNI
if (raid_cpu_has_avx2gfni()) {
SPEED_START {
raid_gen3_avx2gfni(nd, size, v);
@ -449,8 +432,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512GFNI
if (raid_cpu_has_avx512gfni()) {
SPEED_START {
raid_gen3_avx512gfni(nd, size, v);
@ -460,7 +441,6 @@ void speed(void)
fflush(stdout);
}
#endif
#endif
#endif
printf("\n");
@ -480,19 +460,12 @@ void speed(void)
printf("%8s", "");
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
printf("%8s", "");
#ifdef CONFIG_X86_64
printf("%8s", "");
#endif
}
#endif
#endif
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
raid_gen4_ssse3(nd, size, v);
@ -500,7 +473,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#ifdef CONFIG_X86_64
SPEED_START {
raid_gen4_ssse3ext(nd, size, v);
@ -510,22 +482,18 @@ void speed(void)
fflush(stdout);
#endif
}
#endif
printf("%8s", "");
#ifdef CONFIG_X86_64
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
printf("%8s", "");
#ifdef CONFIG_X86_64
SPEED_START {
raid_gen4_avx2ext(nd, size, v);
} SPEED_STOP
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512BW
}
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
SPEED_START {
raid_gen4_avx512bw(nd, size, v);
@ -534,8 +502,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2GFNI
if (raid_cpu_has_avx2gfni()) {
SPEED_START {
raid_gen4_avx2gfni(nd, size, v);
@ -544,8 +510,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512GFNI
if (raid_cpu_has_avx512gfni()) {
SPEED_START {
raid_gen4_avx512gfni(nd, size, v);
@ -555,7 +519,6 @@ void speed(void)
fflush(stdout);
}
#endif
#endif
#endif
printf("\n");
@ -575,19 +538,12 @@ void speed(void)
printf("%8s", "");
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
printf("%8s", "");
#ifdef CONFIG_X86_64
printf("%8s", "");
#endif
}
#endif
#endif
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
raid_gen5_ssse3(nd, size, v);
@ -595,7 +551,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#ifdef CONFIG_X86_64
SPEED_START {
raid_gen5_ssse3ext(nd, size, v);
@ -605,22 +560,18 @@ void speed(void)
fflush(stdout);
#endif
}
#endif
printf("%8s", "");
#ifdef CONFIG_X86_64
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
printf("%8s", "");
#ifdef CONFIG_X86_64
SPEED_START {
raid_gen5_avx2ext(nd, size, v);
} SPEED_STOP
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512BW
}
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
SPEED_START {
raid_gen5_avx512bw(nd, size, v);
@ -629,8 +580,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2GFNI
if (raid_cpu_has_avx2gfni()) {
SPEED_START {
raid_gen5_avx2gfni(nd, size, v);
@ -639,8 +588,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512GFNI
if (raid_cpu_has_avx512gfni()) {
SPEED_START {
raid_gen5_avx512gfni(nd, size, v);
@ -650,7 +597,6 @@ void speed(void)
fflush(stdout);
}
#endif
#endif
#endif
printf("\n");
@ -670,19 +616,12 @@ void speed(void)
printf("%8s", "");
#ifdef CONFIG_X86
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
printf("%8s", "");
#ifdef CONFIG_X86_64
printf("%8s", "");
#endif
}
#endif
#endif
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
raid_gen6_ssse3(nd, size, v);
@ -690,7 +629,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
#ifdef CONFIG_X86_64
SPEED_START {
raid_gen6_ssse3ext(nd, size, v);
@ -700,22 +638,18 @@ void speed(void)
fflush(stdout);
#endif
}
#endif
printf("%8s", "");
#ifdef CONFIG_X86_64
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
printf("%8s", "");
#ifdef CONFIG_X86_64
SPEED_START {
raid_gen6_avx2ext(nd, size, v);
} SPEED_STOP
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512BW
}
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
SPEED_START {
raid_gen6_avx512bw(nd, size, v);
@ -724,8 +658,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2GFNI
if (raid_cpu_has_avx2gfni()) {
SPEED_START {
raid_gen6_avx2gfni(nd, size, v);
@ -734,8 +666,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512GFNI
if (raid_cpu_has_avx512gfni()) {
SPEED_START {
raid_gen6_avx512gfni(nd, size, v);
@ -745,7 +675,6 @@ void speed(void)
fflush(stdout);
}
#endif
#endif
#endif
printf("\n");
printf("\n");
@ -756,18 +685,17 @@ void speed(void)
printf("%8s", "best");
printf("%8s", "int8");
#ifdef CONFIG_X86
printf("%8s", "ssse3");
printf("%8s", "avx2");
if (raid_cpu_has_ssse3())
printf("%8s", "ssse3");
if (raid_cpu_has_avx2())
printf("%8s", "avx2");
#ifdef CONFIG_X86_64
#ifdef CONFIG_AVX512BW
printf("%8s", "avx512");
#endif
#ifdef CONFIG_AVX2GFNI
printf("%8s", "gfni");
#endif
#ifdef CONFIG_AVX512GFNI
printf("%8s", "gfni512");
#endif
if (raid_cpu_has_avx512bw())
printf("%8s", "avx512");
if (raid_cpu_has_avx2gfni())
printf("%8s", "gfni");
if (raid_cpu_has_avx512gfni())
printf("%8s", "gfni512");
#endif
#endif
printf("\n");
@ -786,7 +714,6 @@ void speed(void)
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
raid_gen_force(1, raid_gen1_sse2);
@ -797,8 +724,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
raid_gen_force(1, raid_gen1_avx2);
@ -809,9 +734,7 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#endif
#ifdef CONFIG_AVX512BW
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
SPEED_START {
raid_gen_force(1, raid_gen1_avx512bw);
@ -822,8 +745,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2GFNI
if (raid_cpu_has_avx2gfni()) {
SPEED_START {
raid_gen_force(1, raid_gen1_avx2);
@ -834,8 +755,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512GFNI
if (raid_cpu_has_avx512gfni()) {
SPEED_START {
raid_gen_force(1, raid_gen1_avx512bw); /* there is no raid_gen1_avx512gfni */
@ -846,6 +765,7 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#endif
printf("\n");
@ -863,7 +783,6 @@ void speed(void)
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
#ifdef CONFIG_X86_64
@ -878,8 +797,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
raid_gen_force(2, raid_gen2_avx2);
@ -890,9 +807,7 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#endif
#ifdef CONFIG_AVX512BW
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
SPEED_START {
raid_gen_force(2, raid_gen2_avx512bw);
@ -903,8 +818,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2GFNI
if (raid_cpu_has_avx2gfni()) {
SPEED_START {
raid_gen_force(2, raid_gen2_avx2gfni);
@ -915,8 +828,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512GFNI
if (raid_cpu_has_avx512gfni()) {
SPEED_START {
raid_gen_force(2, raid_gen2_avx512gfni);
@ -927,6 +838,7 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#endif
printf("\n");
@ -943,7 +855,6 @@ void speed(void)
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
#ifdef CONFIG_X86_64
@ -957,8 +868,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
raid_gen_force(3, raid_gen3_avx2ext);
@ -968,9 +877,7 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#endif
#ifdef CONFIG_AVX512BW
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
SPEED_START {
raid_gen_force(3, raid_gen3_avx512bw);
@ -980,8 +887,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2GFNI
if (raid_cpu_has_avx2gfni()) {
SPEED_START {
raid_gen_force(3, raid_gen3_avx2gfni);
@ -991,8 +896,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512GFNI
if (raid_cpu_has_avx512gfni()) {
SPEED_START {
raid_gen_force(3, raid_gen3_avx512gfni);
@ -1002,6 +905,7 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#endif
printf("\n");
@ -1018,7 +922,6 @@ void speed(void)
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
#ifdef CONFIG_X86_64
@ -1032,8 +935,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
#ifdef CONFIG_X86_64
@ -1047,9 +948,7 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#endif
#ifdef CONFIG_AVX512BW
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
SPEED_START {
raid_gen_force(4, raid_gen4_avx512bw);
@ -1059,8 +958,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2GFNI
if (raid_cpu_has_avx2gfni()) {
SPEED_START {
raid_gen_force(4, raid_gen4_avx2gfni);
@ -1070,8 +967,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512GFNI
if (raid_cpu_has_avx512gfni()) {
SPEED_START {
raid_gen_force(4, raid_gen4_avx512gfni);
@ -1081,6 +976,7 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#endif
printf("\n");
@ -1097,7 +993,6 @@ void speed(void)
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
#ifdef CONFIG_X86_64
@ -1111,8 +1006,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
#ifdef CONFIG_X86_64
@ -1126,9 +1019,7 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#endif
#ifdef CONFIG_AVX512BW
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
SPEED_START {
raid_gen_force(5, raid_gen5_avx512bw);
@ -1138,8 +1029,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2GFNI
if (raid_cpu_has_avx2gfni()) {
SPEED_START {
raid_gen_force(5, raid_gen5_avx2gfni);
@ -1149,8 +1038,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512GFNI
if (raid_cpu_has_avx512gfni()) {
SPEED_START {
raid_gen_force(5, raid_gen5_avx512gfni);
@ -1160,6 +1047,7 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#endif
printf("\n");
@ -1176,7 +1064,6 @@ void speed(void)
fflush(stdout);
#ifdef CONFIG_X86
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
SPEED_START {
#ifdef CONFIG_X86_64
@ -1190,8 +1077,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
SPEED_START {
#ifdef CONFIG_X86_64
@ -1205,9 +1090,7 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#endif
#ifdef CONFIG_AVX512BW
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
SPEED_START {
raid_gen_force(6, raid_gen6_avx512bw);
@ -1217,8 +1100,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX2GFNI
if (raid_cpu_has_avx2gfni()) {
SPEED_START {
raid_gen_force(6, raid_gen6_avx2gfni);
@ -1228,8 +1109,6 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#ifdef CONFIG_AVX512GFNI
if (raid_cpu_has_avx512gfni()) {
SPEED_START {
raid_gen_force(6, raid_gen6_avx512gfni);
@ -1239,6 +1118,7 @@ void speed(void)
printf("%8" PRIu64, ds / dt);
fflush(stdout);
}
#endif
#endif
printf("\n");
printf("\n");
@ -1274,9 +1154,6 @@ int main(void)
#else
printf("Including x86 AVX512GFNI (Performance reference only. Polynomial mismatch prevents use)\n");
#endif
#endif
#ifdef CONFIG_X86_64
printf("Including x64 extended SSE register set\n");
#endif
printf("\nPlease wait about 30 seconds...\n\n");

80
raid/x86.c
View file

@ -5,6 +5,8 @@
#include "gf.h"
#include "cpu.h"
#ifdef CONFIG_X86
/* ================================================================
* Optimizations notes
* ================================================================
@ -118,7 +120,6 @@
* Q = Q ^ D_0;
*/
#if defined(CONFIG_X86) && defined(CONFIG_SSE2)
/*
* GEN1 (RAID5 with xor) SSE2 implementation
*/
@ -153,9 +154,7 @@ void raid_gen1_sse2(int nd, size_t size, void **vv)
raid_sse_end();
}
#endif
#if defined(CONFIG_X86) && defined(CONFIG_AVX2)
/*
* GEN1 (RAID5 with xor) AVX2 implementation
*/
@ -184,9 +183,8 @@ void raid_gen1_avx2(int nd, size_t size, void **vv)
raid_avx_end();
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX512BW)
#ifdef CONFIG_X86_64
/*
* GEN1 (RAID5 with xor) AVX512BW implementation
*
@ -229,7 +227,6 @@ void raid_gen1_avx512bw(int nd, size_t size, void **vv)
}
#endif
#if defined(CONFIG_X86) && defined(CONFIG_SSE2)
static const struct gfconst16 {
uint8_t poly[16];
uint8_t low4[16];
@ -243,9 +240,7 @@ static const struct gfconst16 {
0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f
},
};
#endif
#if defined(CONFIG_X86) && defined(CONFIG_SSE2)
/*
* GEN2 (RAID6 with powers of 2) SSE2 implementation
*/
@ -299,9 +294,7 @@ void raid_gen2_sse2(int nd, size_t size, void **vv)
raid_sse_end();
}
#endif
#if defined(CONFIG_X86) && defined(CONFIG_AVX2)
/*
* GEN2 (RAID6 with powers of 2) AVX2 implementation
*/
@ -353,9 +346,8 @@ void raid_gen2_avx2(int nd, size_t size, void **vv)
raid_avx_end();
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX512BW)
#ifdef CONFIG_X86_64
/*
* GEN2 (RAID6 with powers of 2) AVX512BW implementation
*/
@ -399,7 +391,7 @@ void raid_gen2_avx512bw(int nd, size_t size, void **vv)
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_SSE2)
#ifdef CONFIG_X86_64
/*
* GEN2 (RAID6 with powers of 2) SSE2 implementation
*
@ -480,7 +472,6 @@ void raid_gen2_sse2ext(int nd, size_t size, void **vv)
}
#endif
#if defined(CONFIG_X86) && defined(CONFIG_SSSE3)
/*
* GEN3 (triple parity with Cauchy matrix) SSSE3 implementation
*/
@ -575,9 +566,8 @@ void raid_gen3_ssse3(int nd, size_t size, void **vv)
raid_sse_end();
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_SSSE3)
#ifdef CONFIG_X86_64
/*
* GEN3 (triple parity with Cauchy matrix) SSSE3 implementation
*
@ -718,7 +708,7 @@ void raid_gen3_ssse3ext(int nd, size_t size, void **vv)
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX2)
#ifdef CONFIG_X86_64
/*
* GEN3 (triple parity with Cauchy matrix) AVX2 implementation
*
@ -851,7 +841,7 @@ void raid_gen3_avx2ext(int nd, size_t size, void **vv)
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX512BW)
#ifdef CONFIG_X86_64
/*
* GEN3 (triple parity with Cauchy matrix) AVX512BW implementation
*/
@ -947,7 +937,6 @@ void raid_gen3_avx512bw(int nd, size_t size, void **vv)
}
#endif
#if defined(CONFIG_X86) && defined(CONFIG_SSSE3)
/*
* GEN4 (quad parity with Cauchy matrix) SSSE3 implementation
*/
@ -1061,9 +1050,8 @@ void raid_gen4_ssse3(int nd, size_t size, void **vv)
raid_sse_end();
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_SSSE3)
#ifdef CONFIG_X86_64
/*
* GEN4 (quad parity with Cauchy matrix) SSSE3 implementation
*
@ -1236,7 +1224,7 @@ void raid_gen4_ssse3ext(int nd, size_t size, void **vv)
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX2)
#ifdef CONFIG_X86_64
/*
* GEN4 (quad parity with Cauchy matrix) AVX2 implementation
*
@ -1397,7 +1385,7 @@ void raid_gen4_avx2ext(int nd, size_t size, void **vv)
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX512BW)
#ifdef CONFIG_X86_64
/*
* GEN4 (quad parity with Cauchy matrix) AVX512BW implementation
*/
@ -1510,7 +1498,6 @@ void raid_gen4_avx512bw(int nd, size_t size, void **vv)
}
#endif
#if defined(CONFIG_X86) && defined(CONFIG_SSSE3)
/*
* GEN5 (penta parity with Cauchy matrix) SSSE3 implementation
*/
@ -1645,9 +1632,8 @@ void raid_gen5_ssse3(int nd, size_t size, void **vv)
raid_sse_end();
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_SSSE3)
#ifdef CONFIG_X86_64
/*
* GEN5 (penta parity with Cauchy matrix) SSSE3 implementation
*
@ -1780,7 +1766,7 @@ void raid_gen5_ssse3ext(int nd, size_t size, void **vv)
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX2)
#ifdef CONFIG_X86_64
/*
* GEN5 (penta parity with Cauchy matrix) AVX2 implementation
*
@ -1910,7 +1896,7 @@ void raid_gen5_avx2ext(int nd, size_t size, void **vv)
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX512BW)
#ifdef CONFIG_X86_64
/*
* GEN5 (penta parity with Cauchy matrix) AVX512BW implementation
*/
@ -2040,7 +2026,6 @@ void raid_gen5_avx512bw(int nd, size_t size, void **vv)
}
#endif
#if defined(CONFIG_X86) && defined(CONFIG_SSSE3)
/*
* GEN6 (hexa parity with Cauchy matrix) SSSE3 implementation
*/
@ -2196,9 +2181,8 @@ void raid_gen6_ssse3(int nd, size_t size, void **vv)
raid_sse_end();
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_SSSE3)
#ifdef CONFIG_X86_64
/*
* GEN6 (hexa parity with Cauchy matrix) SSSE3 implementation
*
@ -2348,7 +2332,7 @@ void raid_gen6_ssse3ext(int nd, size_t size, void **vv)
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX2)
#ifdef CONFIG_X86_64
/*
* GEN6 (hexa parity with Cauchy matrix) AVX2 implementation
*
@ -2506,7 +2490,7 @@ void raid_gen6_avx2ext(int nd, size_t size, void **vv)
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX512BW)
#ifdef CONFIG_X86_64
/*
* GEN6 (hexa parity with Cauchy matrix) AVX512BW implementation
*/
@ -2665,7 +2649,6 @@ void raid_gen6_avx512bw(int nd, size_t size, void **vv)
}
#endif
#if defined(CONFIG_X86) && defined(CONFIG_SSSE3)
/*
* RAID recovering for one disk SSSE3 implementation
*/
@ -2722,9 +2705,7 @@ void raid_rec1_ssse3(int nr, int *id, int *ip, int nd, size_t size, void **vv)
raid_sse_end();
}
#endif
#if defined(CONFIG_X86) && defined(CONFIG_SSSE3)
/*
* RAID recovering for two disks SSSE3 implementation
*/
@ -2828,9 +2809,7 @@ void raid_rec2_ssse3(int nr, int *id, int *ip, int nd, size_t size, void **vv)
raid_sse_end();
}
#endif
#if defined(CONFIG_X86) && defined(CONFIG_SSSE3)
/*
* RAID recovering SSSE3 implementation
*/
@ -2904,9 +2883,7 @@ void raid_recX_ssse3(int nr, int *id, int *ip, int nd, size_t size, void **vv)
raid_sse_end();
}
#endif
#if defined(CONFIG_X86) && defined(CONFIG_AVX2)
/*
* RAID recovering for one disk AVX2 implementation
*/
@ -2960,9 +2937,7 @@ void raid_rec1_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
raid_avx_end();
}
#endif
#if defined(CONFIG_X86) && defined(CONFIG_AVX2)
/*
* RAID recovering for two disks AVX2 implementation
*/
@ -3058,9 +3033,7 @@ void raid_rec2_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
raid_avx_end();
}
#endif
#if defined(CONFIG_X86) && defined(CONFIG_AVX2)
/*
* RAID recovering AVX2 implementation
*/
@ -3133,9 +3106,8 @@ void raid_recX_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
raid_avx_end();
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX512BW)
#ifdef CONFIG_X86_64
/*
* RAID recovering for one disk AVX512BW implementation
*/
@ -3184,7 +3156,7 @@ void raid_rec1_avx512bw(int nr, int *id, int *ip, int nd, size_t size, void **vv
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX512BW)
#ifdef CONFIG_X86_64
/*
* RAID recovering for two disks AVX512BW implementation
*/
@ -3274,7 +3246,7 @@ void raid_rec2_avx512bw(int nr, int *id, int *ip, int nd, size_t size, void **vv
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX512BW)
#ifdef CONFIG_X86_64
/*
* RAID recovering AVX512BW implementation
*/
@ -3345,10 +3317,8 @@ void raid_recX_avx512bw(int nr, int *id, int *ip, int nd, size_t size, void **vv
}
#endif
#if defined(CONFIG_X86) && defined(CONFIG_SSE2)
void raid_register_x86(void)
{
#ifdef CONFIG_SSE2
if (raid_cpu_has_sse2()) {
raid_gen_register(RAID_ALGO_CAUCHY_PAR1, "sse2", raid_gen1_sse2);
raid_gen_register(RAID_ALGO_CAUCHY_PAR2, "sse2", raid_gen2_sse2);
@ -3361,9 +3331,7 @@ void raid_register_x86(void)
raid_gen_register(RAID_ALGO_VANDERMONDE_PAR3, "sse2", raid_genz_sse2);
#endif
}
#endif
#ifdef CONFIG_SSSE3
if (raid_cpu_has_ssse3()) {
raid_gen_register(RAID_ALGO_CAUCHY_PAR3, "ssse3", raid_gen3_ssse3);
raid_gen_register(RAID_ALGO_CAUCHY_PAR4, "ssse3", raid_gen4_ssse3);
@ -3385,9 +3353,7 @@ void raid_register_x86(void)
raid_rec_register(RAID_ALGO_CAUCHY_PAR5, "ssse3", raid_recX_ssse3);
raid_rec_register(RAID_ALGO_CAUCHY_PAR6, "ssse3", raid_recX_ssse3);
}
#endif
#ifdef CONFIG_AVX2
if (raid_cpu_has_avx2()) {
raid_gen_register(RAID_ALGO_CAUCHY_PAR1, "avx2", raid_gen1_avx2);
raid_gen_register(RAID_ALGO_CAUCHY_PAR2, "avx2", raid_gen2_avx2);
@ -3406,9 +3372,7 @@ void raid_register_x86(void)
raid_rec_register(RAID_ALGO_CAUCHY_PAR5, "avx2", raid_recX_avx2);
raid_rec_register(RAID_ALGO_CAUCHY_PAR6, "avx2", raid_recX_avx2);
}
#endif
#ifdef CONFIG_AVX512BW
#ifdef CONFIG_X86_64
if (raid_cpu_has_avx512bw()) {
raid_gen_register(RAID_ALGO_CAUCHY_PAR1, "avx512", raid_gen1_avx512bw);
@ -3428,6 +3392,6 @@ void raid_register_x86(void)
}
}
#endif
#endif
}
#endif
#endif /* CONFIG_X86 */

11
raid/x86z.c
View file

@ -4,7 +4,8 @@
#include "internal.h"
#include "gf.h"
#if defined(CONFIG_X86) && defined(CONFIG_SSE2)
#ifdef CONFIG_X86
static const struct gfzconst16 {
uint8_t poly[16];
uint8_t half[16];
@ -24,9 +25,7 @@ static const struct gfzconst16 {
0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f
}
};
#endif
#if defined(CONFIG_X86) && defined(CONFIG_SSE2)
/*
* GENz (triple parity with powers of 2^-1) SSE2 implementation
*/
@ -82,9 +81,8 @@ void raid_genz_sse2(int nd, size_t size, void **vv)
raid_sse_end();
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_SSE2)
#ifdef CONFIG_X86_64
/*
* GENz (triple parity with powers of 2^-1) SSE2 implementation
*
@ -166,7 +164,7 @@ void raid_genz_sse2ext(int nd, size_t size, void **vv)
}
#endif
#if defined(CONFIG_X86_64) && defined(CONFIG_AVX2)
#ifdef CONFIG_X86_64
/*
* GENz (triple parity with powers of 2^-1) AVX2 implementation
*
@ -243,3 +241,4 @@ void raid_genz_avx2ext(int nd, size_t size, void **vv)
}
#endif
#endif /* CONFIG_X86 */