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Document dummy register clobbers in raid_sse_end and raid_neon_end
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@ -368,6 +368,15 @@ static __always_inline void raid_sse_end(void)
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* clobber them freely.
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*
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* Registers ymm and zmm don't have this requirement.
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*
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* Note: Placing dummy clobber lists at the end of the function rather
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* than on individual inner asm statements is not a strictly conforming
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* inline assembly pattern. However, because the inner loops use only
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* scalar integer variables for loop counters and pointers (which GCC and
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* Clang allocate to general-purpose integer registers), and because the
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* function calls are dispatched via pointers (preventing inlining), this
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* workaround successfully forces GCC and Clang to save and restore
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* callee-saved registers in the function prologue/epilogue for the Windows ABI.
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*/
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#ifdef __SSE2__
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asm volatile ("" : : : "%xmm0", "%xmm1", "%xmm2", "%xmm3");
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@ -404,6 +413,18 @@ static __always_inline void raid_neon_begin(void)
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static __always_inline void raid_neon_end(void)
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{
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/*
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* Clobbers registers used in NEON asm operations.
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*
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* Note: Placing dummy clobber lists at the end of the function rather
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* than on individual inner asm statements is not a strictly conforming
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* inline assembly pattern. However, because the inner loops use only
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* scalar integer variables for loop counters and pointers (which GCC and
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* Clang allocate to general-purpose integer registers), and because the
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* function calls are dispatched via pointers (preventing inlining), this
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* workaround successfully forces GCC and Clang to save and restore AAPCS64
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* callee-saved registers (v8-v15) in the function prologue/epilogue.
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*/
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asm volatile ("" : : : "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7");
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asm volatile ("" : : : "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15");
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asm volatile ("" : : : "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23");
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