Andrea Mazzoleni
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b6c93cd61b
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Renames par3z to parz.
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2013-11-17 14:27:31 +01:00 |
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Andrea Mazzoleni
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915c3b9202
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Renames parity level from RAID to PAR.
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2013-11-13 21:35:44 +01:00 |
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Andrea Mazzoleni
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a762c30a46
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Detects AVX2.
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2013-11-05 19:39:46 +01:00 |
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Andrea Mazzoleni
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a5a3c33854
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Adds support for fast triple parity without SSSE3.
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2013-11-04 23:47:49 +01:00 |
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Andrea Mazzoleni
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e33a916295
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Disables SSSE3 on Atom and Jaguar CPU.
It's slower than plain SSE2.
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2013-10-07 22:21:26 +02:00 |
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Andrea Mazzoleni
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823bc8a8c0
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Adds SSSE3 and AVX parity computation.
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2013-10-06 16:06:17 +02:00 |
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Andrea Mazzoleni
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3d689c53de
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Doesn't use extended SSE registers in the Bulldozer AMD family.
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2013-09-29 15:24:15 +02:00 |
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Andrea Mazzoleni
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2f1d359fb7
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Adds speed stats for ARM.
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2013-09-27 15:37:49 +02:00 |
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Andrea Mazzoleni
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147b905495
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Updates comments and documentation.
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2013-08-18 17:21:39 +02:00 |
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Andrea Mazzoleni
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37ac46a284
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Uses the fast crc32 instruction if SSE4.2 is available.
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2013-08-17 17:38:18 +02:00 |
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Andrea Mazzoleni
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6049b71296
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Removes the slowsse2 cpu flag. It's no more requires as sse2 is not faster than mmx.
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2013-06-14 22:39:27 +02:00 |
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Andrea Mazzoleni
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e64badd05e
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Adds Spooky hash and a better RAID algo selection.
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2013-06-09 22:55:57 +02:00 |
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Andrea Mazzoleni
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a029c75470
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Does not clobber ebx to allow compilation in PIC mode.
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2011-05-03 19:02:52 +02:00 |
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Andrea Mazzoleni
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08831c6641
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Initial RAID6 support. Not yet complete.
Uses Murmur3 as default hash.
Check now returns and error even if only recoverable errors are present.
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2011-04-23 21:38:26 +02:00 |
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