15 commits

Author	SHA1	Message	Date
Andrea Mazzoleni	b937d8a4c4	Precompute affine matrix representations outside data loop in AVX2 and AVX-512 GFNI recX	2026-08-20 20:54:14 +02:00
Andrea Mazzoleni	f0eb02753b	Eliminate stack buffers, pre-split delta nibbles and and inner loop in recX	2026-08-20 20:54:14 +02:00
Andrea Mazzoleni	542ddb531f	Keep deltas in AVX-512 registers and unroll reconstruction with conditional jumps in recX	2026-08-20 20:54:14 +02:00
Andrea Mazzoleni	dc7068d49f	Add GFNI affine parity generation for RAID polynomial	2026-08-19 23:55:34 +02:00
Andrea Mazzoleni	8363d7cd7a	Use primitive generator 3 for AES Cauchy mode	2026-08-19 23:55:34 +02:00
Andrea Mazzoleni	47b321d97c	Support dynamic runtime selection of RAID AES mode	2026-08-18 23:33:56 +02:00
Andrea Mazzoleni	8e2b9c03b5	Use uniform ending on files for parity implementation	2026-08-18 23:33:54 +02:00
Andrea Mazzoleni	e43964523f	Refactor and reorganize parity generation functions using inline templates	2026-08-18 23:33:54 +02:00
Andrea Mazzoleni	1e63403bf2	Change RAID AVX512/GFNI functions to use forward iterations	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	6cb3d86f66	Remove the special case of a single data disk when not strictly required	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	f1bc02f52a	Simplify GFNI implementations	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	108915254e	Assume the assembler supports all x86 SSE/AVX instructions	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	c08a571d88	Add support for AVX2 GFNI	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	557dcda9cd	Disable AVX512 on CPUs with narrow shuffle ports or double-pumped 256-bit datapath	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	639167efba	Preliminary support for AVX512GFNI	2026-08-18 23:33:53 +02:00