21 commits

Author	SHA1	Message	Date
Andrea Mazzoleni	46ebce4e3c	Add specialized P+Q REC2OF2 recovery to all SIMD backends	2026-08-24 17:39:29 +02:00
Andrea Mazzoleni	ae703ce68c	Optimize multi-parity recovery with fused syndrome generation	2026-08-24 11:57:04 +02:00
Andrea Mazzoleni	9d842b0dfb	Precompute direct Cauchy affine matrices for RAID GFNI generation	2026-08-23 21:57:16 +02:00
Andrea Mazzoleni	0c030c024e	Remove horner evaluation for RAID GFNI parity generation	2026-08-23 21:34:41 +02:00
Andrea Mazzoleni	335f2619fd	Optimize triple parity generation by preloading multiplication tables in vector registers	2026-08-21 12:06:26 +02:00
Andrea Mazzoleni	8c456ee354	Optimize dual parity generation by preloading multiplication tables in vector registers ... Optimize AVX2 and AVX-512 GFNI AES dual parity generation by preloading coefficients in registers	2026-08-21 12:06:26 +02:00
Andrea Mazzoleni	ac1797be96	Precompute affine matrix representations outside data loop in AVX2 and AVX-512 GFNI recX	2026-08-21 12:06:25 +02:00
Andrea Mazzoleni	7f6ef3b4cd	Eliminate stack buffers, pre-split delta nibbles and and inner loop in recX	2026-08-21 12:06:25 +02:00
Andrea Mazzoleni	71ffb94019	Keep deltas in AVX-512 registers and unroll reconstruction with conditional jumps in recX	2026-08-21 12:06:25 +02:00
Andrea Mazzoleni	17591ad932	Add GFNI affine parity generation for RAID polynomial	2026-08-21 12:06:25 +02:00
Andrea Mazzoleni	b5d507fbe9	Use primitive generator 3 for AES Cauchy mode	2026-08-21 12:06:25 +02:00
Andrea Mazzoleni	47b321d97c	Support dynamic runtime selection of RAID AES mode	2026-08-18 23:33:56 +02:00
Andrea Mazzoleni	8e2b9c03b5	Use uniform ending on files for parity implementation	2026-08-18 23:33:54 +02:00
Andrea Mazzoleni	e43964523f	Refactor and reorganize parity generation functions using inline templates	2026-08-18 23:33:54 +02:00
Andrea Mazzoleni	1e63403bf2	Change RAID AVX512/GFNI functions to use forward iterations	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	6cb3d86f66	Remove the special case of a single data disk when not strictly required	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	f1bc02f52a	Simplify GFNI implementations	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	108915254e	Assume the assembler supports all x86 SSE/AVX instructions	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	c08a571d88	Add support for AVX2 GFNI	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	557dcda9cd	Disable AVX512 on CPUs with narrow shuffle ports or double-pumped 256-bit datapath	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	639167efba	Preliminary support for AVX512GFNI	2026-08-18 23:33:53 +02:00