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snapraid/raid/avx2.c

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// SPDX-License-Identifier: GPL-2.0-or-later
// Copyright (C) 2026 Andrea Mazzoleni
#include "internal.h"
#include "gf.h"
#include "cpu.h"
#ifdef CONFIG_X86
/*
* GEN1 (RAID5 with xor) AVX2 implementation
*/
void raid_gen1_avx2(int nd, size_t size, void **vv)
{
uint8_t **v = (uint8_t **)vv;
uint8_t *p;
int d, l;
size_t i;
l = nd - 1;
p = v[nd];
raid_avx_begin();
for (i = 0; i < size; i += 64) {
asm volatile ("vmovdqa %0,%%ymm0" : : "m" (v[0][i]));
asm volatile ("vmovdqa %0,%%ymm1" : : "m" (v[0][i + 32]));
for (d = 1; d <= l; ++d) {
asm volatile ("vpxor %0,%%ymm0,%%ymm0" : : "m" (v[d][i]));
asm volatile ("vpxor %0,%%ymm1,%%ymm1" : : "m" (v[d][i + 32]));
}
asm volatile ("vmovntdq %%ymm0,%0" : "=m" (p[i]));
asm volatile ("vmovntdq %%ymm1,%0" : "=m" (p[i + 32]));
}
raid_avx_end();
}
/*
* GEN2 Cauchy AVX2 implementation using the active generator
*/
static __always_inline void raid_gen2_avx2_gen(int nd, size_t size, void **vv, int generator)
{
uint8_t **v = (uint8_t **)vv;
uint8_t *p;
uint8_t *q;
int d, l;
size_t i;
l = nd - 1;
p = v[nd];
q = v[nd + 1];
raid_avx_begin();
asm volatile ("vpbroadcastb %0, %%ymm7" : : "m" (gfconst16.poly[0]));
asm volatile ("vpxor %ymm6,%ymm6,%ymm6");
for (i = 0; i < size; i += 64) {
asm volatile ("vmovdqa %0,%%ymm0" : : "m" (v[l][i]));
asm volatile ("vmovdqa %0,%%ymm1" : : "m" (v[l][i + 32]));
asm volatile ("vmovdqa %ymm0,%ymm2");
asm volatile ("vmovdqa %ymm1,%ymm3");
for (d = l - 1; d >= 0; --d) {
if (generator == 3) {
asm volatile ("vmovdqa %ymm2,%ymm4");
asm volatile ("vmovdqa %ymm3,%ymm5");
asm volatile ("vpaddb %ymm2,%ymm2,%ymm2");
asm volatile ("vpaddb %ymm3,%ymm3,%ymm3");
asm volatile ("vpxor %ymm4,%ymm2,%ymm2");
asm volatile ("vpxor %ymm5,%ymm3,%ymm3");
asm volatile ("vpcmpgtb %ymm4,%ymm6,%ymm4");
asm volatile ("vpcmpgtb %ymm5,%ymm6,%ymm5");
asm volatile ("vpand %ymm7,%ymm4,%ymm4");
asm volatile ("vpand %ymm7,%ymm5,%ymm5");
asm volatile ("vpxor %ymm4,%ymm2,%ymm2");
asm volatile ("vpxor %ymm5,%ymm3,%ymm3");
} else {
asm volatile ("vpcmpgtb %ymm2,%ymm6,%ymm4");
asm volatile ("vpcmpgtb %ymm3,%ymm6,%ymm5");
asm volatile ("vpaddb %ymm2,%ymm2,%ymm2");
asm volatile ("vpaddb %ymm3,%ymm3,%ymm3");
asm volatile ("vpand %ymm7,%ymm4,%ymm4");
asm volatile ("vpand %ymm7,%ymm5,%ymm5");
asm volatile ("vpxor %ymm4,%ymm2,%ymm2");
asm volatile ("vpxor %ymm5,%ymm3,%ymm3");
}
asm volatile ("vmovdqa %0,%%ymm4" : : "m" (v[d][i]));
asm volatile ("vmovdqa %0,%%ymm5" : : "m" (v[d][i + 32]));
asm volatile ("vpxor %ymm4,%ymm0,%ymm0");
asm volatile ("vpxor %ymm5,%ymm1,%ymm1");
asm volatile ("vpxor %ymm4,%ymm2,%ymm2");
asm volatile ("vpxor %ymm5,%ymm3,%ymm3");
}
asm volatile ("vmovntdq %%ymm0,%0" : "=m" (p[i]));
asm volatile ("vmovntdq %%ymm1,%0" : "=m" (p[i + 32]));
asm volatile ("vmovntdq %%ymm2,%0" : "=m" (q[i]));
asm volatile ("vmovntdq %%ymm3,%0" : "=m" (q[i + 32]));
}
raid_avx_end();
}
#ifdef CONFIG_X86_64
/*
* GEN2 Cauchy AVX2 implementation using the extended register set.
*
* Process two data disks at a time and process the two 32-byte lanes
* sequentially.
*
* Note that it uses 16 registers, meaning that x64 is required.
*/
static __always_inline void raid_gen2_avx2ext_gen(int nd, size_t size, void **vv, int generator)
{
uint8_t **v = (uint8_t **)vv;
uint8_t *p;
uint8_t *q;
int d, l;
size_t i;
l = nd - 1;
p = v[nd];
q = v[nd + 1];
raid_avx_begin();
asm volatile ("vpxor %ymm14,%ymm14,%ymm14");
asm volatile ("vpbroadcastb %0,%%ymm15" : : "m" (gfconst16.poly[0]));
for (i = 0; i < size; i += 64) {
asm volatile ("vmovdqa %0,%%ymm0" : : "m" (v[l][i]));
asm volatile ("vmovdqa %0,%%ymm1" : : "m" (v[l][i + 32]));
asm volatile ("vmovdqa %ymm0,%ymm2");
asm volatile ("vmovdqa %ymm1,%ymm3");
/* process two disks per iteration */
for (d = l - 1; d >= 1; d -= 2) {
asm volatile ("vmovdqa %0,%%ymm4" : : "m" (v[d][i]));
asm volatile ("vmovdqa %0,%%ymm5" : : "m" (v[d][i + 32]));
asm volatile ("vmovdqa %0,%%ymm6" : : "m" (v[d - 1][i]));
asm volatile ("vmovdqa %0,%%ymm7" : : "m" (v[d - 1][i + 32]));
asm volatile ("vpcmpgtb %ymm2,%ymm14,%ymm10");
asm volatile ("vpaddb %ymm2,%ymm2,%ymm8");
asm volatile ("vpxor %ymm6,%ymm4,%ymm12");
asm volatile ("vpand %ymm15,%ymm10,%ymm10");
asm volatile ("vpxor %ymm10,%ymm8,%ymm8");
asm volatile ("vpxor %ymm4,%ymm8,%ymm8");
asm volatile ("vpcmpgtb %ymm8,%ymm14,%ymm10");
asm volatile ("vpaddb %ymm8,%ymm8,%ymm8");
asm volatile ("vpxor %ymm12,%ymm0,%ymm0");
if (generator == 3)
asm volatile ("vpxor %ymm2,%ymm12,%ymm12");
asm volatile ("vpand %ymm15,%ymm10,%ymm10");
asm volatile ("vpxor %ymm10,%ymm8,%ymm8");
if (generator == 3)
asm volatile ("vpxor %ymm12,%ymm8,%ymm2");
else
asm volatile ("vpxor %ymm6,%ymm8,%ymm2");
asm volatile ("vpcmpgtb %ymm3,%ymm14,%ymm11");
asm volatile ("vpaddb %ymm3,%ymm3,%ymm9");
asm volatile ("vpxor %ymm7,%ymm5,%ymm13");
asm volatile ("vpand %ymm15,%ymm11,%ymm11");
asm volatile ("vpxor %ymm11,%ymm9,%ymm9");
asm volatile ("vpxor %ymm5,%ymm9,%ymm9");
asm volatile ("vpcmpgtb %ymm9,%ymm14,%ymm11");
asm volatile ("vpaddb %ymm9,%ymm9,%ymm9");
asm volatile ("vpxor %ymm13,%ymm1,%ymm1");
if (generator == 3)
asm volatile ("vpxor %ymm3,%ymm13,%ymm13");
asm volatile ("vpand %ymm15,%ymm11,%ymm11");
asm volatile ("vpxor %ymm11,%ymm9,%ymm9");
if (generator == 3)
asm volatile ("vpxor %ymm13,%ymm9,%ymm3");
else
asm volatile ("vpxor %ymm7,%ymm9,%ymm3");
}
/* single remaining disk */
if (d == 0) {
asm volatile ("vmovdqa %0,%%ymm4" : : "m" (v[0][i]));
asm volatile ("vmovdqa %0,%%ymm5" : : "m" (v[0][i + 32]));
asm volatile ("vpcmpgtb %ymm2,%ymm14,%ymm10");
asm volatile ("vpaddb %ymm2,%ymm2,%ymm8");
asm volatile ("vpxor %ymm4,%ymm0,%ymm0");
if (generator == 3)
asm volatile ("vpxor %ymm4,%ymm2,%ymm12");
asm volatile ("vpand %ymm15,%ymm10,%ymm10");
asm volatile ("vpxor %ymm10,%ymm8,%ymm8");
if (generator == 3)
asm volatile ("vpxor %ymm12,%ymm8,%ymm2");
else
asm volatile ("vpxor %ymm4,%ymm8,%ymm2");
asm volatile ("vpcmpgtb %ymm3,%ymm14,%ymm11");
asm volatile ("vpaddb %ymm3,%ymm3,%ymm9");
asm volatile ("vpxor %ymm5,%ymm1,%ymm1");
if (generator == 3)
asm volatile ("vpxor %ymm5,%ymm3,%ymm13");
asm volatile ("vpand %ymm15,%ymm11,%ymm11");
asm volatile ("vpxor %ymm11,%ymm9,%ymm9");
if (generator == 3)
asm volatile ("vpxor %ymm13,%ymm9,%ymm3");
else
asm volatile ("vpxor %ymm5,%ymm9,%ymm3");
}
asm volatile ("vmovntdq %%ymm0,%0" : "=m" (p[i]));
asm volatile ("vmovntdq %%ymm1,%0" : "=m" (p[i + 32]));
asm volatile ("vmovntdq %%ymm2,%0" : "=m" (q[i]));
asm volatile ("vmovntdq %%ymm3,%0" : "=m" (q[i + 32]));
}
raid_avx_end();
}
/*
* GENz (triple parity with powers of 2^-1) AVX2 implementation
*
* Note that it uses 16 registers, meaning that x64 is required.
*/
void raid_genz_avx2ext_raid(int nd, size_t size, void **vv)
{
uint8_t **v = (uint8_t **)vv;
uint8_t *p;
uint8_t *q;
uint8_t *r;
int d, l;
size_t i;
l = nd - 1;
p = v[nd];
q = v[nd + 1];
r = v[nd + 2];
raid_avx_begin();
asm volatile ("vpbroadcastb %0,%%ymm7" : : "m" (gfconst16.poly[0]));
asm volatile ("vpbroadcastb %0,%%ymm3" : : "m" (gfconst16.half[0]));
asm volatile ("vpbroadcastb %0,%%ymm11" : : "m" (gfconst16.low7[0]));
asm volatile ("vpxor %ymm15,%ymm15,%ymm15");
for (i = 0; i < size; i += 64) {
asm volatile ("vmovdqa %0,%%ymm0" : : "m" (v[l][i]));
asm volatile ("vmovdqa %0,%%ymm8" : : "m" (v[l][i + 32]));
asm volatile ("vmovdqa %ymm0,%ymm1");
asm volatile ("vmovdqa %ymm8,%ymm9");
asm volatile ("vmovdqa %ymm0,%ymm2");
asm volatile ("vmovdqa %ymm8,%ymm10");
for (d = l - 1; d >= 0; --d) {
asm volatile ("vpsllw $7,%ymm2,%ymm6");
asm volatile ("vpsllw $7,%ymm10,%ymm14");
asm volatile ("vpsrlw $1,%ymm2,%ymm2");
asm volatile ("vpsrlw $1,%ymm10,%ymm10");
asm volatile ("vpcmpgtb %ymm1,%ymm15,%ymm4");
asm volatile ("vpcmpgtb %ymm9,%ymm15,%ymm12");
asm volatile ("vpcmpgtb %ymm6,%ymm15,%ymm5");
asm volatile ("vpcmpgtb %ymm14,%ymm15,%ymm13");
asm volatile ("vpaddb %ymm1,%ymm1,%ymm1");
asm volatile ("vpaddb %ymm9,%ymm9,%ymm9");
asm volatile ("vpand %ymm11,%ymm2,%ymm2");
asm volatile ("vpand %ymm11,%ymm10,%ymm10");
asm volatile ("vpand %ymm7,%ymm4,%ymm4");
asm volatile ("vpand %ymm7,%ymm12,%ymm12");
asm volatile ("vpand %ymm3,%ymm5,%ymm5");
asm volatile ("vpand %ymm3,%ymm13,%ymm13");
asm volatile ("vpxor %ymm4,%ymm1,%ymm1");
asm volatile ("vpxor %ymm12,%ymm9,%ymm9");
asm volatile ("vpxor %ymm5,%ymm2,%ymm2");
asm volatile ("vpxor %ymm13,%ymm10,%ymm10");
asm volatile ("vmovdqa %0,%%ymm4" : : "m" (v[d][i]));
asm volatile ("vmovdqa %0,%%ymm12" : : "m" (v[d][i + 32]));
asm volatile ("vpxor %ymm4,%ymm0,%ymm0");
asm volatile ("vpxor %ymm4,%ymm1,%ymm1");
asm volatile ("vpxor %ymm4,%ymm2,%ymm2");
asm volatile ("vpxor %ymm12,%ymm8,%ymm8");
asm volatile ("vpxor %ymm12,%ymm9,%ymm9");
asm volatile ("vpxor %ymm12,%ymm10,%ymm10");
}
asm volatile ("vmovntdq %%ymm0,%0" : "=m" (p[i]));
asm volatile ("vmovntdq %%ymm8,%0" : "=m" (p[i + 32]));
asm volatile ("vmovntdq %%ymm1,%0" : "=m" (q[i]));
asm volatile ("vmovntdq %%ymm9,%0" : "=m" (q[i + 32]));
asm volatile ("vmovntdq %%ymm2,%0" : "=m" (r[i]));
asm volatile ("vmovntdq %%ymm10,%0" : "=m" (r[i + 32]));
}
raid_avx_end();
}
/*
* GEN3 (triple parity with Cauchy matrix) AVX2 implementation
*
* Note that it uses 16 registers, meaning that x64 is required.
*/
static __always_inline void raid_gen3_avx2ext_gen(int nd, size_t size, void **vv, int generator)
{
uint8_t **v = (uint8_t **)vv;
uint8_t *p;
uint8_t *q;
uint8_t *r;
int d, l;
size_t i;
l = nd - 1;
p = v[nd];
q = v[nd + 1];
r = v[nd + 2];
/* special case with only one data disk */
if (l == 0) {
for (i = 0; i < 3; ++i)
memcpy(v[1 + i], v[0], size);
return;
}
raid_avx_begin();
/* generic case with at least two data disks */
asm volatile ("vpbroadcastb %0, %%ymm3" : : "m" (gfconst16.poly[0]));
asm volatile ("vpbroadcastb %0, %%ymm11" : : "m" (gfconst16.low4[0]));
for (i = 0; i < size; i += 64) {
/* last disk without the generator multiplication */
asm volatile ("vmovdqa %0,%%ymm4" : : "m" (v[l][i]));
asm volatile ("vmovdqa %0,%%ymm12" : : "m" (v[l][i + 32]));
asm volatile ("vmovdqa %ymm4,%ymm0");
asm volatile ("vmovdqa %ymm4,%ymm1");
asm volatile ("vmovdqa %ymm12,%ymm8");
asm volatile ("vmovdqa %ymm12,%ymm9");
asm volatile ("vpsrlw $4,%ymm4,%ymm5");
asm volatile ("vpsrlw $4,%ymm12,%ymm13");
asm volatile ("vpand %ymm11,%ymm4,%ymm4");
asm volatile ("vpand %ymm11,%ymm12,%ymm12");
asm volatile ("vpand %ymm11,%ymm5,%ymm5");
asm volatile ("vpand %ymm11,%ymm13,%ymm13");
asm volatile ("vbroadcasti128 %0,%%ymm10" : : "m" (raid_gfcauchypshufb[l][1][0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm15" : : "m" (raid_gfcauchypshufb[l][1][1][0]));
asm volatile ("vpshufb %ymm4,%ymm10,%ymm2");
asm volatile ("vpshufb %ymm12,%ymm10,%ymm10");
asm volatile ("vpshufb %ymm5,%ymm15,%ymm7");
asm volatile ("vpshufb %ymm13,%ymm15,%ymm15");
asm volatile ("vpxor %ymm7,%ymm2,%ymm2");
asm volatile ("vpxor %ymm15,%ymm10,%ymm10");
/* process two intermediate disks per iteration */
for (d = l - 1; d > 1; d -= 2) {
asm volatile ("vmovdqa %0,%%ymm4" : : "m" (v[d][i]));
asm volatile ("vmovdqa %0,%%ymm12" : : "m" (v[d][i + 32]));
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (raid_gfcauchypshufb[d][1][0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm15" : : "m" (raid_gfcauchypshufb[d][1][1][0]));
if (generator == 3)
asm volatile ("vmovdqa %ymm1,%ymm6");
asm volatile ("vpxor %ymm5,%ymm5,%ymm5");
asm volatile ("vpcmpgtb %ymm1,%ymm5,%ymm5");
asm volatile ("vpaddb %ymm1,%ymm1,%ymm1");
asm volatile ("vpand %ymm3,%ymm5,%ymm5");
asm volatile ("vpxor %ymm5,%ymm1,%ymm1");
if (generator == 3)
asm volatile ("vpxor %ymm6,%ymm1,%ymm1");
asm volatile ("vpxor %ymm4,%ymm0,%ymm0");
asm volatile ("vpxor %ymm4,%ymm1,%ymm1");
asm volatile ("vpsrlw $4,%ymm4,%ymm5");
asm volatile ("vpand %ymm11,%ymm4,%ymm4");
asm volatile ("vpand %ymm11,%ymm5,%ymm5");
asm volatile ("vpshufb %ymm4,%ymm14,%ymm6");
asm volatile ("vpshufb %ymm5,%ymm15,%ymm7");
asm volatile ("vpxor %ymm7,%ymm6,%ymm6");
asm volatile ("vpxor %ymm6,%ymm2,%ymm2");
if (generator == 3)
asm volatile ("vmovdqa %ymm9,%ymm6");
asm volatile ("vpxor %ymm13,%ymm13,%ymm13");
asm volatile ("vpcmpgtb %ymm9,%ymm13,%ymm13");
asm volatile ("vpaddb %ymm9,%ymm9,%ymm9");
asm volatile ("vpand %ymm3,%ymm13,%ymm13");
asm volatile ("vpxor %ymm13,%ymm9,%ymm9");
if (generator == 3)
asm volatile ("vpxor %ymm6,%ymm9,%ymm9");
asm volatile ("vpxor %ymm12,%ymm8,%ymm8");
asm volatile ("vpxor %ymm12,%ymm9,%ymm9");
asm volatile ("vpsrlw $4,%ymm12,%ymm13");
asm volatile ("vpand %ymm11,%ymm12,%ymm12");
asm volatile ("vpand %ymm11,%ymm13,%ymm13");
asm volatile ("vpshufb %ymm12,%ymm14,%ymm6");
asm volatile ("vpshufb %ymm13,%ymm15,%ymm7");
asm volatile ("vpxor %ymm7,%ymm6,%ymm6");
asm volatile ("vpxor %ymm6,%ymm10,%ymm10");
asm volatile ("vmovdqa %0,%%ymm4" : : "m" (v[d - 1][i]));
asm volatile ("vmovdqa %0,%%ymm12" : : "m" (v[d - 1][i + 32]));
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (raid_gfcauchypshufb[d - 1][1][0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm15" : : "m" (raid_gfcauchypshufb[d - 1][1][1][0]));
if (generator == 3)
asm volatile ("vmovdqa %ymm1,%ymm6");
asm volatile ("vpxor %ymm5,%ymm5,%ymm5");
asm volatile ("vpcmpgtb %ymm1,%ymm5,%ymm5");
asm volatile ("vpaddb %ymm1,%ymm1,%ymm1");
asm volatile ("vpand %ymm3,%ymm5,%ymm5");
asm volatile ("vpxor %ymm5,%ymm1,%ymm1");
if (generator == 3)
asm volatile ("vpxor %ymm6,%ymm1,%ymm1");
asm volatile ("vpxor %ymm4,%ymm0,%ymm0");
asm volatile ("vpxor %ymm4,%ymm1,%ymm1");
asm volatile ("vpsrlw $4,%ymm4,%ymm5");
asm volatile ("vpand %ymm11,%ymm4,%ymm4");
asm volatile ("vpand %ymm11,%ymm5,%ymm5");
asm volatile ("vpshufb %ymm4,%ymm14,%ymm6");
asm volatile ("vpshufb %ymm5,%ymm15,%ymm7");
asm volatile ("vpxor %ymm7,%ymm6,%ymm6");
asm volatile ("vpxor %ymm6,%ymm2,%ymm2");
if (generator == 3)
asm volatile ("vmovdqa %ymm9,%ymm6");
asm volatile ("vpxor %ymm13,%ymm13,%ymm13");
asm volatile ("vpcmpgtb %ymm9,%ymm13,%ymm13");
asm volatile ("vpaddb %ymm9,%ymm9,%ymm9");
asm volatile ("vpand %ymm3,%ymm13,%ymm13");
asm volatile ("vpxor %ymm13,%ymm9,%ymm9");
if (generator == 3)
asm volatile ("vpxor %ymm6,%ymm9,%ymm9");
asm volatile ("vpxor %ymm12,%ymm8,%ymm8");
asm volatile ("vpxor %ymm12,%ymm9,%ymm9");
asm volatile ("vpsrlw $4,%ymm12,%ymm13");
asm volatile ("vpand %ymm11,%ymm12,%ymm12");
asm volatile ("vpand %ymm11,%ymm13,%ymm13");
asm volatile ("vpshufb %ymm12,%ymm14,%ymm6");
asm volatile ("vpshufb %ymm13,%ymm15,%ymm7");
asm volatile ("vpxor %ymm7,%ymm6,%ymm6");
asm volatile ("vpxor %ymm6,%ymm10,%ymm10");
}
/* single remaining intermediate disk */
if (d == 1) {
asm volatile ("vmovdqa %0,%%ymm4" : : "m" (v[1][i]));
asm volatile ("vmovdqa %0,%%ymm12" : : "m" (v[1][i + 32]));
if (generator == 3)
asm volatile ("vmovdqa %ymm1,%ymm6");
asm volatile ("vpxor %ymm5,%ymm5,%ymm5");
asm volatile ("vpcmpgtb %ymm1,%ymm5,%ymm5");
asm volatile ("vpaddb %ymm1,%ymm1,%ymm1");
asm volatile ("vpand %ymm3,%ymm5,%ymm5");
asm volatile ("vpxor %ymm5,%ymm1,%ymm1");
if (generator == 3)
asm volatile ("vpxor %ymm6,%ymm1,%ymm1");
asm volatile ("vpxor %ymm4,%ymm0,%ymm0");
asm volatile ("vpxor %ymm4,%ymm1,%ymm1");
asm volatile ("vpsrlw $4,%ymm4,%ymm5");
asm volatile ("vpand %ymm11,%ymm4,%ymm4");
asm volatile ("vpand %ymm11,%ymm5,%ymm5");
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (raid_gfcauchypshufb[1][1][0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm15" : : "m" (raid_gfcauchypshufb[1][1][1][0]));
asm volatile ("vpshufb %ymm4,%ymm14,%ymm6");
asm volatile ("vpshufb %ymm5,%ymm15,%ymm7");
asm volatile ("vpxor %ymm7,%ymm6,%ymm6");
asm volatile ("vpxor %ymm6,%ymm2,%ymm2");
if (generator == 3)
asm volatile ("vmovdqa %ymm9,%ymm6");
asm volatile ("vpxor %ymm13,%ymm13,%ymm13");
asm volatile ("vpcmpgtb %ymm9,%ymm13,%ymm13");
asm volatile ("vpaddb %ymm9,%ymm9,%ymm9");
asm volatile ("vpand %ymm3,%ymm13,%ymm13");
asm volatile ("vpxor %ymm13,%ymm9,%ymm9");
if (generator == 3)
asm volatile ("vpxor %ymm6,%ymm9,%ymm9");
asm volatile ("vpxor %ymm12,%ymm8,%ymm8");
asm volatile ("vpxor %ymm12,%ymm9,%ymm9");
asm volatile ("vpsrlw $4,%ymm12,%ymm13");
asm volatile ("vpand %ymm11,%ymm12,%ymm12");
asm volatile ("vpand %ymm11,%ymm13,%ymm13");
asm volatile ("vpshufb %ymm12,%ymm14,%ymm6");
asm volatile ("vpshufb %ymm13,%ymm15,%ymm7");
asm volatile ("vpxor %ymm7,%ymm6,%ymm6");
asm volatile ("vpxor %ymm6,%ymm10,%ymm10");
}
/* first disk with all coefficients at 1 */
asm volatile ("vmovdqa %0,%%ymm4" : : "m" (v[0][i]));
asm volatile ("vmovdqa %0,%%ymm12" : : "m" (v[0][i + 32]));
if (generator == 3) {
asm volatile ("vmovdqa %ymm1,%ymm6");
asm volatile ("vmovdqa %ymm9,%ymm14");
}
asm volatile ("vpxor %ymm5,%ymm5,%ymm5");
asm volatile ("vpxor %ymm13,%ymm13,%ymm13");
asm volatile ("vpcmpgtb %ymm1,%ymm5,%ymm5");
asm volatile ("vpcmpgtb %ymm9,%ymm13,%ymm13");
asm volatile ("vpaddb %ymm1,%ymm1,%ymm1");
asm volatile ("vpaddb %ymm9,%ymm9,%ymm9");
asm volatile ("vpand %ymm3,%ymm5,%ymm5");
asm volatile ("vpand %ymm3,%ymm13,%ymm13");
asm volatile ("vpxor %ymm5,%ymm1,%ymm1");
asm volatile ("vpxor %ymm13,%ymm9,%ymm9");
if (generator == 3) {
asm volatile ("vpxor %ymm6,%ymm1,%ymm1");
asm volatile ("vpxor %ymm14,%ymm9,%ymm9");
}
asm volatile ("vpxor %ymm4,%ymm0,%ymm0");
asm volatile ("vpxor %ymm4,%ymm1,%ymm1");
asm volatile ("vpxor %ymm4,%ymm2,%ymm2");
asm volatile ("vpxor %ymm12,%ymm8,%ymm8");
asm volatile ("vpxor %ymm12,%ymm9,%ymm9");
asm volatile ("vpxor %ymm12,%ymm10,%ymm10");
asm volatile ("vmovntdq %%ymm0,%0" : "=m" (p[i]));
asm volatile ("vmovntdq %%ymm8,%0" : "=m" (p[i + 32]));
asm volatile ("vmovntdq %%ymm1,%0" : "=m" (q[i]));
asm volatile ("vmovntdq %%ymm9,%0" : "=m" (q[i + 32]));
asm volatile ("vmovntdq %%ymm2,%0" : "=m" (r[i]));
asm volatile ("vmovntdq %%ymm10,%0" : "=m" (r[i + 32]));
}
raid_avx_end();
}
/*
* GEN4 (quad parity with Cauchy matrix) AVX2 implementation
*
* Note that it uses 16 registers, meaning that x64 is required.
*/
static __always_inline void raid_gen4_avx2ext_gen(int nd, size_t size, void **vv, int generator)
{
uint8_t **v = (uint8_t **)vv;
uint8_t *p;
uint8_t *q;
uint8_t *r;
uint8_t *s;
int d, l;
size_t i;
l = nd - 1;
p = v[nd];
q = v[nd + 1];
r = v[nd + 2];
s = v[nd + 3];
/* special case with only one data disk */
if (l == 0) {
for (i = 0; i < 4; ++i)
memcpy(v[1 + i], v[0], size);
return;
}
raid_avx_begin();
/* keep the constants resident for the whole function */
asm volatile ("vpbroadcastb %0,%%ymm6" : : "m" (gfconst16.poly[0]));
asm volatile ("vpbroadcastb %0,%%ymm7" : : "m" (gfconst16.low4[0]));
/* generic case with at least two data disks */
for (i = 0; i < size; i += 64) {
/* last disk without the generator multiplication */
asm volatile ("vmovdqa %0,%%ymm4" : : "m" (v[l][i]));
asm volatile ("vmovdqa %0,%%ymm12" : : "m" (v[l][i + 32]));
asm volatile ("vmovdqa %ymm4,%ymm0");
asm volatile ("vmovdqa %ymm4,%ymm1");
asm volatile ("vmovdqa %ymm12,%ymm8");
asm volatile ("vmovdqa %ymm12,%ymm9");
asm volatile ("vpsrlw $4,%ymm4,%ymm5");
asm volatile ("vpand %ymm7,%ymm4,%ymm4");
asm volatile ("vpand %ymm7,%ymm5,%ymm5");
asm volatile ("vpsrlw $4,%ymm12,%ymm13");
asm volatile ("vpand %ymm7,%ymm12,%ymm12");
asm volatile ("vpand %ymm7,%ymm13,%ymm13");
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (raid_gfcauchypshufb[l][1][0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm15" : : "m" (raid_gfcauchypshufb[l][1][1][0]));
asm volatile ("vpshufb %ymm4,%ymm14,%ymm2");
asm volatile ("vpshufb %ymm5,%ymm15,%ymm3");
asm volatile ("vpxor %ymm3,%ymm2,%ymm2");
asm volatile ("vpshufb %ymm12,%ymm14,%ymm10");
asm volatile ("vpshufb %ymm13,%ymm15,%ymm11");
asm volatile ("vpxor %ymm11,%ymm10,%ymm10");
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (raid_gfcauchypshufb[l][2][0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm15" : : "m" (raid_gfcauchypshufb[l][2][1][0]));
asm volatile ("vpshufb %ymm4,%ymm14,%ymm3");
asm volatile ("vpshufb %ymm5,%ymm15,%ymm5");
asm volatile ("vpxor %ymm5,%ymm3,%ymm3");
asm volatile ("vpshufb %ymm12,%ymm14,%ymm11");
asm volatile ("vpshufb %ymm13,%ymm15,%ymm13");
asm volatile ("vpxor %ymm13,%ymm11,%ymm11");
/* intermediate disks */
for (d = l - 1; d > 0; --d) {
if (generator == 3)
asm volatile ("vmovdqa %ymm1,%ymm4");
asm volatile ("vpxor %ymm5,%ymm5,%ymm5");
asm volatile ("vpcmpgtb %ymm1,%ymm5,%ymm5");
asm volatile ("vpaddb %ymm1,%ymm1,%ymm1");
asm volatile ("vpand %ymm6,%ymm5,%ymm5");
asm volatile ("vpxor %ymm5,%ymm1,%ymm1");
if (generator == 3)
asm volatile ("vpxor %ymm4,%ymm1,%ymm1");
asm volatile ("vmovdqa %0,%%ymm4" : : "m" (v[d][i]));
asm volatile ("vpxor %ymm4,%ymm0,%ymm0");
asm volatile ("vpxor %ymm4,%ymm1,%ymm1");
asm volatile ("vpsrlw $4,%ymm4,%ymm5");
asm volatile ("vpand %ymm7,%ymm4,%ymm4");
asm volatile ("vpand %ymm7,%ymm5,%ymm5");
if (generator == 3)
asm volatile ("vmovdqa %ymm9,%ymm12");
asm volatile ("vpxor %ymm13,%ymm13,%ymm13");
asm volatile ("vpcmpgtb %ymm9,%ymm13,%ymm13");
asm volatile ("vpaddb %ymm9,%ymm9,%ymm9");
asm volatile ("vpand %ymm6,%ymm13,%ymm13");
asm volatile ("vpxor %ymm13,%ymm9,%ymm9");
if (generator == 3)
asm volatile ("vpxor %ymm12,%ymm9,%ymm9");
asm volatile ("vmovdqa %0,%%ymm12" : : "m" (v[d][i + 32]));
asm volatile ("vpxor %ymm12,%ymm8,%ymm8");
asm volatile ("vpxor %ymm12,%ymm9,%ymm9");
asm volatile ("vpsrlw $4,%ymm12,%ymm13");
asm volatile ("vpand %ymm7,%ymm12,%ymm12");
asm volatile ("vpand %ymm7,%ymm13,%ymm13");
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (raid_gfcauchypshufb[d][1][0][0]));
asm volatile ("vpshufb %ymm4,%ymm14,%ymm15");
asm volatile ("vpshufb %ymm12,%ymm14,%ymm14");
asm volatile ("vpxor %ymm15,%ymm2,%ymm2");
asm volatile ("vpxor %ymm14,%ymm10,%ymm10");
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (raid_gfcauchypshufb[d][1][1][0]));
asm volatile ("vpshufb %ymm5,%ymm14,%ymm15");
asm volatile ("vpshufb %ymm13,%ymm14,%ymm14");
asm volatile ("vpxor %ymm15,%ymm2,%ymm2");
asm volatile ("vpxor %ymm14,%ymm10,%ymm10");
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (raid_gfcauchypshufb[d][2][0][0]));
asm volatile ("vpshufb %ymm4,%ymm14,%ymm15");
asm volatile ("vpshufb %ymm12,%ymm14,%ymm14");
asm volatile ("vpxor %ymm15,%ymm3,%ymm3");
asm volatile ("vpxor %ymm14,%ymm11,%ymm11");
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (raid_gfcauchypshufb[d][2][1][0]));
asm volatile ("vpshufb %ymm5,%ymm14,%ymm15");
asm volatile ("vpshufb %ymm13,%ymm14,%ymm14");
asm volatile ("vpxor %ymm15,%ymm3,%ymm3");
asm volatile ("vpxor %ymm14,%ymm11,%ymm11");
}
/* first disk with all coefficients at 1 */
if (generator == 3)
asm volatile ("vmovdqa %ymm1,%ymm4");
asm volatile ("vpxor %ymm5,%ymm5,%ymm5");
asm volatile ("vpcmpgtb %ymm1,%ymm5,%ymm5");
asm volatile ("vpaddb %ymm1,%ymm1,%ymm1");
asm volatile ("vpand %ymm6,%ymm5,%ymm5");
asm volatile ("vpxor %ymm5,%ymm1,%ymm1");
if (generator == 3)
asm volatile ("vpxor %ymm4,%ymm1,%ymm1");
asm volatile ("vmovdqa %0,%%ymm4" : : "m" (v[0][i]));
asm volatile ("vpxor %ymm4,%ymm0,%ymm0");
asm volatile ("vpxor %ymm4,%ymm1,%ymm1");
asm volatile ("vpxor %ymm4,%ymm2,%ymm2");
asm volatile ("vpxor %ymm4,%ymm3,%ymm3");
if (generator == 3)
asm volatile ("vmovdqa %ymm9,%ymm12");
asm volatile ("vpxor %ymm13,%ymm13,%ymm13");
asm volatile ("vpcmpgtb %ymm9,%ymm13,%ymm13");
asm volatile ("vpaddb %ymm9,%ymm9,%ymm9");
asm volatile ("vpand %ymm6,%ymm13,%ymm13");
asm volatile ("vpxor %ymm13,%ymm9,%ymm9");
if (generator == 3)
asm volatile ("vpxor %ymm12,%ymm9,%ymm9");
asm volatile ("vmovdqa %0,%%ymm12" : : "m" (v[0][i + 32]));
asm volatile ("vpxor %ymm12,%ymm8,%ymm8");
asm volatile ("vpxor %ymm12,%ymm9,%ymm9");
asm volatile ("vpxor %ymm12,%ymm10,%ymm10");
asm volatile ("vpxor %ymm12,%ymm11,%ymm11");
asm volatile ("vmovntdq %%ymm0,%0" : "=m" (p[i]));
asm volatile ("vmovntdq %%ymm8,%0" : "=m" (p[i + 32]));
asm volatile ("vmovntdq %%ymm1,%0" : "=m" (q[i]));
asm volatile ("vmovntdq %%ymm9,%0" : "=m" (q[i + 32]));
asm volatile ("vmovntdq %%ymm2,%0" : "=m" (r[i]));
asm volatile ("vmovntdq %%ymm10,%0" : "=m" (r[i + 32]));
asm volatile ("vmovntdq %%ymm3,%0" : "=m" (s[i]));
asm volatile ("vmovntdq %%ymm11,%0" : "=m" (s[i + 32]));
}
raid_avx_end();
}
/*
* GENX AVX2EXT implementation
*/
static __always_inline void raid_genX_avx2ext(int nd, size_t size, void **vv, int np, int generator)
{
uint8_t **v = (uint8_t **)vv;
size_t i;
int d, l;
l = nd - 1;
/* special case with only one data disk */
if (l == 0) {
for (d = 0; d < np; ++d)
memcpy(v[1 + d], v[0], size);
return;
}
raid_avx_begin();
/* generic case with at least two data disks */
asm volatile ("vpxor %ymm6,%ymm6,%ymm6");
asm volatile ("vpbroadcastb %0,%%ymm14" : : "m" (gfconst16.poly[0]));
asm volatile ("vpbroadcastb %0,%%ymm15" : : "m" (gfconst16.low4[0]));
for (i = 0; i < size; i += 32) {
/* last disk without the generator multiplication */
asm volatile ("vmovdqa %0,%%ymm10" : : "m" (v[l][i]));
asm volatile ("vmovdqa %ymm10,%ymm0");
asm volatile ("vmovdqa %ymm10,%ymm1");
asm volatile ("vpsrlw $4,%ymm10,%ymm11");
asm volatile ("vpand %ymm15,%ymm10,%ymm10");
asm volatile ("vpand %ymm15,%ymm11,%ymm11");
if (np >= 3) {
asm volatile ("vbroadcasti128 %0,%%ymm2" : : "m" (raid_gfcauchypshufb[l][1][0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (raid_gfcauchypshufb[l][1][1][0]));
asm volatile ("vpshufb %ymm10,%ymm2,%ymm2");
asm volatile ("vpshufb %ymm11,%ymm13,%ymm13");
asm volatile ("vpxor %ymm13,%ymm2,%ymm2");
}
if (np >= 4) {
asm volatile ("vbroadcasti128 %0,%%ymm3" : : "m" (raid_gfcauchypshufb[l][2][0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (raid_gfcauchypshufb[l][2][1][0]));
asm volatile ("vpshufb %ymm10,%ymm3,%ymm3");
asm volatile ("vpshufb %ymm11,%ymm13,%ymm13");
asm volatile ("vpxor %ymm13,%ymm3,%ymm3");
}
if (np >= 5) {
asm volatile ("vbroadcasti128 %0,%%ymm4" : : "m" (raid_gfcauchypshufb[l][3][0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (raid_gfcauchypshufb[l][3][1][0]));
asm volatile ("vpshufb %ymm10,%ymm4,%ymm4");
asm volatile ("vpshufb %ymm11,%ymm13,%ymm13");
asm volatile ("vpxor %ymm13,%ymm4,%ymm4");
}
if (np >= 6) {
asm volatile ("vbroadcasti128 %0,%%ymm5" : : "m" (raid_gfcauchypshufb[l][4][0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (raid_gfcauchypshufb[l][4][1][0]));
asm volatile ("vpshufb %ymm10,%ymm5,%ymm5");
asm volatile ("vpshufb %ymm11,%ymm13,%ymm13");
asm volatile ("vpxor %ymm13,%ymm5,%ymm5");
}
/* intermediate disks */
for (d = l - 1; d > 0; --d) {
asm volatile ("vmovdqa %0,%%ymm10" : : "m" (v[d][i]));
if (generator == 3)
asm volatile ("vmovdqa %ymm1,%ymm12");
asm volatile ("vpcmpgtb %ymm1,%ymm6,%ymm11");
asm volatile ("vpaddb %ymm1,%ymm1,%ymm1");
asm volatile ("vpand %ymm14,%ymm11,%ymm11");
asm volatile ("vpxor %ymm11,%ymm1,%ymm1");
if (generator == 3)
asm volatile ("vpxor %ymm12,%ymm1,%ymm1");
asm volatile ("vpxor %ymm10,%ymm0,%ymm0");
asm volatile ("vpxor %ymm10,%ymm1,%ymm1");
asm volatile ("vpsrlw $4,%ymm10,%ymm11");
asm volatile ("vpand %ymm15,%ymm10,%ymm10");
asm volatile ("vpand %ymm15,%ymm11,%ymm11");
if (np >= 3) {
asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (raid_gfcauchypshufb[d][1][0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (raid_gfcauchypshufb[d][1][1][0]));
asm volatile ("vpshufb %ymm10,%ymm12,%ymm12");
asm volatile ("vpshufb %ymm11,%ymm13,%ymm13");
asm volatile ("vpxor %ymm12,%ymm2,%ymm2");
asm volatile ("vpxor %ymm13,%ymm2,%ymm2");
}
if (np >= 4) {
asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (raid_gfcauchypshufb[d][2][0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (raid_gfcauchypshufb[d][2][1][0]));
asm volatile ("vpshufb %ymm10,%ymm12,%ymm12");
asm volatile ("vpshufb %ymm11,%ymm13,%ymm13");
asm volatile ("vpxor %ymm12,%ymm3,%ymm3");
asm volatile ("vpxor %ymm13,%ymm3,%ymm3");
}
if (np >= 5) {
asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (raid_gfcauchypshufb[d][3][0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (raid_gfcauchypshufb[d][3][1][0]));
asm volatile ("vpshufb %ymm10,%ymm12,%ymm12");
asm volatile ("vpshufb %ymm11,%ymm13,%ymm13");
asm volatile ("vpxor %ymm12,%ymm4,%ymm4");
asm volatile ("vpxor %ymm13,%ymm4,%ymm4");
}
if (np >= 6) {
asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (raid_gfcauchypshufb[d][4][0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (raid_gfcauchypshufb[d][4][1][0]));
asm volatile ("vpshufb %ymm10,%ymm12,%ymm12");
asm volatile ("vpshufb %ymm11,%ymm13,%ymm13");
asm volatile ("vpxor %ymm12,%ymm5,%ymm5");
asm volatile ("vpxor %ymm13,%ymm5,%ymm5");
}
}
/* first disk with all coefficients at 1 */
asm volatile ("vmovdqa %0,%%ymm10" : : "m" (v[0][i]));
if (generator == 3)
asm volatile ("vmovdqa %ymm1,%ymm12");
asm volatile ("vpcmpgtb %ymm1,%ymm6,%ymm11");
asm volatile ("vpaddb %ymm1,%ymm1,%ymm1");
asm volatile ("vpand %ymm14,%ymm11,%ymm11");
asm volatile ("vpxor %ymm11,%ymm1,%ymm1");
if (generator == 3)
asm volatile ("vpxor %ymm12,%ymm1,%ymm1");
asm volatile ("vpxor %ymm10,%ymm0,%ymm0");
asm volatile ("vpxor %ymm10,%ymm1,%ymm1");
if (np >= 3)
asm volatile ("vpxor %ymm10,%ymm2,%ymm2");
if (np >= 4)
asm volatile ("vpxor %ymm10,%ymm3,%ymm3");
if (np >= 5)
asm volatile ("vpxor %ymm10,%ymm4,%ymm4");
if (np >= 6)
asm volatile ("vpxor %ymm10,%ymm5,%ymm5");
asm volatile ("vmovntdq %%ymm0,%0" : "=m" (v[nd][i]));
asm volatile ("vmovntdq %%ymm1,%0" : "=m" (v[nd + 1][i]));
if (np >= 3)
asm volatile ("vmovntdq %%ymm2,%0" : "=m" (v[nd + 2][i]));
if (np >= 4)
asm volatile ("vmovntdq %%ymm3,%0" : "=m" (v[nd + 3][i]));
if (np >= 5)
asm volatile ("vmovntdq %%ymm4,%0" : "=m" (v[nd + 4][i]));
if (np >= 6)
asm volatile ("vmovntdq %%ymm5,%0" : "=m" (v[nd + 5][i]));
}
raid_avx_end();
}
#endif
/*
* RAID recovering for one disk AVX2 implementation
*/
static __always_inline void raid_rec1_avx2_delta(int nr, int *id, int *ip, int nd, size_t size, void **vv)
{
uint8_t **v = (uint8_t **)vv;
uint8_t *p;
uint8_t *pa;
uint8_t G;
uint8_t V;
size_t i;
(void)nr; /* unused, it's always 1 */
/* setup the coefficients matrix */
G = A(ip[0], id[0]);
/* invert it to solve the system of linear equations */
V = inv(G);
/* compute delta parity */
raid_delta_gen(1, id, ip, nd, size, vv);
p = v[nd + ip[0]];
pa = v[id[0]];
raid_avx_begin();
asm volatile ("vpbroadcastb %0,%%ymm7" : : "m" (gfconst16.low4[0]));
asm volatile ("vbroadcasti128 %0,%%ymm4" : : "m" (raid_gfmulpshufb[V][0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm5" : : "m" (raid_gfmulpshufb[V][1][0]));
for (i = 0; i < size; i += 64) {
asm volatile ("vmovdqa %0,%%ymm0" : : "m" (p[i]));
asm volatile ("vmovdqa %0,%%ymm1" : : "m" (p[i + 32]));
asm volatile ("vmovdqa %0,%%ymm2" : : "m" (pa[i]));
asm volatile ("vmovdqa %0,%%ymm3" : : "m" (pa[i + 32]));
asm volatile ("vpxor %ymm2,%ymm0,%ymm0");
asm volatile ("vpxor %ymm3,%ymm1,%ymm1");
asm volatile ("vpsrlw $4,%ymm0,%ymm2");
asm volatile ("vpsrlw $4,%ymm1,%ymm3");
asm volatile ("vpand %ymm7,%ymm0,%ymm0");
asm volatile ("vpand %ymm7,%ymm1,%ymm1");
asm volatile ("vpand %ymm7,%ymm2,%ymm2");
asm volatile ("vpand %ymm7,%ymm3,%ymm3");
asm volatile ("vpshufb %ymm0,%ymm4,%ymm0");
asm volatile ("vpshufb %ymm1,%ymm4,%ymm1");
asm volatile ("vpshufb %ymm2,%ymm5,%ymm2");
asm volatile ("vpshufb %ymm3,%ymm5,%ymm3");
asm volatile ("vpxor %ymm2,%ymm0,%ymm0");
asm volatile ("vpxor %ymm3,%ymm1,%ymm1");
asm volatile ("vmovdqa %%ymm0,%0" : "=m" (pa[i]));
asm volatile ("vmovdqa %%ymm1,%0" : "=m" (pa[i + 32]));
}
raid_avx_end();
}
/*
* RAID recovering for two disks AVX2 implementation
*/
static __always_inline void raid_rec2_avx2_delta(int nr, int *id, int *ip, int nd, size_t size, void **vv)
{
uint8_t **v = (uint8_t **)vv;
const int N = 2;
uint8_t *p[N];
uint8_t *pa[N];
uint8_t G[N * N];
uint8_t V[N * N];
size_t i;
int j, k;
(void)nr; /* unused, it's always 2 */
/* setup the coefficients matrix */
for (j = 0; j < N; ++j)
for (k = 0; k < N; ++k)
G[j * N + k] = A(ip[j], id[k]);
/* invert it to solve the system of linear equations */
raid_invert(G, V, N);
/* compute delta parity */
raid_delta_gen(N, id, ip, nd, size, vv);
for (j = 0; j < N; ++j) {
p[j] = v[nd + ip[j]];
pa[j] = v[id[j]];
}
raid_avx_begin();
asm volatile ("vpbroadcastb %0,%%ymm7" : : "m" (gfconst16.low4[0]));
for (i = 0; i < size; i += 32) {
asm volatile ("vmovdqa %0,%%ymm0" : : "m" (p[0][i]));
asm volatile ("vmovdqa %0,%%ymm2" : : "m" (pa[0][i]));
asm volatile ("vmovdqa %0,%%ymm1" : : "m" (p[1][i]));
asm volatile ("vmovdqa %0,%%ymm3" : : "m" (pa[1][i]));
asm volatile ("vpxor %ymm2,%ymm0,%ymm0");
asm volatile ("vpxor %ymm3,%ymm1,%ymm1");
asm volatile ("vpxor %ymm6,%ymm6,%ymm6");
asm volatile ("vbroadcasti128 %0,%%ymm2" : : "m" (raid_gfmulpshufb[V[0]][0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm3" : : "m" (raid_gfmulpshufb[V[0]][1][0]));
asm volatile ("vpsrlw $4,%ymm0,%ymm5");
asm volatile ("vpand %ymm7,%ymm0,%ymm4");
asm volatile ("vpand %ymm7,%ymm5,%ymm5");
asm volatile ("vpshufb %ymm4,%ymm2,%ymm2");
asm volatile ("vpshufb %ymm5,%ymm3,%ymm3");
asm volatile ("vpxor %ymm2,%ymm6,%ymm6");
asm volatile ("vpxor %ymm3,%ymm6,%ymm6");
asm volatile ("vbroadcasti128 %0,%%ymm2" : : "m" (raid_gfmulpshufb[V[1]][0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm3" : : "m" (raid_gfmulpshufb[V[1]][1][0]));
asm volatile ("vpsrlw $4,%ymm1,%ymm5");
asm volatile ("vpand %ymm7,%ymm1,%ymm4");
asm volatile ("vpand %ymm7,%ymm5,%ymm5");
asm volatile ("vpshufb %ymm4,%ymm2,%ymm2");
asm volatile ("vpshufb %ymm5,%ymm3,%ymm3");
asm volatile ("vpxor %ymm2,%ymm6,%ymm6");
asm volatile ("vpxor %ymm3,%ymm6,%ymm6");
asm volatile ("vmovdqa %%ymm6,%0" : "=m" (pa[0][i]));
asm volatile ("vpxor %ymm6,%ymm6,%ymm6");
asm volatile ("vbroadcasti128 %0,%%ymm2" : : "m" (raid_gfmulpshufb[V[2]][0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm3" : : "m" (raid_gfmulpshufb[V[2]][1][0]));
asm volatile ("vpsrlw $4,%ymm0,%ymm5");
asm volatile ("vpand %ymm7,%ymm0,%ymm4");
asm volatile ("vpand %ymm7,%ymm5,%ymm5");
asm volatile ("vpshufb %ymm4,%ymm2,%ymm2");
asm volatile ("vpshufb %ymm5,%ymm3,%ymm3");
asm volatile ("vpxor %ymm2,%ymm6,%ymm6");
asm volatile ("vpxor %ymm3,%ymm6,%ymm6");
asm volatile ("vbroadcasti128 %0,%%ymm2" : : "m" (raid_gfmulpshufb[V[3]][0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm3" : : "m" (raid_gfmulpshufb[V[3]][1][0]));
asm volatile ("vpsrlw $4,%ymm1,%ymm5");
asm volatile ("vpand %ymm7,%ymm1,%ymm4");
asm volatile ("vpand %ymm7,%ymm5,%ymm5");
asm volatile ("vpshufb %ymm4,%ymm2,%ymm2");
asm volatile ("vpshufb %ymm5,%ymm3,%ymm3");
asm volatile ("vpxor %ymm2,%ymm6,%ymm6");
asm volatile ("vpxor %ymm3,%ymm6,%ymm6");
asm volatile ("vmovdqa %%ymm6,%0" : "=m" (pa[1][i]));
}
raid_avx_end();
}
/*
* Recover failure of two data blocks using P and Q AVX2 implementation.
*/
static __always_inline void raid_rec2of2_avx2(int *id, int *ip, int nd, size_t size, void **vv)
{
uint8_t **v = (uint8_t **)vv;
uint8_t *p;
uint8_t *pa;
uint8_t *q;
uint8_t *qa;
uint8_t C[2];
size_t i;
/* get multiplication coefficients */
C[0] = inv(powgen(id[1] - id[0]) ^ 1);
C[1] = inv(powgen(id[0]) ^ powgen(id[1]));
/* compute delta parity */
raid_delta_gen(2, id, ip, nd, size, vv);
p = v[nd];
q = v[nd + 1];
pa = v[id[0]];
qa = v[id[1]];
raid_avx_begin();
asm volatile ("vpbroadcastb %0,%%ymm7" : : "m" (gfconst16.low4[0]));
for (i = 0; i < size; i += 32) {
/* Pd */
asm volatile ("vmovdqa %0,%%ymm0" : : "m" (p[i]));
asm volatile ("vpxor %0,%%ymm0,%%ymm0" : : "m" (pa[i]));
/* Qd */
asm volatile ("vmovdqa %0,%%ymm1" : : "m" (q[i]));
asm volatile ("vpxor %0,%%ymm1,%%ymm1" : : "m" (qa[i]));
/* split Pd and Qd */
asm volatile ("vpsrlw $4,%ymm0,%ymm2");
asm volatile ("vpsrlw $4,%ymm1,%ymm3");
asm volatile ("vpand %ymm7,%ymm0,%ymm4");
asm volatile ("vpand %ymm7,%ymm1,%ymm5");
asm volatile ("vpand %ymm7,%ymm2,%ymm2");
asm volatile ("vpand %ymm7,%ymm3,%ymm3");
/* C0 * Pd */
asm volatile ("vbroadcasti128 %0,%%ymm6" : : "m" (raid_gfmulpshufb[C[0]][0][0]));
asm volatile ("vpshufb %ymm4,%ymm6,%ymm6");
asm volatile ("vbroadcasti128 %0,%%ymm4" : : "m" (raid_gfmulpshufb[C[0]][1][0]));
asm volatile ("vpshufb %ymm2,%ymm4,%ymm4");
asm volatile ("vpxor %ymm4,%ymm6,%ymm6");
/* C1 * Qd */
asm volatile ("vbroadcasti128 %0,%%ymm4" : : "m" (raid_gfmulpshufb[C[1]][0][0]));
asm volatile ("vpshufb %ymm5,%ymm4,%ymm4");
asm volatile ("vpxor %ymm4,%ymm6,%ymm6");
asm volatile ("vbroadcasti128 %0,%%ymm4" : : "m" (raid_gfmulpshufb[C[1]][1][0]));
asm volatile ("vpshufb %ymm3,%ymm4,%ymm4");
asm volatile ("vpxor %ymm4,%ymm6,%ymm6");
/* Dy = ymm6, Dx = Pd ^ Dy */
asm volatile ("vpxor %ymm6,%ymm0,%ymm0");
asm volatile ("vmovdqa %%ymm0,%0" : "=m" (pa[i]));
asm volatile ("vmovdqa %%ymm6,%0" : "=m" (qa[i]));
}
raid_avx_end();
}
/*
* RAID recovering AVX2 implementation optimized for up to four failures.
*
* Compute all selected syndromes in one scan of the surviving data, then
* retain only their low/high nibbles while reconstructing the missing data.
*/
static __always_inline void raid_recX_avx2_1234(int nr, int *id, int *ip, int nd, size_t size, void **vv)
{
uint8_t **v = (uint8_t **)vv;
uint8_t *p[RAID_PARITY_MAX];
uint8_t *pa[RAID_PARITY_MAX];
uint8_t *src[RAID_DATA_MAX];
uint8_t G[RAID_PARITY_MAX * RAID_PARITY_MAX];
uint8_t V[RAID_PARITY_MAX * RAID_PARITY_MAX];
const uint8_t *S[RAID_DATA_MAX][RAID_PARITY_MAX];
const uint8_t *R[RAID_PARITY_MAX][RAID_PARITY_MAX];
uint8_t buffer_low[RAID_PARITY_MAX * 32 + 32];
uint8_t buffer_high[RAID_PARITY_MAX * 32 + 32];
uint8_t *pd_low = __align_ptr(buffer_low, 32);
uint8_t *pd_high = __align_ptr(buffer_high, 32);
size_t i;
int d, j, k, s;
int ns;
int has_p;
BUG_ON(nr < 1 || nr > 4);
/* setup the coefficients matrix */
for (j = 0; j < nr; ++j)
for (k = 0; k < nr; ++k)
G[j * nr + k] = A(ip[j], id[k]);
/* invert it to solve the system of linear equations */
raid_invert(G, V, nr);
/* setup selected parity and destination pointers */
for (j = 0; j < nr; ++j) {
p[j] = v[nd + ip[j]];
pa[j] = v[id[j]];
}
/* ip[] is ordered. If P is available, it is always ip[0] */
has_p = ip[0] == 0;
/* build the compact surviving-data list and its syndrome tables */
ns = 0;
k = 0;
for (d = 0; d < nd; ++d) {
if (k < nr && d == id[k]) {
++k;
continue;
}
src[ns] = v[d];
for (j = 0; j < nr; ++j)
S[ns][j] = &raid_gfmulpshufb[A(ip[j], d)][0][0];
++ns;
}
BUG_ON(k != nr);
BUG_ON(ns != nd - nr);
/* precompute inverse-matrix multiplication table pointers */
for (j = 0; j < nr; ++j)
for (k = 0; k < nr; ++k)
R[j][k] = &raid_gfmulpshufb[V[j * nr + k]][0][0];
raid_avx_begin();
asm volatile ("vpbroadcastb %0,%%ymm7" : : "m" (gfconst16.low4[0]));
for (i = 0; i < size; i += 32) {
/* ymm0..ymm3 are syndrome accumulators */
asm volatile ("vmovdqa %0,%%ymm0" : : "m" (p[0][i]));
if (nr >= 2)
asm volatile ("vmovdqa %0,%%ymm1" : : "m" (p[1][i]));
if (nr >= 3)
asm volatile ("vmovdqa %0,%%ymm2" : : "m" (p[2][i]));
if (nr >= 4)
asm volatile ("vmovdqa %0,%%ymm3" : : "m" (p[3][i]));
/* all selected syndromes are accumulated in this single source scan */
for (s = 0; s < ns; ++s) {
const uint8_t **t = S[s];
asm volatile ("vmovdqa %0,%%ymm4" : : "m" (src[s][i]));
if (has_p) {
asm volatile ("vpxor %ymm4,%ymm0,%ymm0");
asm volatile ("vpsrlw $4,%ymm4,%ymm5");
asm volatile ("vpand %ymm7,%ymm4,%ymm4");
asm volatile ("vpand %ymm7,%ymm5,%ymm5");
} else {
asm volatile ("vpsrlw $4,%ymm4,%ymm5");
asm volatile ("vpand %ymm7,%ymm4,%ymm4");
asm volatile ("vpand %ymm7,%ymm5,%ymm5");
asm volatile ("vbroadcasti128 %0,%%ymm6" : : "m" (t[0][0]));
asm volatile ("vpshufb %ymm4,%ymm6,%ymm6");
asm volatile ("vpxor %ymm6,%ymm0,%ymm0");
asm volatile ("vbroadcasti128 %0,%%ymm6" : : "m" (t[0][16]));
asm volatile ("vpshufb %ymm5,%ymm6,%ymm6");
asm volatile ("vpxor %ymm6,%ymm0,%ymm0");
}
if (nr >= 2) {
asm volatile ("vbroadcasti128 %0,%%ymm6" : : "m" (t[1][0]));
asm volatile ("vpshufb %ymm4,%ymm6,%ymm6");
asm volatile ("vpxor %ymm6,%ymm1,%ymm1");
asm volatile ("vbroadcasti128 %0,%%ymm6" : : "m" (t[1][16]));
asm volatile ("vpshufb %ymm5,%ymm6,%ymm6");
asm volatile ("vpxor %ymm6,%ymm1,%ymm1");
}
if (nr >= 3) {
asm volatile ("vbroadcasti128 %0,%%ymm6" : : "m" (t[2][0]));
asm volatile ("vpshufb %ymm4,%ymm6,%ymm6");
asm volatile ("vpxor %ymm6,%ymm2,%ymm2");
asm volatile ("vbroadcasti128 %0,%%ymm6" : : "m" (t[2][16]));
asm volatile ("vpshufb %ymm5,%ymm6,%ymm6");
asm volatile ("vpxor %ymm6,%ymm2,%ymm2");
}
if (nr >= 4) {
asm volatile ("vbroadcasti128 %0,%%ymm6" : : "m" (t[3][0]));
asm volatile ("vpshufb %ymm4,%ymm6,%ymm6");
asm volatile ("vpxor %ymm6,%ymm3,%ymm3");
asm volatile ("vbroadcasti128 %0,%%ymm6" : : "m" (t[3][16]));
asm volatile ("vpshufb %ymm5,%ymm6,%ymm6");
asm volatile ("vpxor %ymm6,%ymm3,%ymm3");
}
}
/* preserve only aligned low/high nibbles, never full delta blocks */
asm volatile ("vpsrlw $4,%ymm0,%ymm4");
asm volatile ("vpand %ymm7,%ymm0,%ymm0");
asm volatile ("vpand %ymm7,%ymm4,%ymm4");
asm volatile ("vmovdqa %%ymm0,%0" : "=m" (pd_low[0]));
asm volatile ("vmovdqa %%ymm4,%0" : "=m" (pd_high[0]));
if (nr >= 2) {
asm volatile ("vpsrlw $4,%ymm1,%ymm4");
asm volatile ("vpand %ymm7,%ymm1,%ymm1");
asm volatile ("vpand %ymm7,%ymm4,%ymm4");
asm volatile ("vmovdqa %%ymm1,%0" : "=m" (pd_low[32]));
asm volatile ("vmovdqa %%ymm4,%0" : "=m" (pd_high[32]));
}
if (nr >= 3) {
asm volatile ("vpsrlw $4,%ymm2,%ymm4");
asm volatile ("vpand %ymm7,%ymm2,%ymm2");
asm volatile ("vpand %ymm7,%ymm4,%ymm4");
asm volatile ("vmovdqa %%ymm2,%0" : "=m" (pd_low[64]));
asm volatile ("vmovdqa %%ymm4,%0" : "=m" (pd_high[64]));
}
if (nr >= 4) {
asm volatile ("vpsrlw $4,%ymm3,%ymm4");
asm volatile ("vpand %ymm7,%ymm3,%ymm3");
asm volatile ("vpand %ymm7,%ymm4,%ymm4");
asm volatile ("vmovdqa %%ymm3,%0" : "=m" (pd_low[96]));
asm volatile ("vmovdqa %%ymm4,%0" : "=m" (pd_high[96]));
}
/* reconstruct every missing block, initializing from coefficient zero */
for (j = 0; j < nr; ++j) {
const uint8_t **t = R[j];
asm volatile ("vbroadcasti128 %0,%%ymm0" : : "m" (t[0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm1" : : "m" (t[0][16]));
asm volatile ("vmovdqa %0,%%ymm4" : : "m" (pd_low[0]));
asm volatile ("vmovdqa %0,%%ymm5" : : "m" (pd_high[0]));
asm volatile ("vpshufb %ymm4,%ymm0,%ymm0");
asm volatile ("vpshufb %ymm5,%ymm1,%ymm1");
for (k = 1; k < nr; ++k) {
asm volatile ("vbroadcasti128 %0,%%ymm2" : : "m" (t[k][0]));
asm volatile ("vbroadcasti128 %0,%%ymm3" : : "m" (t[k][16]));
asm volatile ("vmovdqa %0,%%ymm4" : : "m" (pd_low[k * 32]));
asm volatile ("vmovdqa %0,%%ymm5" : : "m" (pd_high[k * 32]));
asm volatile ("vpshufb %ymm4,%ymm2,%ymm2");
asm volatile ("vpshufb %ymm5,%ymm3,%ymm3");
asm volatile ("vpxor %ymm2,%ymm0,%ymm0");
asm volatile ("vpxor %ymm3,%ymm1,%ymm1");
}
asm volatile ("vpxor %ymm1,%ymm0,%ymm0");
asm volatile ("vmovdqa %%ymm0,%0" : "=m" (pa[j][i]));
}
}
raid_avx_end();
}
/*
* RAID recovering AVX2 implementation with all syndromes in memory.
*
* Compute all selected syndromes in a single pass over the surviving data.
* Syndrome accumulators are kept in memory to minimize register pressure.
*/
static __always_inline void raid_recX_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
{
uint8_t **v = (uint8_t **)vv;
uint8_t *p[RAID_PARITY_MAX];
uint8_t *pa[RAID_PARITY_MAX];
uint8_t *src[RAID_DATA_MAX];
uint8_t G[RAID_PARITY_MAX * RAID_PARITY_MAX];
uint8_t V[RAID_PARITY_MAX * RAID_PARITY_MAX];
const uint8_t *S[RAID_DATA_MAX][RAID_PARITY_MAX];
const uint8_t *R[RAID_PARITY_MAX][RAID_PARITY_MAX];
uint8_t buffer_low[RAID_PARITY_MAX * 32 + 32];
uint8_t buffer_high[RAID_PARITY_MAX * 32 + 32];
uint8_t *pd_low = __align_ptr(buffer_low, 32);
uint8_t *pd_high = __align_ptr(buffer_high, 32);
size_t i;
int d, j, k, s;
int ns;
int has_p;
BUG_ON(nr < 1 || nr > RAID_PARITY_MAX);
/* setup the coefficients matrix */
for (j = 0; j < nr; ++j)
for (k = 0; k < nr; ++k)
G[j * nr + k] = A(ip[j], id[k]);
/* invert it to solve the system of linear equations */
raid_invert(G, V, nr);
/* setup selected parity and destination pointers */
for (j = 0; j < nr; ++j) {
p[j] = v[nd + ip[j]];
pa[j] = v[id[j]];
}
/* ip[] is ordered. If P is available, it is always ip[0] */
has_p = ip[0] == 0;
/* build the compact surviving-data list and its syndrome tables */
ns = 0;
k = 0;
for (d = 0; d < nd; ++d) {
if (k < nr && d == id[k]) {
++k;
continue;
}
src[ns] = v[d];
for (j = 0; j < nr; ++j)
S[ns][j] = &raid_gfmulpshufb[A(ip[j], d)][0][0];
++ns;
}
BUG_ON(k != nr);
BUG_ON(ns != nd - nr);
/* precompute inverse-matrix multiplication table pointers */
for (j = 0; j < nr; ++j)
for (k = 0; k < nr; ++k)
R[j][k] = &raid_gfmulpshufb[V[j * nr + k]][0][0];
raid_avx_begin();
asm volatile ("vpbroadcastb %0,%%ymm7" : : "m" (gfconst16.low4[0]));
for (i = 0; i < size; i += 32) {
/*
* Initialize all syndrome accumulators in memory from the
* selected stored parity blocks.
*
* pd_low[] temporarily contains the complete raw syndromes.
*/
for (j = 0; j < nr; ++j) {
asm volatile ("vmovdqa %0,%%ymm0" : : "m" (p[j][i]));
asm volatile ("vmovdqa %%ymm0,%0" : "=m" (pd_low[j * 32]));
}
/*
* Single pass over all surviving data.
*
* Every src[s][i] is loaded exactly once.
*/
for (s = 0; s < ns; ++s) {
const uint8_t **t = S[s];
/* original source */
asm volatile ("vmovdqa %0,%%ymm0" : : "m" (src[s][i]));
/*
* P has coefficient 1.
*
* Update its memory accumulator before destructively
* splitting the source into low/high nibbles.
*/
if (has_p) {
asm volatile ("vpxor %0,%%ymm0,%%ymm4" : : "m" (pd_low[0]));
asm volatile ("vmovdqa %%ymm4,%0" : "=m" (pd_low[0]));
}
/* split source into low/high nibbles */
asm volatile ("vpsrlw $4,%ymm0,%ymm1");
asm volatile ("vpand %ymm7,%ymm0,%ymm0");
asm volatile ("vpand %ymm7,%ymm1,%ymm1");
/*
* Update every non-P syndrome in memory.
*
* ymm0 = source low
* ymm1 = source high
* ymm2 = low table / low result
* ymm3 = high table / high result
*/
for (j = has_p; j < nr; ++j) {
asm volatile ("vbroadcasti128 %0,%%ymm2" : : "m" (t[j][0]));
asm volatile ("vbroadcasti128 %0,%%ymm3" : : "m" (t[j][16]));
asm volatile ("vpshufb %ymm0,%ymm2,%ymm2");
asm volatile ("vpshufb %ymm1,%ymm3,%ymm3");
asm volatile ("vpxor %ymm3,%ymm2,%ymm2");
/*
* Syndrome[j] ^= coefficient * source
*
* Read the accumulator directly as the memory
* operand of VPXOR, then write it back.
*/
asm volatile ("vpxor %0,%%ymm2,%%ymm2" : : "m" (pd_low[j * 32]));
asm volatile ("vmovdqa %%ymm2,%0" : "=m" (pd_low[j * 32]));
}
}
/*
* All survivor reads for this chunk are now complete.
*
* Convert each raw syndrome once to low/high nibble form.
* pd_low[] is overwritten in place.
*/
for (k = 0; k < nr; ++k) {
asm volatile ("vmovdqa %0,%%ymm0" : : "m" (pd_low[k * 32]));
asm volatile ("vpsrlw $4,%ymm0,%ymm1");
asm volatile ("vpand %ymm7,%ymm0,%ymm0");
asm volatile ("vpand %ymm7,%ymm1,%ymm1");
asm volatile ("vmovdqa %%ymm0,%0" : "=m" (pd_low[k * 32]));
asm volatile ("vmovdqa %%ymm1,%0" : "=m" (pd_high[k * 32]));
}
/*
* Reconstruct each missing block.
*
* Keep independent low/high accumulation chains:
*
* ymm0 = low accumulator
* ymm1 = high accumulator
* ymm2 = low table/result
* ymm3 = high table/result
* ymm4 = syndrome low
* ymm5 = syndrome high
*/
for (j = 0; j < nr; ++j) {
const uint8_t **t = R[j];
/* coefficient 0 initializes the accumulators */
asm volatile ("vbroadcasti128 %0,%%ymm0" : : "m" (t[0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm1" : : "m" (t[0][16]));
asm volatile ("vmovdqa %0,%%ymm4" : : "m" (pd_low[0]));
asm volatile ("vmovdqa %0,%%ymm5" : : "m" (pd_high[0]));
asm volatile ("vpshufb %ymm4,%ymm0,%ymm0");
asm volatile ("vpshufb %ymm5,%ymm1,%ymm1");
for (k = 1; k < nr; ++k) {
asm volatile ("vbroadcasti128 %0,%%ymm2" : : "m" (t[k][0]));
asm volatile ("vbroadcasti128 %0,%%ymm3" : : "m" (t[k][16]));
asm volatile ("vmovdqa %0,%%ymm4" : : "m" (pd_low[k * 32]));
asm volatile ("vmovdqa %0,%%ymm5" : : "m" (pd_high[k * 32]));
asm volatile ("vpshufb %ymm4,%ymm2,%ymm2");
asm volatile ("vpshufb %ymm5,%ymm3,%ymm3");
asm volatile ("vpxor %ymm2,%ymm0,%ymm0");
asm volatile ("vpxor %ymm3,%ymm1,%ymm1");
}
asm volatile ("vpxor %ymm1,%ymm0,%ymm0");
asm volatile ("vmovdqa %%ymm0,%0" : "=m" (pa[j][i]));
}
}
raid_avx_end();
}
#ifdef CONFIG_X86_64
/*
* RAID recovering for two disks AVX2 extended implementation
*/
static __always_inline void raid_rec2_avx2ext_delta(int *id, int *ip, int nd, size_t size, void **vv)
{
uint8_t **v = (uint8_t **)vv;
const int N = 2;
uint8_t *p[N];
uint8_t *pa[N];
uint8_t G[N * N];
uint8_t V[N * N];
size_t i;
int j, k;
/* setup the coefficients matrix */
for (j = 0; j < N; ++j)
for (k = 0; k < N; ++k)
G[j * N + k] = A(ip[j], id[k]);
/* invert it to solve the system of linear equations */
raid_invert(G, V, N);
/* compute delta parity */
raid_delta_gen(N, id, ip, nd, size, vv);
for (j = 0; j < N; ++j) {
p[j] = v[nd + ip[j]];
pa[j] = v[id[j]];
}
raid_avx_begin();
asm volatile ("vpbroadcastb %0,%%ymm6" : : "m" (gfconst16.low4[0]));
/* the inverse matrix V[] is constant for the whole recovery */
asm volatile ("vbroadcasti128 %0,%%ymm8" : : "m" (raid_gfmulpshufb[V[0]][0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm9" : : "m" (raid_gfmulpshufb[V[0]][1][0]));
asm volatile ("vbroadcasti128 %0,%%ymm10" : : "m" (raid_gfmulpshufb[V[1]][0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm11" : : "m" (raid_gfmulpshufb[V[1]][1][0]));
asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (raid_gfmulpshufb[V[2]][0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (raid_gfmulpshufb[V[2]][1][0]));
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (raid_gfmulpshufb[V[3]][0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm15" : : "m" (raid_gfmulpshufb[V[3]][1][0]));
for (i = 0; i < size; i += 32) {
/* d0 = p[0] ^ pa[0] */
asm volatile ("vmovdqa %0,%%ymm0" : : "m" (p[0][i]));
asm volatile ("vmovdqa %0,%%ymm4" : : "m" (pa[0][i]));
asm volatile ("vpxor %ymm4,%ymm0,%ymm0");
/* d1 = p[1] ^ pa[1] */
asm volatile ("vmovdqa %0,%%ymm1" : : "m" (p[1][i]));
asm volatile ("vmovdqa %0,%%ymm4" : : "m" (pa[1][i]));
asm volatile ("vpxor %ymm4,%ymm1,%ymm1");
/*
* Split both deltas into low/high nibbles once.
*
* ymm0 = d0 low
* ymm2 = d0 high
* ymm1 = d1 low
* ymm3 = d1 high
*/
asm volatile ("vpsrlw $4,%ymm0,%ymm2");
asm volatile ("vpsrlw $4,%ymm1,%ymm3");
asm volatile ("vpand %ymm6,%ymm0,%ymm0");
asm volatile ("vpand %ymm6,%ymm2,%ymm2");
asm volatile ("vpand %ymm6,%ymm1,%ymm1");
asm volatile ("vpand %ymm6,%ymm3,%ymm3");
/* pa[0] = V[0] * d0 ^ V[1] * d1 */
asm volatile ("vpshufb %ymm0,%ymm8,%ymm4");
asm volatile ("vpshufb %ymm2,%ymm9,%ymm5");
asm volatile ("vpxor %ymm5,%ymm4,%ymm4");
asm volatile ("vpshufb %ymm1,%ymm10,%ymm5");
asm volatile ("vpxor %ymm5,%ymm4,%ymm4");
asm volatile ("vpshufb %ymm3,%ymm11,%ymm5");
asm volatile ("vpxor %ymm5,%ymm4,%ymm4");
asm volatile ("vmovdqa %%ymm4,%0" : "=m" (pa[0][i]));
/* pa[1] = V[2] * d0 ^ V[3] * d1 */
asm volatile ("vpshufb %ymm0,%ymm12,%ymm4");
asm volatile ("vpshufb %ymm2,%ymm13,%ymm5");
asm volatile ("vpxor %ymm5,%ymm4,%ymm4");
asm volatile ("vpshufb %ymm1,%ymm14,%ymm5");
asm volatile ("vpxor %ymm5,%ymm4,%ymm4");
asm volatile ("vpshufb %ymm3,%ymm15,%ymm5");
asm volatile ("vpxor %ymm5,%ymm4,%ymm4");
asm volatile ("vmovdqa %%ymm4,%0" : "=m" (pa[1][i]));
}
raid_avx_end();
}
/*
* RAID recovering for two disks with P and Q AVX2 implementation
*/
static __always_inline void raid_rec2of2_avx2ext(int *id, int *ip, int nd, size_t size, void **vv)
{
uint8_t **v = (uint8_t **)vv;
const int N = 2;
uint8_t *p[N];
uint8_t *pa[N];
uint8_t C[N];
size_t i;
/* get multiplication coefficients */
C[0] = inv(powgen(id[1] - id[0]) ^ 1);
C[1] = inv(powgen(id[0]) ^ powgen(id[1]));
/* compute delta parity */
raid_delta_gen(N, id, ip, nd, size, vv);
p[0] = v[nd];
p[1] = v[nd + 1];
pa[0] = v[id[0]];
pa[1] = v[id[1]];
raid_avx_begin();
asm volatile ("vpbroadcastb %0,%%ymm7" : : "m" (gfconst16.low4[0]));
/* the multiplication tables are constant for the whole recovery */
asm volatile ("vbroadcasti128 %0,%%ymm8" : : "m" (raid_gfmulpshufb[C[0]][0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm9" : : "m" (raid_gfmulpshufb[C[0]][1][0]));
asm volatile ("vbroadcasti128 %0,%%ymm10" : : "m" (raid_gfmulpshufb[C[1]][0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm11" : : "m" (raid_gfmulpshufb[C[1]][1][0]));
for (i = 0; i < size; i += 32) {
/* d0 = p[0] ^ pa[0] */
asm volatile ("vmovdqa %0,%%ymm0" : : "m" (p[0][i]));
asm volatile ("vmovdqa %0,%%ymm2" : : "m" (pa[0][i]));
asm volatile ("vpxor %ymm2,%ymm0,%ymm0");
/* d1 = p[1] ^ pa[1] */
asm volatile ("vmovdqa %0,%%ymm1" : : "m" (p[1][i]));
asm volatile ("vmovdqa %0,%%ymm3" : : "m" (pa[1][i]));
asm volatile ("vpxor %ymm3,%ymm1,%ymm1");
/* C[0] * d0 */
asm volatile ("vpsrlw $4,%ymm0,%ymm5");
asm volatile ("vpand %ymm7,%ymm0,%ymm4");
asm volatile ("vpand %ymm7,%ymm5,%ymm5");
asm volatile ("vpshufb %ymm4,%ymm8,%ymm2");
asm volatile ("vpshufb %ymm5,%ymm9,%ymm3");
asm volatile ("vpxor %ymm3,%ymm2,%ymm6");
/* C[1] * d1 */
asm volatile ("vpsrlw $4,%ymm1,%ymm5");
asm volatile ("vpand %ymm7,%ymm1,%ymm4");
asm volatile ("vpand %ymm7,%ymm5,%ymm5");
asm volatile ("vpshufb %ymm4,%ymm10,%ymm2");
asm volatile ("vpshufb %ymm5,%ymm11,%ymm3");
asm volatile ("vpxor %ymm2,%ymm6,%ymm6");
asm volatile ("vpxor %ymm3,%ymm6,%ymm6");
/* pa[1] = C[0] * d0 ^ C[1] * d1 */
asm volatile ("vmovdqa %%ymm6,%0" : "=m" (pa[1][i]));
/* pa[0] = d0 ^ pa[1] */
asm volatile ("vpxor %ymm6,%ymm0,%ymm0");
asm volatile ("vmovdqa %%ymm0,%0" : "=m" (pa[0][i]));
}
raid_avx_end();
}
/*
* RAID recovering AVX2 implementation optimized for up to three failures.
*
* Process 64 bytes at a time as two independent 32-byte lanes.
* Multiplication tables are broadcast once and shared between both lanes.
*
* Note that it uses 16 registers, meaning that x64 is required.
*/
static __always_inline void raid_recX_avx2ext_123(int nr, int *id, int *ip, int nd, size_t size, void **vv)
{
uint8_t **v = (uint8_t **)vv;
uint8_t *p[RAID_PARITY_MAX];
uint8_t *pa[RAID_PARITY_MAX];
uint8_t *src[RAID_DATA_MAX];
uint8_t G[RAID_PARITY_MAX * RAID_PARITY_MAX];
uint8_t V[RAID_PARITY_MAX * RAID_PARITY_MAX];
const uint8_t *S[RAID_DATA_MAX][RAID_PARITY_MAX];
const uint8_t *R[RAID_PARITY_MAX][RAID_PARITY_MAX];
size_t i;
int d, j, k, s;
int ns;
int has_p;
BUG_ON(nr < 1 || nr > 3);
/* setup the coefficients matrix */
for (j = 0; j < nr; ++j)
for (k = 0; k < nr; ++k)
G[j * nr + k] = A(ip[j], id[k]);
/* invert it to solve the system of linear equations */
raid_invert(G, V, nr);
/* setup selected parity and destination pointers */
for (j = 0; j < nr; ++j) {
p[j] = v[nd + ip[j]];
pa[j] = v[id[j]];
}
/* ip[] is ordered. If P is available, it is always ip[0] */
has_p = ip[0] == 0;
/* build the compact surviving-data list and its syndrome tables */
ns = 0;
k = 0;
for (d = 0; d < nd; ++d) {
if (k < nr && d == id[k]) {
++k;
continue;
}
src[ns] = v[d];
for (j = 0; j < nr; ++j)
S[ns][j] = &raid_gfmulpshufb[A(ip[j], d)][0][0];
++ns;
}
BUG_ON(k != nr);
BUG_ON(ns != nd - nr);
/* precompute inverse-matrix multiplication table pointers */
for (j = 0; j < nr; ++j)
for (k = 0; k < nr; ++k)
R[j][k] = &raid_gfmulpshufb[V[j * nr + k]][0][0];
raid_avx_begin();
for (i = 0; i < size; i += 64) {
asm volatile ("vpbroadcastb %0,%%ymm15" : : "m" (gfconst16.low4[0]));
/*
* Start each syndrome with the corresponding stored parity.
*
* During syndrome computation:
*
* ymm0/ymm1 syndrome 0, first/second 32 bytes
* ymm2/ymm3 syndrome 1, first/second 32 bytes
* ymm4/ymm5 syndrome 2, first/second 32 bytes
*
* ymm6/ymm7 source low, first/second 32 bytes
* ymm8/ymm9 source high, first/second 32 bytes
* ymm12/ymm13 multiplication table / temporary
* ymm15 low-nibble mask
*/
asm volatile ("vmovdqa %0,%%ymm0" : : "m" (p[0][i]));
asm volatile ("vmovdqa %0,%%ymm1" : : "m" (p[0][i + 32]));
if (nr >= 2) {
asm volatile ("vmovdqa %0,%%ymm2" : : "m" (p[1][i]));
asm volatile ("vmovdqa %0,%%ymm3" : : "m" (p[1][i + 32]));
}
if (nr >= 3) {
asm volatile ("vmovdqa %0,%%ymm4" : : "m" (p[2][i]));
asm volatile ("vmovdqa %0,%%ymm5" : : "m" (p[2][i + 32]));
}
/* add all surviving data contributions */
for (s = 0; s < ns; ++s) {
const uint8_t **t = S[s];
asm volatile ("vmovdqa %0,%%ymm6" : : "m" (src[s][i]));
asm volatile ("vmovdqa %0,%%ymm7" : : "m" (src[s][i + 32]));
/*
* P has coefficient 1 for every data disk.
* Do the XOR before destroying the original source
* while splitting it into low/high nibbles.
*/
if (has_p) {
asm volatile ("vpxor %ymm6,%ymm0,%ymm0");
asm volatile ("vpxor %ymm7,%ymm1,%ymm1");
/* split both 32-byte source lanes */
asm volatile ("vpsrlw $4,%ymm6,%ymm8");
asm volatile ("vpsrlw $4,%ymm7,%ymm9");
asm volatile ("vpand %ymm15,%ymm6,%ymm6");
asm volatile ("vpand %ymm15,%ymm7,%ymm7");
asm volatile ("vpand %ymm15,%ymm8,%ymm8");
asm volatile ("vpand %ymm15,%ymm9,%ymm9");
} else {
/* split both 32-byte source lanes */
asm volatile ("vpsrlw $4,%ymm6,%ymm8");
asm volatile ("vpsrlw $4,%ymm7,%ymm9");
asm volatile ("vpand %ymm15,%ymm6,%ymm6");
asm volatile ("vpand %ymm15,%ymm7,%ymm7");
asm volatile ("vpand %ymm15,%ymm8,%ymm8");
asm volatile ("vpand %ymm15,%ymm9,%ymm9");
/*
* Syndrome 0.
*
* Share each table broadcast between the two
* 32-byte lanes.
*/
asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (t[0][0]));
asm volatile ("vmovdqa %ymm12,%ymm13");
asm volatile ("vpshufb %ymm6,%ymm12,%ymm12");
asm volatile ("vpshufb %ymm7,%ymm13,%ymm13");
asm volatile ("vpxor %ymm12,%ymm0,%ymm0");
asm volatile ("vpxor %ymm13,%ymm1,%ymm1");
asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (t[0][16]));
asm volatile ("vmovdqa %ymm12,%ymm13");
asm volatile ("vpshufb %ymm8,%ymm12,%ymm12");
asm volatile ("vpshufb %ymm9,%ymm13,%ymm13");
asm volatile ("vpxor %ymm12,%ymm0,%ymm0");
asm volatile ("vpxor %ymm13,%ymm1,%ymm1");
}
/* syndrome 1 */
if (nr >= 2) {
asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (t[1][0]));
asm volatile ("vmovdqa %ymm12,%ymm13");
asm volatile ("vpshufb %ymm6,%ymm12,%ymm12");
asm volatile ("vpshufb %ymm7,%ymm13,%ymm13");
asm volatile ("vpxor %ymm12,%ymm2,%ymm2");
asm volatile ("vpxor %ymm13,%ymm3,%ymm3");
asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (t[1][16]));
asm volatile ("vmovdqa %ymm12,%ymm13");
asm volatile ("vpshufb %ymm8,%ymm12,%ymm12");
asm volatile ("vpshufb %ymm9,%ymm13,%ymm13");
asm volatile ("vpxor %ymm12,%ymm2,%ymm2");
asm volatile ("vpxor %ymm13,%ymm3,%ymm3");
}
/* syndrome 2 */
if (nr >= 3) {
asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (t[2][0]));
asm volatile ("vmovdqa %ymm12,%ymm13");
asm volatile ("vpshufb %ymm6,%ymm12,%ymm12");
asm volatile ("vpshufb %ymm7,%ymm13,%ymm13");
asm volatile ("vpxor %ymm12,%ymm4,%ymm4");
asm volatile ("vpxor %ymm13,%ymm5,%ymm5");
asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (t[2][16]));
asm volatile ("vmovdqa %ymm12,%ymm13");
asm volatile ("vpshufb %ymm8,%ymm12,%ymm12");
asm volatile ("vpshufb %ymm9,%ymm13,%ymm13");
asm volatile ("vpxor %ymm12,%ymm4,%ymm4");
asm volatile ("vpxor %ymm13,%ymm5,%ymm5");
}
}
/*
* Split all completed syndromes.
*
* After this:
*
* syndrome 0:
* ymm0 / ymm6 first 32 bytes low/high
* ymm1 / ymm7 second 32 bytes low/high
*
* syndrome 1:
* ymm2 / ymm8 first 32 bytes low/high
* ymm3 / ymm9 second 32 bytes low/high
*
* syndrome 2:
* ymm4 / ymm10 first 32 bytes low/high
* ymm5 / ymm11 second 32 bytes low/high
*/
asm volatile ("vpsrlw $4,%ymm0,%ymm6");
asm volatile ("vpsrlw $4,%ymm1,%ymm7");
asm volatile ("vpand %ymm15,%ymm0,%ymm0");
asm volatile ("vpand %ymm15,%ymm1,%ymm1");
asm volatile ("vpand %ymm15,%ymm6,%ymm6");
asm volatile ("vpand %ymm15,%ymm7,%ymm7");
if (nr >= 2) {
asm volatile ("vpsrlw $4,%ymm2,%ymm8");
asm volatile ("vpsrlw $4,%ymm3,%ymm9");
asm volatile ("vpand %ymm15,%ymm2,%ymm2");
asm volatile ("vpand %ymm15,%ymm3,%ymm3");
asm volatile ("vpand %ymm15,%ymm8,%ymm8");
asm volatile ("vpand %ymm15,%ymm9,%ymm9");
}
if (nr >= 3) {
asm volatile ("vpsrlw $4,%ymm4,%ymm10");
asm volatile ("vpsrlw $4,%ymm5,%ymm11");
asm volatile ("vpand %ymm15,%ymm4,%ymm4");
asm volatile ("vpand %ymm15,%ymm5,%ymm5");
asm volatile ("vpand %ymm15,%ymm10,%ymm10");
asm volatile ("vpand %ymm15,%ymm11,%ymm11");
}
/*
* Reconstruct every missing data block.
*
* ymm12/ymm13 are a shared multiplication table pair.
* ymm14/ymm15 accumulate the two 32-byte output lanes.
*
* At this point ymm15 is no longer needed as the nibble mask,
* so all 16 YMM registers are available.
*/
for (j = 0; j < nr; ++j) {
const uint8_t **t = R[j];
/*
* First coefficient.
* Initialize both output accumulators from the low
* nibble products.
*/
asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (t[0][0]));
asm volatile ("vmovdqa %ymm12,%ymm13");
asm volatile ("vpshufb %ymm0,%ymm12,%ymm12");
asm volatile ("vpshufb %ymm1,%ymm13,%ymm13");
asm volatile ("vmovdqa %ymm12,%ymm14");
asm volatile ("vmovdqa %ymm13,%ymm15");
asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (t[0][16]));
asm volatile ("vmovdqa %ymm12,%ymm13");
asm volatile ("vpshufb %ymm6,%ymm12,%ymm12");
asm volatile ("vpshufb %ymm7,%ymm13,%ymm13");
asm volatile ("vpxor %ymm12,%ymm14,%ymm14");
asm volatile ("vpxor %ymm13,%ymm15,%ymm15");
/* second coefficient */
if (nr >= 2) {
asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (t[1][0]));
asm volatile ("vmovdqa %ymm12,%ymm13");
asm volatile ("vpshufb %ymm2,%ymm12,%ymm12");
asm volatile ("vpshufb %ymm3,%ymm13,%ymm13");
asm volatile ("vpxor %ymm12,%ymm14,%ymm14");
asm volatile ("vpxor %ymm13,%ymm15,%ymm15");
asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (t[1][16]));
asm volatile ("vmovdqa %ymm12,%ymm13");
asm volatile ("vpshufb %ymm8,%ymm12,%ymm12");
asm volatile ("vpshufb %ymm9,%ymm13,%ymm13");
asm volatile ("vpxor %ymm12,%ymm14,%ymm14");
asm volatile ("vpxor %ymm13,%ymm15,%ymm15");
}
/* third coefficient */
if (nr >= 3) {
asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (t[2][0]));
asm volatile ("vmovdqa %ymm12,%ymm13");
asm volatile ("vpshufb %ymm4,%ymm12,%ymm12");
asm volatile ("vpshufb %ymm5,%ymm13,%ymm13");
asm volatile ("vpxor %ymm12,%ymm14,%ymm14");
asm volatile ("vpxor %ymm13,%ymm15,%ymm15");
asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (t[2][16]));
asm volatile ("vmovdqa %ymm12,%ymm13");
asm volatile ("vpshufb %ymm10,%ymm12,%ymm12");
asm volatile ("vpshufb %ymm11,%ymm13,%ymm13");
asm volatile ("vpxor %ymm12,%ymm14,%ymm14");
asm volatile ("vpxor %ymm13,%ymm15,%ymm15");
}
asm volatile ("vmovdqa %%ymm14,%0" : "=m" (pa[j][i]));
asm volatile ("vmovdqa %%ymm15,%0" : "=m" (pa[j][i + 32]));
}
}
raid_avx_end();
}
/*
* RAID recovering AVX2 implementation.
*
* Compute only the selected syndromes, keeping them in registers.
* This avoids raid_delta_gen(), temporary syndrome buffers, and the
* generation of unused parity rows.
*/
static __always_inline void raid_recX_avx2ext(int nr, int *id, int *ip, int nd, size_t size, void **vv)
{
uint8_t **v = (uint8_t **)vv;
uint8_t *p[RAID_PARITY_MAX];
uint8_t *pa[RAID_PARITY_MAX];
uint8_t *src[RAID_DATA_MAX];
uint8_t G[RAID_PARITY_MAX * RAID_PARITY_MAX];
uint8_t V[RAID_PARITY_MAX * RAID_PARITY_MAX];
const uint8_t *S[RAID_DATA_MAX][RAID_PARITY_MAX];
const uint8_t *R[RAID_PARITY_MAX][RAID_PARITY_MAX];
size_t i;
int d, j, k, s;
int ns;
int has_p;
/* setup the coefficients matrix */
for (j = 0; j < nr; ++j)
for (k = 0; k < nr; ++k)
G[j * nr + k] = A(ip[j], id[k]);
/* invert it to solve the system of linear equations */
raid_invert(G, V, nr);
/* setup selected parity and destination pointers */
for (j = 0; j < nr; ++j) {
p[j] = v[nd + ip[j]];
pa[j] = v[id[j]];
}
/* ip[] is ordered. If P is available, it is always ip[0] */
has_p = ip[0] == 0;
/* build the compact surviving-data list and its syndrome tables */
ns = 0;
k = 0;
for (d = 0; d < nd; ++d) {
if (k < nr && d == id[k]) {
++k;
continue;
}
src[ns] = v[d];
for (j = 0; j < nr; ++j)
S[ns][j] = &raid_gfmulpshufb[A(ip[j], d)][0][0];
++ns;
}
BUG_ON(k != nr);
BUG_ON(ns != nd - nr);
/* precompute inverse-matrix multiplication table pointers */
for (j = 0; j < nr; ++j)
for (k = 0; k < nr; ++k)
R[j][k] = &raid_gfmulpshufb[V[j * nr + k]][0][0];
raid_avx_begin();
asm volatile ("vpbroadcastb %0,%%ymm15" : : "m" (gfconst16.low4[0]));
for (i = 0; i < size; i += 32) {
/*
* Start each syndrome with the corresponding stored parity.
*
* During syndrome computation:
*
* ymm0 syndrome 0
* ymm2 syndrome 1
* ymm4 syndrome 2
* ymm6 syndrome 3
* ymm8 syndrome 4
* ymm10 syndrome 5
*
* ymm12 source / source low nibble
* ymm13 source high nibble
* ymm14 multiplication table / temporary
* ymm15 low-nibble mask
*/
asm volatile ("vmovdqa %0,%%ymm0" : : "m" (p[0][i]));
if (nr >= 2)
asm volatile ("vmovdqa %0,%%ymm2" : : "m" (p[1][i]));
if (nr >= 3)
asm volatile ("vmovdqa %0,%%ymm4" : : "m" (p[2][i]));
if (nr >= 4)
asm volatile ("vmovdqa %0,%%ymm6" : : "m" (p[3][i]));
if (nr >= 5)
asm volatile ("vmovdqa %0,%%ymm8" : : "m" (p[4][i]));
if (nr >= 6)
asm volatile ("vmovdqa %0,%%ymm10" : : "m" (p[5][i]));
/* add all surviving data contributions */
for (s = 0; s < ns; ++s) {
const uint8_t **t = S[s];
asm volatile ("vmovdqa %0,%%ymm12" : : "m" (src[s][i]));
/*
* P has coefficient 1 for every data disk.
*
* Keep the simple XOR fast path when P is the
* first selected parity. Otherwise syndrome 0
* uses the normal vpshufb multiplication.
*/
if (has_p) {
asm volatile ("vpxor %ymm12,%ymm0,%ymm0");
asm volatile ("vpsrlw $4,%ymm12,%ymm13");
asm volatile ("vpand %ymm15,%ymm12,%ymm12");
asm volatile ("vpand %ymm15,%ymm13,%ymm13");
} else {
asm volatile ("vpsrlw $4,%ymm12,%ymm13");
asm volatile ("vpand %ymm15,%ymm12,%ymm12");
asm volatile ("vpand %ymm15,%ymm13,%ymm13");
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[0][0]));
asm volatile ("vpshufb %ymm12,%ymm14,%ymm14");
asm volatile ("vpxor %ymm14,%ymm0,%ymm0");
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[0][16]));
asm volatile ("vpshufb %ymm13,%ymm14,%ymm14");
asm volatile ("vpxor %ymm14,%ymm0,%ymm0");
}
if (nr >= 2) {
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[1][0]));
asm volatile ("vpshufb %ymm12,%ymm14,%ymm14");
asm volatile ("vpxor %ymm14,%ymm2,%ymm2");
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[1][16]));
asm volatile ("vpshufb %ymm13,%ymm14,%ymm14");
asm volatile ("vpxor %ymm14,%ymm2,%ymm2");
}
if (nr >= 3) {
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[2][0]));
asm volatile ("vpshufb %ymm12,%ymm14,%ymm14");
asm volatile ("vpxor %ymm14,%ymm4,%ymm4");
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[2][16]));
asm volatile ("vpshufb %ymm13,%ymm14,%ymm14");
asm volatile ("vpxor %ymm14,%ymm4,%ymm4");
}
if (nr >= 4) {
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[3][0]));
asm volatile ("vpshufb %ymm12,%ymm14,%ymm14");
asm volatile ("vpxor %ymm14,%ymm6,%ymm6");
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[3][16]));
asm volatile ("vpshufb %ymm13,%ymm14,%ymm14");
asm volatile ("vpxor %ymm14,%ymm6,%ymm6");
}
if (nr >= 5) {
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[4][0]));
asm volatile ("vpshufb %ymm12,%ymm14,%ymm14");
asm volatile ("vpxor %ymm14,%ymm8,%ymm8");
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[4][16]));
asm volatile ("vpshufb %ymm13,%ymm14,%ymm14");
asm volatile ("vpxor %ymm14,%ymm8,%ymm8");
}
if (nr >= 6) {
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[5][0]));
asm volatile ("vpshufb %ymm12,%ymm14,%ymm14");
asm volatile ("vpxor %ymm14,%ymm10,%ymm10");
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[5][16]));
asm volatile ("vpshufb %ymm13,%ymm14,%ymm14");
asm volatile ("vpxor %ymm14,%ymm10,%ymm10");
}
}
/*
* Split every completed syndrome once.
*
* After this:
*
* ymm0 /ymm1 delta 0 low/high
* ymm2 /ymm3 delta 1 low/high
* ymm4 /ymm5 delta 2 low/high
* ymm6 /ymm7 delta 3 low/high
* ymm8 /ymm9 delta 4 low/high
* ymm10/ymm11 delta 5 low/high
*/
asm volatile ("vpsrlw $4,%ymm0,%ymm1");
asm volatile ("vpand %ymm15,%ymm0,%ymm0");
asm volatile ("vpand %ymm15,%ymm1,%ymm1");
if (nr >= 2) {
asm volatile ("vpsrlw $4,%ymm2,%ymm3");
asm volatile ("vpand %ymm15,%ymm2,%ymm2");
asm volatile ("vpand %ymm15,%ymm3,%ymm3");
}
if (nr >= 3) {
asm volatile ("vpsrlw $4,%ymm4,%ymm5");
asm volatile ("vpand %ymm15,%ymm4,%ymm4");
asm volatile ("vpand %ymm15,%ymm5,%ymm5");
}
if (nr >= 4) {
asm volatile ("vpsrlw $4,%ymm6,%ymm7");
asm volatile ("vpand %ymm15,%ymm6,%ymm6");
asm volatile ("vpand %ymm15,%ymm7,%ymm7");
}
if (nr >= 5) {
asm volatile ("vpsrlw $4,%ymm8,%ymm9");
asm volatile ("vpand %ymm15,%ymm8,%ymm8");
asm volatile ("vpand %ymm15,%ymm9,%ymm9");
}
if (nr >= 6) {
asm volatile ("vpsrlw $4,%ymm10,%ymm11");
asm volatile ("vpand %ymm15,%ymm10,%ymm10");
asm volatile ("vpand %ymm15,%ymm11,%ymm11");
}
/* reconstruct every missing data block */
for (j = 0; j < nr; ++j) {
const uint8_t **t = R[j];
/* first coefficient initializes the low/high accumulators */
asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (t[0][0]));
asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (t[0][16]));
asm volatile ("vpshufb %ymm0,%ymm12,%ymm12");
asm volatile ("vpshufb %ymm1,%ymm13,%ymm13");
if (nr >= 2) {
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[1][0]));
asm volatile ("vpshufb %ymm2,%ymm14,%ymm14");
asm volatile ("vpxor %ymm14,%ymm12,%ymm12");
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[1][16]));
asm volatile ("vpshufb %ymm3,%ymm14,%ymm14");
asm volatile ("vpxor %ymm14,%ymm13,%ymm13");
}
if (nr >= 3) {
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[2][0]));
asm volatile ("vpshufb %ymm4,%ymm14,%ymm14");
asm volatile ("vpxor %ymm14,%ymm12,%ymm12");
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[2][16]));
asm volatile ("vpshufb %ymm5,%ymm14,%ymm14");
asm volatile ("vpxor %ymm14,%ymm13,%ymm13");
}
if (nr >= 4) {
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[3][0]));
asm volatile ("vpshufb %ymm6,%ymm14,%ymm14");
asm volatile ("vpxor %ymm14,%ymm12,%ymm12");
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[3][16]));
asm volatile ("vpshufb %ymm7,%ymm14,%ymm14");
asm volatile ("vpxor %ymm14,%ymm13,%ymm13");
}
if (nr >= 5) {
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[4][0]));
asm volatile ("vpshufb %ymm8,%ymm14,%ymm14");
asm volatile ("vpxor %ymm14,%ymm12,%ymm12");
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[4][16]));
asm volatile ("vpshufb %ymm9,%ymm14,%ymm14");
asm volatile ("vpxor %ymm14,%ymm13,%ymm13");
}
if (nr >= 6) {
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[5][0]));
asm volatile ("vpshufb %ymm10,%ymm14,%ymm14");
asm volatile ("vpxor %ymm14,%ymm12,%ymm12");
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[5][16]));
asm volatile ("vpshufb %ymm11,%ymm14,%ymm14");
asm volatile ("vpxor %ymm14,%ymm13,%ymm13");
}
asm volatile ("vpxor %ymm13,%ymm12,%ymm12");
asm volatile ("vmovdqa %%ymm12,%0" : "=m" (pa[j][i]));
}
}
raid_avx_end();
}
#endif
void raid_gen2_avx2_raid(int nd, size_t size, void **vv)
{
raid_gen2_avx2_gen(nd, size, vv, 2);
}
void raid_gen2_avx2_aes(int nd, size_t size, void **vv)
{
raid_gen2_avx2_gen(nd, size, vv, 3);
}
#ifdef CONFIG_X86_64
void raid_gen2_avx2ext_raid(int nd, size_t size, void **vv)
{
raid_gen2_avx2ext_gen(nd, size, vv, 2);
}
void raid_gen2_avx2ext_aes(int nd, size_t size, void **vv)
{
raid_gen2_avx2ext_gen(nd, size, vv, 3);
}
void raid_gen3_avx2ext_raid(int nd, size_t size, void **vv)
{
raid_gen3_avx2ext_gen(nd, size, vv, 2);
}
void raid_gen3_avx2ext_aes(int nd, size_t size, void **vv)
{
raid_gen3_avx2ext_gen(nd, size, vv, 3);
}
void raid_gen4_avx2ext_raid(int nd, size_t size, void **vv)
{
raid_gen4_avx2ext_gen(nd, size, vv, 2);
}
void raid_gen4_avx2ext_aes(int nd, size_t size, void **vv)
{
raid_gen4_avx2ext_gen(nd, size, vv, 3);
}
/*
* GEN5 (penta parity with Cauchy matrix) AVX2 implementation
*
* Note that it uses 16 registers, meaning that x64 is required.
*/
void raid_gen5_avx2ext_raid(int nd, size_t size, void **vv)
{
raid_genX_avx2ext(nd, size, vv, 5, 2);
}
void raid_gen5_avx2ext_aes(int nd, size_t size, void **vv)
{
raid_genX_avx2ext(nd, size, vv, 5, 3);
}
/*
* GEN6 (hexa parity with Cauchy matrix) AVX2 implementation
*
* Note that it uses 16 registers, meaning that x64 is required.
*/
void raid_gen6_avx2ext_raid(int nd, size_t size, void **vv)
{
raid_genX_avx2ext(nd, size, vv, 6, 2);
}
void raid_gen6_avx2ext_aes(int nd, size_t size, void **vv)
{
raid_genX_avx2ext(nd, size, vv, 6, 3);
}
#endif
void raid_rec1_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
{
BUG_ON(nr != 1);
/* if recovering with P uses the delta function */
if (ip[0] == 0) {
raid_rec1of1(id, nd, size, vv);
return;
}
raid_rec1_avx2_delta(1, id, ip, nd, size, vv);
}
void raid_rec2_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
{
BUG_ON(nr != 2);
/* if recovering with P,Q use the specialized function */
if (ip[0] == 0 && ip[1] == 1) {
raid_rec2of2_avx2(id, ip, nd, size, vv);
return;
}
raid_rec2_avx2_delta(2, id, ip, nd, size, vv);
}
void raid_rec3_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
{
BUG_ON(nr != 3);
raid_recX_avx2_1234(3, id, ip, nd, size, vv);
}
void raid_rec4_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
{
BUG_ON(nr != 4);
raid_recX_avx2_1234(4, id, ip, nd, size, vv);
}
void raid_rec5_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
{
BUG_ON(nr != 5);
raid_recX_avx2(5, id, ip, nd, size, vv);
}
void raid_rec6_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
{
BUG_ON(nr != 6);
raid_recX_avx2(6, id, ip, nd, size, vv);
}
#ifdef CONFIG_X86_64
void raid_rec1_avx2ext(int nr, int *id, int *ip, int nd, size_t size, void **vv)
{
BUG_ON(nr != 1);
/* if recovering with P uses the delta function */
if (ip[0] == 0) {
raid_rec1of1(id, nd, size, vv);
return;
}
/* if recovering with Q uses the delta function */
if (ip[0] == 1) {
raid_rec1_avx2_delta(1, id, ip, nd, size, vv);
return;
}
raid_recX_avx2ext_123(1, id, ip, nd, size, vv);
}
void raid_rec2_avx2ext(int nr, int *id, int *ip, int nd, size_t size, void **vv)
{
BUG_ON(nr != 2);
/* if recovering with P,Q uses the delta function */
if (ip[0] == 0 && ip[1] == 1) {
raid_rec2of2_avx2ext(id, ip, nd, size, vv);
return;
}
raid_recX_avx2ext_123(2, id, ip, nd, size, vv);
}
void raid_rec3_avx2ext(int nr, int *id, int *ip, int nd, size_t size, void **vv)
{
BUG_ON(nr != 3);
raid_recX_avx2ext_123(3, id, ip, nd, size, vv);
}
void raid_rec4_avx2ext(int nr, int *id, int *ip, int nd, size_t size, void **vv)
{
BUG_ON(nr != 4);
raid_recX_avx2ext(4, id, ip, nd, size, vv);
}
void raid_rec5_avx2ext(int nr, int *id, int *ip, int nd, size_t size, void **vv)
{
BUG_ON(nr != 5);
raid_recX_avx2ext(5, id, ip, nd, size, vv);
}
void raid_rec6_avx2ext(int nr, int *id, int *ip, int nd, size_t size, void **vv)
{
BUG_ON(nr != 6);
raid_recX_avx2ext(6, id, ip, nd, size, vv);
}
#endif
void raid_register_avx2(void)
{
if (raid_cpu_has_avx2()) {
raid_gen_register(RAID_ALGO_CAUCHY_PAR1, "avx2", raid_gen1_avx2, RAID_POLY_ANY);
raid_gen_register(RAID_ALGO_CAUCHY_PAR2, "avx2", raid_gen2_avx2_raid, RAID_POLY_RAID);
raid_gen_register(RAID_ALGO_CAUCHY_PAR2, "avx2", raid_gen2_avx2_aes, RAID_POLY_AES);
#ifdef CONFIG_X86_64
raid_gen_register(RAID_ALGO_CAUCHY_PAR2, "avx2e", raid_gen2_avx2ext_raid, RAID_POLY_RAID);
raid_gen_register(RAID_ALGO_CAUCHY_PAR2, "avx2e", raid_gen2_avx2ext_aes, RAID_POLY_AES);
raid_gen_register(RAID_ALGO_CAUCHY_PAR3, "avx2e", raid_gen3_avx2ext_raid, RAID_POLY_RAID);
raid_gen_register(RAID_ALGO_CAUCHY_PAR3, "avx2e", raid_gen3_avx2ext_aes, RAID_POLY_AES);
raid_gen_register(RAID_ALGO_CAUCHY_PAR4, "avx2e", raid_gen4_avx2ext_raid, RAID_POLY_RAID);
raid_gen_register(RAID_ALGO_CAUCHY_PAR4, "avx2e", raid_gen4_avx2ext_aes, RAID_POLY_AES);
raid_gen_register(RAID_ALGO_CAUCHY_PAR5, "avx2e", raid_gen5_avx2ext_raid, RAID_POLY_RAID);
raid_gen_register(RAID_ALGO_CAUCHY_PAR5, "avx2e", raid_gen5_avx2ext_aes, RAID_POLY_AES);
raid_gen_register(RAID_ALGO_CAUCHY_PAR6, "avx2e", raid_gen6_avx2ext_raid, RAID_POLY_RAID);
raid_gen_register(RAID_ALGO_CAUCHY_PAR6, "avx2e", raid_gen6_avx2ext_aes, RAID_POLY_AES);
raid_gen_register(RAID_ALGO_VANDERMONDE_PAR3, "avx2e", raid_genz_avx2ext_raid, RAID_POLY_RAID);
#endif
raid_rec_register(RAID_ALGO_CAUCHY_PAR1, "avx2", raid_rec1_avx2, RAID_POLY_ANY);
raid_rec_register(RAID_ALGO_CAUCHY_PAR2, "avx2", raid_rec2_avx2, RAID_POLY_ANY);
raid_rec_register(RAID_ALGO_CAUCHY_PAR3, "avx2", raid_rec3_avx2, RAID_POLY_ANY);
raid_rec_register(RAID_ALGO_CAUCHY_PAR4, "avx2", raid_rec4_avx2, RAID_POLY_ANY);
raid_rec_register(RAID_ALGO_CAUCHY_PAR5, "avx2", raid_rec5_avx2, RAID_POLY_ANY);
raid_rec_register(RAID_ALGO_CAUCHY_PAR6, "avx2", raid_rec6_avx2, RAID_POLY_ANY);
#ifdef CONFIG_X86_64
raid_rec_register(RAID_ALGO_CAUCHY_PAR1, "avx2e", raid_rec1_avx2ext, RAID_POLY_ANY);
raid_rec_register(RAID_ALGO_CAUCHY_PAR2, "avx2e", raid_rec2_avx2ext, RAID_POLY_ANY);
raid_rec_register(RAID_ALGO_CAUCHY_PAR3, "avx2e", raid_rec3_avx2ext, RAID_POLY_ANY);
raid_rec_register(RAID_ALGO_CAUCHY_PAR4, "avx2e", raid_rec4_avx2ext, RAID_POLY_ANY);
raid_rec_register(RAID_ALGO_CAUCHY_PAR5, "avx2e", raid_rec5_avx2ext, RAID_POLY_ANY);
raid_rec_register(RAID_ALGO_CAUCHY_PAR6, "avx2e", raid_rec6_avx2ext, RAID_POLY_ANY);
#endif
}
}
#endif
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