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Optimize multi-parity recovery with fused syndrome generation
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This commit is contained in:
Andrea Mazzoleni
parent
5662eab6cf
commit
c829941026
1 changed files with 331 additions and 224 deletions
555
raid/avx2.c
555
raid/avx2.c
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@ -1064,74 +1064,6 @@ void raid_rec2_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
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raid_avx_begin();
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#ifdef CONFIG_X86_64
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asm volatile ("vpbroadcastb %0,%%ymm6" : : "m" (gfconst16.low4[0]));
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/* the inverse matrix V[] is constant for the whole recovery. */
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asm volatile ("vbroadcasti128 %0,%%ymm8" : : "m" (raid_gfmulpshufb[V[0]][0][0]));
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asm volatile ("vbroadcasti128 %0,%%ymm9" : : "m" (raid_gfmulpshufb[V[0]][1][0]));
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asm volatile ("vbroadcasti128 %0,%%ymm10" : : "m" (raid_gfmulpshufb[V[1]][0][0]));
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asm volatile ("vbroadcasti128 %0,%%ymm11" : : "m" (raid_gfmulpshufb[V[1]][1][0]));
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asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (raid_gfmulpshufb[V[2]][0][0]));
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asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (raid_gfmulpshufb[V[2]][1][0]));
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asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (raid_gfmulpshufb[V[3]][0][0]));
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asm volatile ("vbroadcasti128 %0,%%ymm15" : : "m" (raid_gfmulpshufb[V[3]][1][0]));
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for (i = 0; i < size; i += 32) {
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/* d0 = p[0] ^ pa[0] */
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asm volatile ("vmovdqa %0,%%ymm0" : : "m" (p[0][i]));
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asm volatile ("vmovdqa %0,%%ymm4" : : "m" (pa[0][i]));
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asm volatile ("vpxor %ymm4,%ymm0,%ymm0");
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/* d1 = p[1] ^ pa[1] */
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asm volatile ("vmovdqa %0,%%ymm1" : : "m" (p[1][i]));
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asm volatile ("vmovdqa %0,%%ymm4" : : "m" (pa[1][i]));
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asm volatile ("vpxor %ymm4,%ymm1,%ymm1");
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/*
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* Split both deltas into low/high nibbles once.
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*
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* ymm0 = d0 low
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* ymm2 = d0 high
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* ymm1 = d1 low
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* ymm3 = d1 high
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*/
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asm volatile ("vpsrlw $4,%ymm0,%ymm2");
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asm volatile ("vpsrlw $4,%ymm1,%ymm3");
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asm volatile ("vpand %ymm6,%ymm0,%ymm0");
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asm volatile ("vpand %ymm6,%ymm2,%ymm2");
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asm volatile ("vpand %ymm6,%ymm1,%ymm1");
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asm volatile ("vpand %ymm6,%ymm3,%ymm3");
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/*
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* pa[0] = V[0] * d0 ^ V[1] * d1
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*/
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asm volatile ("vpshufb %ymm0,%ymm8,%ymm4");
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asm volatile ("vpshufb %ymm2,%ymm9,%ymm5");
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asm volatile ("vpxor %ymm5,%ymm4,%ymm4");
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asm volatile ("vpshufb %ymm1,%ymm10,%ymm5");
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asm volatile ("vpxor %ymm5,%ymm4,%ymm4");
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asm volatile ("vpshufb %ymm3,%ymm11,%ymm5");
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asm volatile ("vpxor %ymm5,%ymm4,%ymm4");
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asm volatile ("vmovdqa %%ymm4,%0" : "=m" (pa[0][i]));
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/*
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* pa[1] = V[2] * d0 ^ V[3] * d1
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*/
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asm volatile ("vpshufb %ymm0,%ymm12,%ymm4");
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asm volatile ("vpshufb %ymm2,%ymm13,%ymm5");
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asm volatile ("vpxor %ymm5,%ymm4,%ymm4");
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asm volatile ("vpshufb %ymm1,%ymm14,%ymm5");
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asm volatile ("vpxor %ymm5,%ymm4,%ymm4");
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asm volatile ("vpshufb %ymm3,%ymm15,%ymm5");
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asm volatile ("vpxor %ymm5,%ymm4,%ymm4");
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asm volatile ("vmovdqa %%ymm4,%0" : "=m" (pa[1][i]));
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}
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#else /* CONFIG_X86_32 */
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asm volatile ("vpbroadcastb %0,%%ymm7" : : "m" (gfconst16.low4[0]));
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for (i = 0; i < size; i += 32) {
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@ -1190,7 +1122,6 @@ void raid_rec2_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
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asm volatile ("vmovdqa %%ymm6,%0" : "=m" (pa[1][i]));
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}
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#endif
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raid_avx_end();
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}
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@ -1227,158 +1158,6 @@ void raid_recX_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
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raid_avx_begin();
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#ifdef CONFIG_X86_64
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const uint8_t *T[RAID_PARITY_MAX * RAID_PARITY_MAX];
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/* precompute shuffle table pointers */
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for (j = 0; j < N * N; ++j)
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T[j] = &raid_gfmulpshufb[V[j]][0][0];
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asm volatile ("vpbroadcastb %0,%%ymm15" : : "m" (gfconst16.low4[0]));
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for (i = 0; i < size; i += 32) {
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/* delta */
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asm volatile (
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"movq 0(%2), %%rax\n"
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"movq 0(%3), %%rbx\n"
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"vmovdqa (%%rax, %1), %%ymm12\n"
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"vmovdqa (%%rbx, %1), %%ymm13\n"
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"vpxor %%ymm13, %%ymm12, %%ymm12\n"
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"vpsrlw $4, %%ymm12, %%ymm1\n"
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"vpand %%ymm15, %%ymm12, %%ymm0\n"
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"vpand %%ymm15, %%ymm1, %%ymm1\n"
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"cmpq $1, %0\n"
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"jbe 1f\n"
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"movq 8(%2), %%rax\n"
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"movq 8(%3), %%rbx\n"
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"vmovdqa (%%rax, %1), %%ymm12\n"
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"vmovdqa (%%rbx, %1), %%ymm13\n"
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"vpxor %%ymm13, %%ymm12, %%ymm12\n"
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"vpsrlw $4, %%ymm12, %%ymm3\n"
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"vpand %%ymm15, %%ymm12, %%ymm2\n"
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"vpand %%ymm15, %%ymm3, %%ymm3\n"
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"cmpq $2, %0\n"
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"jbe 1f\n"
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"movq 16(%2), %%rax\n"
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"movq 16(%3), %%rbx\n"
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"vmovdqa (%%rax, %1), %%ymm12\n"
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"vmovdqa (%%rbx, %1), %%ymm13\n"
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"vpxor %%ymm13, %%ymm12, %%ymm12\n"
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"vpsrlw $4, %%ymm12, %%ymm5\n"
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"vpand %%ymm15, %%ymm12, %%ymm4\n"
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"vpand %%ymm15, %%ymm5, %%ymm5\n"
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"cmpq $3, %0\n"
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"jbe 1f\n"
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"movq 24(%2), %%rax\n"
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"movq 24(%3), %%rbx\n"
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"vmovdqa (%%rax, %1), %%ymm12\n"
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"vmovdqa (%%rbx, %1), %%ymm13\n"
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"vpxor %%ymm13, %%ymm12, %%ymm12\n"
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"vpsrlw $4, %%ymm12, %%ymm7\n"
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"vpand %%ymm15, %%ymm12, %%ymm6\n"
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"vpand %%ymm15, %%ymm7, %%ymm7\n"
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"cmpq $4, %0\n"
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"jbe 1f\n"
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"movq 32(%2), %%rax\n"
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"movq 32(%3), %%rbx\n"
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"vmovdqa (%%rax, %1), %%ymm12\n"
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"vmovdqa (%%rbx, %1), %%ymm13\n"
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"vpxor %%ymm13, %%ymm12, %%ymm12\n"
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"vpsrlw $4, %%ymm12, %%ymm9\n"
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"vpand %%ymm15, %%ymm12, %%ymm8\n"
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"vpand %%ymm15, %%ymm9, %%ymm9\n"
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"cmpq $5, %0\n"
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"jbe 1f\n"
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"movq 40(%2), %%rax\n"
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"movq 40(%3), %%rbx\n"
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"vmovdqa (%%rax, %1), %%ymm12\n"
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"vmovdqa (%%rbx, %1), %%ymm13\n"
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"vpxor %%ymm13, %%ymm12, %%ymm12\n"
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"vpsrlw $4, %%ymm12, %%ymm11\n"
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"vpand %%ymm15, %%ymm12, %%ymm10\n"
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"vpand %%ymm15, %%ymm11, %%ymm11\n"
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"1:\n"
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:
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: "r" ((uint64_t)N), "r" (i), "r" (p), "r" (pa)
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: "rax", "rbx", "cc", "memory"
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);
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/* reconstruct */
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for (j = 0; j < N; ++j) {
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asm volatile (
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"movq 0(%2), %%rcx\n"
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"vbroadcasti128 0(%%rcx), %%ymm13\n"
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"vbroadcasti128 16(%%rcx), %%ymm14\n"
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"vpshufb %%ymm0, %%ymm13, %%ymm13\n"
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"vpshufb %%ymm1, %%ymm14, %%ymm14\n"
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"cmpq $1, %0\n"
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"jbe 1f\n"
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"movq 8(%2), %%rcx\n"
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"vbroadcasti128 0(%%rcx), %%ymm12\n"
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"vpshufb %%ymm2, %%ymm12, %%ymm12\n"
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"vpxor %%ymm12, %%ymm13, %%ymm13\n"
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"vbroadcasti128 16(%%rcx), %%ymm12\n"
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"vpshufb %%ymm3, %%ymm12, %%ymm12\n"
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"vpxor %%ymm12, %%ymm14, %%ymm14\n"
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"cmpq $2, %0\n"
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"jbe 1f\n"
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"movq 16(%2), %%rcx\n"
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"vbroadcasti128 0(%%rcx), %%ymm12\n"
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"vpshufb %%ymm4, %%ymm12, %%ymm12\n"
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"vpxor %%ymm12, %%ymm13, %%ymm13\n"
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"vbroadcasti128 16(%%rcx), %%ymm12\n"
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"vpshufb %%ymm5, %%ymm12, %%ymm12\n"
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"vpxor %%ymm12, %%ymm14, %%ymm14\n"
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"cmpq $3, %0\n"
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"jbe 1f\n"
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"movq 24(%2), %%rcx\n"
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"vbroadcasti128 0(%%rcx), %%ymm12\n"
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"vpshufb %%ymm6, %%ymm12, %%ymm12\n"
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"vpxor %%ymm12, %%ymm13, %%ymm13\n"
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"vbroadcasti128 16(%%rcx), %%ymm12\n"
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"vpshufb %%ymm7, %%ymm12, %%ymm12\n"
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"vpxor %%ymm12, %%ymm14, %%ymm14\n"
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"cmpq $4, %0\n"
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"jbe 1f\n"
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"movq 32(%2), %%rcx\n"
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"vbroadcasti128 0(%%rcx), %%ymm12\n"
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"vpshufb %%ymm8, %%ymm12, %%ymm12\n"
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"vpxor %%ymm12, %%ymm13, %%ymm13\n"
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"vbroadcasti128 16(%%rcx), %%ymm12\n"
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"vpshufb %%ymm9, %%ymm12, %%ymm12\n"
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"vpxor %%ymm12, %%ymm14, %%ymm14\n"
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"cmpq $5, %0\n"
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"jbe 1f\n"
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"movq 40(%2), %%rcx\n"
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"vbroadcasti128 0(%%rcx), %%ymm12\n"
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"vpshufb %%ymm10, %%ymm12, %%ymm12\n"
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"vpxor %%ymm12, %%ymm13, %%ymm13\n"
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"vbroadcasti128 16(%%rcx), %%ymm12\n"
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"vpshufb %%ymm11, %%ymm12, %%ymm12\n"
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"vpxor %%ymm12, %%ymm14, %%ymm14\n"
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"1:\n"
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"vpxor %%ymm14, %%ymm13, %%ymm13\n"
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"movq %3, %%rax\n"
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"vmovdqa %%ymm13, (%%rax, %1)\n"
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:
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: "r" ((uint64_t)N), "r" (i), "r" (&T[j * N]), "r" (pa[j])
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: "rax", "rcx", "cc", "memory"
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);
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}
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}
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#else /* CONFIG_X86_32 */
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uint8_t buffer_low[RAID_PARITY_MAX * 32 + 32];
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uint8_t buffer_high[RAID_PARITY_MAX * 32 + 32];
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uint8_t *pd_low = __align_ptr(buffer_low, 32);
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@ -1406,8 +1185,8 @@ void raid_recX_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
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/* reconstruct */
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for (j = 0; j < N; ++j) {
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asm volatile (
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"vpxor %%ymm0, %%ymm0, %%ymm0\n"
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"vpxor %%ymm1, %%ymm1, %%ymm1\n"
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"vpxor %ymm0, %ymm0, %ymm0\n"
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"vpxor %ymm1, %ymm1, %ymm1\n"
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);
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for (k = 0; k < N; ++k) {
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@ -1435,11 +1214,332 @@ void raid_recX_avx2(int nr, int *id, int *ip, int nd, size_t size, void **vv)
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);
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}
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}
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#endif
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raid_avx_end();
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}
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#ifdef CONFIG_X86_64
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/*
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* RAID recovering AVX2 implementation.
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*
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* Compute only the selected syndromes, keeping them in registers.
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* This avoids raid_delta_gen(), temporary syndrome buffers, and the
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* generation of unused parity rows.
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*/
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static __always_inline void raid_recX_avx2ext(int nr, int *id, int *ip, int nd, size_t size, void **vv)
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{
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uint8_t **v = (uint8_t **)vv;
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uint8_t *p[RAID_PARITY_MAX];
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uint8_t *pa[RAID_PARITY_MAX];
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uint8_t *src[RAID_DATA_MAX];
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uint8_t G[RAID_PARITY_MAX * RAID_PARITY_MAX];
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uint8_t V[RAID_PARITY_MAX * RAID_PARITY_MAX];
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const uint8_t *S[RAID_DATA_MAX][RAID_PARITY_MAX];
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const uint8_t *R[RAID_PARITY_MAX][RAID_PARITY_MAX];
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size_t i;
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int d, j, k, s;
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int ns;
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int has_p;
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/* setup the coefficients matrix */
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for (j = 0; j < nr; ++j)
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for (k = 0; k < nr; ++k)
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G[j * nr + k] = A(ip[j], id[k]);
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/* invert it to solve the system of linear equations */
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raid_invert(G, V, nr);
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/* setup selected parity and destination pointers */
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for (j = 0; j < nr; ++j) {
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p[j] = v[nd + ip[j]];
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pa[j] = v[id[j]];
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}
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/* ip[] is ordered. If P is available, it is always ip[0] */
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has_p = ip[0] == 0;
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/*
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* Build the compact list of surviving data blocks and precompute
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* the multiplication table pointers for each selected syndrome.
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*/
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ns = 0;
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k = 0;
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for (d = 0; d < nd; ++d) {
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if (k < nr && d == id[k]) {
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++k;
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continue;
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}
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src[ns] = v[d];
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for (j = 0; j < nr; ++j)
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S[ns][j] = &raid_gfmulpshufb[A(ip[j], d)][0][0];
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++ns;
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}
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BUG_ON(k != nr);
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BUG_ON(ns != nd - nr);
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/* precompute inverse-matrix multiplication table pointers */
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for (j = 0; j < nr; ++j)
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for (k = 0; k < nr; ++k)
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R[j][k] = &raid_gfmulpshufb[V[j * nr + k]][0][0];
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raid_avx_begin();
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asm volatile ("vpbroadcastb %0,%%ymm15" : : "m" (gfconst16.low4[0]));
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for (i = 0; i < size; i += 32) {
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/*
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* Start each syndrome with the corresponding stored parity.
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*
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* During syndrome computation:
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*
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* ymm0 syndrome 0
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* ymm2 syndrome 1
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* ymm4 syndrome 2
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* ymm6 syndrome 3
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* ymm8 syndrome 4
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* ymm10 syndrome 5
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*
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* ymm12 source / source low nibble
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* ymm13 source high nibble
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* ymm14 multiplication table / temporary
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* ymm15 low-nibble mask
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*/
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asm volatile ("vmovdqa %0,%%ymm0" : : "m" (p[0][i]));
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asm volatile ("vmovdqa %0,%%ymm2" : : "m" (p[1][i]));
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if (nr >= 3)
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asm volatile ("vmovdqa %0,%%ymm4" : : "m" (p[2][i]));
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if (nr >= 4)
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||||
asm volatile ("vmovdqa %0,%%ymm6" : : "m" (p[3][i]));
|
||||
|
||||
if (nr >= 5)
|
||||
asm volatile ("vmovdqa %0,%%ymm8" : : "m" (p[4][i]));
|
||||
|
||||
if (nr >= 6)
|
||||
asm volatile ("vmovdqa %0,%%ymm10" : : "m" (p[5][i]));
|
||||
|
||||
/*
|
||||
* Add all surviving data contributions.
|
||||
*/
|
||||
for (s = 0; s < ns; ++s) {
|
||||
const uint8_t **t = S[s];
|
||||
|
||||
asm volatile ("vmovdqa %0,%%ymm12" : : "m" (src[s][i]));
|
||||
|
||||
/*
|
||||
* P has coefficient 1 for every data disk.
|
||||
*
|
||||
* Keep the simple XOR fast path when P is the
|
||||
* first selected parity. Otherwise syndrome 0
|
||||
* uses the normal vpshufb multiplication.
|
||||
*/
|
||||
if (has_p) {
|
||||
asm volatile ("vpxor %ymm12,%ymm0,%ymm0");
|
||||
|
||||
asm volatile ("vpsrlw $4,%ymm12,%ymm13");
|
||||
asm volatile ("vpand %ymm15,%ymm12,%ymm12");
|
||||
asm volatile ("vpand %ymm15,%ymm13,%ymm13");
|
||||
} else {
|
||||
asm volatile ("vpsrlw $4,%ymm12,%ymm13");
|
||||
asm volatile ("vpand %ymm15,%ymm12,%ymm12");
|
||||
asm volatile ("vpand %ymm15,%ymm13,%ymm13");
|
||||
|
||||
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[0][0]));
|
||||
asm volatile ("vpshufb %ymm12,%ymm14,%ymm14");
|
||||
asm volatile ("vpxor %ymm14,%ymm0,%ymm0");
|
||||
|
||||
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[0][16]));
|
||||
asm volatile ("vpshufb %ymm13,%ymm14,%ymm14");
|
||||
asm volatile ("vpxor %ymm14,%ymm0,%ymm0");
|
||||
}
|
||||
|
||||
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[1][0]));
|
||||
asm volatile ("vpshufb %ymm12,%ymm14,%ymm14");
|
||||
asm volatile ("vpxor %ymm14,%ymm2,%ymm2");
|
||||
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[1][16]));
|
||||
asm volatile ("vpshufb %ymm13,%ymm14,%ymm14");
|
||||
asm volatile ("vpxor %ymm14,%ymm2,%ymm2");
|
||||
|
||||
if (nr >= 3) {
|
||||
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[2][0]));
|
||||
asm volatile ("vpshufb %ymm12,%ymm14,%ymm14");
|
||||
asm volatile ("vpxor %ymm14,%ymm4,%ymm4");
|
||||
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[2][16]));
|
||||
asm volatile ("vpshufb %ymm13,%ymm14,%ymm14");
|
||||
asm volatile ("vpxor %ymm14,%ymm4,%ymm4");
|
||||
}
|
||||
|
||||
if (nr >= 4) {
|
||||
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[3][0]));
|
||||
asm volatile ("vpshufb %ymm12,%ymm14,%ymm14");
|
||||
asm volatile ("vpxor %ymm14,%ymm6,%ymm6");
|
||||
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[3][16]));
|
||||
asm volatile ("vpshufb %ymm13,%ymm14,%ymm14");
|
||||
asm volatile ("vpxor %ymm14,%ymm6,%ymm6");
|
||||
}
|
||||
|
||||
if (nr >= 5) {
|
||||
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[4][0]));
|
||||
asm volatile ("vpshufb %ymm12,%ymm14,%ymm14");
|
||||
asm volatile ("vpxor %ymm14,%ymm8,%ymm8");
|
||||
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[4][16]));
|
||||
asm volatile ("vpshufb %ymm13,%ymm14,%ymm14");
|
||||
asm volatile ("vpxor %ymm14,%ymm8,%ymm8");
|
||||
}
|
||||
|
||||
if (nr >= 6) {
|
||||
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[5][0]));
|
||||
asm volatile ("vpshufb %ymm12,%ymm14,%ymm14");
|
||||
asm volatile ("vpxor %ymm14,%ymm10,%ymm10");
|
||||
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[5][16]));
|
||||
asm volatile ("vpshufb %ymm13,%ymm14,%ymm14");
|
||||
asm volatile ("vpxor %ymm14,%ymm10,%ymm10");
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Split every completed syndrome once.
|
||||
*
|
||||
* After this:
|
||||
*
|
||||
* ymm0 /ymm1 delta 0 low/high
|
||||
* ymm2 /ymm3 delta 1 low/high
|
||||
* ymm4 /ymm5 delta 2 low/high
|
||||
* ymm6 /ymm7 delta 3 low/high
|
||||
* ymm8 /ymm9 delta 4 low/high
|
||||
* ymm10/ymm11 delta 5 low/high
|
||||
*/
|
||||
asm volatile ("vpsrlw $4,%ymm0,%ymm1");
|
||||
asm volatile ("vpand %ymm15,%ymm0,%ymm0");
|
||||
asm volatile ("vpand %ymm15,%ymm1,%ymm1");
|
||||
|
||||
asm volatile ("vpsrlw $4,%ymm2,%ymm3");
|
||||
asm volatile ("vpand %ymm15,%ymm2,%ymm2");
|
||||
asm volatile ("vpand %ymm15,%ymm3,%ymm3");
|
||||
|
||||
if (nr >= 3) {
|
||||
asm volatile ("vpsrlw $4,%ymm4,%ymm5");
|
||||
asm volatile ("vpand %ymm15,%ymm4,%ymm4");
|
||||
asm volatile ("vpand %ymm15,%ymm5,%ymm5");
|
||||
}
|
||||
|
||||
if (nr >= 4) {
|
||||
asm volatile ("vpsrlw $4,%ymm6,%ymm7");
|
||||
asm volatile ("vpand %ymm15,%ymm6,%ymm6");
|
||||
asm volatile ("vpand %ymm15,%ymm7,%ymm7");
|
||||
}
|
||||
|
||||
if (nr >= 5) {
|
||||
asm volatile ("vpsrlw $4,%ymm8,%ymm9");
|
||||
asm volatile ("vpand %ymm15,%ymm8,%ymm8");
|
||||
asm volatile ("vpand %ymm15,%ymm9,%ymm9");
|
||||
}
|
||||
|
||||
if (nr >= 6) {
|
||||
asm volatile ("vpsrlw $4,%ymm10,%ymm11");
|
||||
asm volatile ("vpand %ymm15,%ymm10,%ymm10");
|
||||
asm volatile ("vpand %ymm15,%ymm11,%ymm11");
|
||||
}
|
||||
|
||||
/* reconstruct every missing data block */
|
||||
for (j = 0; j < nr; ++j) {
|
||||
const uint8_t **t = R[j];
|
||||
|
||||
/* first coefficient initializes the low/high accumulators */
|
||||
asm volatile ("vbroadcasti128 %0,%%ymm12" : : "m" (t[0][0]));
|
||||
asm volatile ("vbroadcasti128 %0,%%ymm13" : : "m" (t[0][16]));
|
||||
asm volatile ("vpshufb %ymm0,%ymm12,%ymm12");
|
||||
asm volatile ("vpshufb %ymm1,%ymm13,%ymm13");
|
||||
|
||||
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[1][0]));
|
||||
asm volatile ("vpshufb %ymm2,%ymm14,%ymm14");
|
||||
asm volatile ("vpxor %ymm14,%ymm12,%ymm12");
|
||||
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[1][16]));
|
||||
asm volatile ("vpshufb %ymm3,%ymm14,%ymm14");
|
||||
asm volatile ("vpxor %ymm14,%ymm13,%ymm13");
|
||||
|
||||
if (nr >= 3) {
|
||||
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[2][0]));
|
||||
asm volatile ("vpshufb %ymm4,%ymm14,%ymm14");
|
||||
asm volatile ("vpxor %ymm14,%ymm12,%ymm12");
|
||||
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[2][16]));
|
||||
asm volatile ("vpshufb %ymm5,%ymm14,%ymm14");
|
||||
asm volatile ("vpxor %ymm14,%ymm13,%ymm13");
|
||||
}
|
||||
|
||||
if (nr >= 4) {
|
||||
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[3][0]));
|
||||
asm volatile ("vpshufb %ymm6,%ymm14,%ymm14");
|
||||
asm volatile ("vpxor %ymm14,%ymm12,%ymm12");
|
||||
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[3][16]));
|
||||
asm volatile ("vpshufb %ymm7,%ymm14,%ymm14");
|
||||
asm volatile ("vpxor %ymm14,%ymm13,%ymm13");
|
||||
}
|
||||
|
||||
if (nr >= 5) {
|
||||
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[4][0]));
|
||||
asm volatile ("vpshufb %ymm8,%ymm14,%ymm14");
|
||||
asm volatile ("vpxor %ymm14,%ymm12,%ymm12");
|
||||
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[4][16]));
|
||||
asm volatile ("vpshufb %ymm9,%ymm14,%ymm14");
|
||||
asm volatile ("vpxor %ymm14,%ymm13,%ymm13");
|
||||
}
|
||||
|
||||
if (nr >= 6) {
|
||||
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[5][0]));
|
||||
asm volatile ("vpshufb %ymm10,%ymm14,%ymm14");
|
||||
asm volatile ("vpxor %ymm14,%ymm12,%ymm12");
|
||||
|
||||
asm volatile ("vbroadcasti128 %0,%%ymm14" : : "m" (t[5][16]));
|
||||
asm volatile ("vpshufb %ymm11,%ymm14,%ymm14");
|
||||
asm volatile ("vpxor %ymm14,%ymm13,%ymm13");
|
||||
}
|
||||
|
||||
asm volatile ("vpxor %ymm13,%ymm12,%ymm12");
|
||||
asm volatile ("vmovdqa %%ymm12,%0" : "=m" (pa[j][i]));
|
||||
}
|
||||
}
|
||||
|
||||
raid_avx_end();
|
||||
}
|
||||
|
||||
static void raid_rec2_avx2ext(int nr, int *id, int *ip, int nd, size_t size, void **vv)
|
||||
{
|
||||
BUG_ON(nr != 2);
|
||||
raid_recX_avx2ext(2, id, ip, nd, size, vv);
|
||||
}
|
||||
|
||||
static void raid_rec3_avx2ext(int nr, int *id, int *ip, int nd, size_t size, void **vv)
|
||||
{
|
||||
BUG_ON(nr != 3);
|
||||
raid_recX_avx2ext(3, id, ip, nd, size, vv);
|
||||
}
|
||||
|
||||
static void raid_rec4_avx2ext(int nr, int *id, int *ip, int nd, size_t size, void **vv)
|
||||
{
|
||||
BUG_ON(nr != 4);
|
||||
raid_recX_avx2ext(4, id, ip, nd, size, vv);
|
||||
}
|
||||
|
||||
static void raid_rec5_avx2ext(int nr, int *id, int *ip, int nd, size_t size, void **vv)
|
||||
{
|
||||
BUG_ON(nr != 5);
|
||||
raid_recX_avx2ext(5, id, ip, nd, size, vv);
|
||||
}
|
||||
|
||||
static void raid_rec6_avx2ext(int nr, int *id, int *ip, int nd, size_t size, void **vv)
|
||||
{
|
||||
BUG_ON(nr != 6);
|
||||
raid_recX_avx2ext(6, id, ip, nd, size, vv);
|
||||
}
|
||||
#endif
|
||||
|
||||
void raid_register_avx2(void)
|
||||
{
|
||||
if (raid_cpu_has_avx2()) {
|
||||
|
|
@ -1466,6 +1566,13 @@ void raid_register_avx2(void)
|
|||
raid_rec_register(RAID_ALGO_CAUCHY_PAR4, "avx2", raid_recX_avx2, RAID_POLY_ANY);
|
||||
raid_rec_register(RAID_ALGO_CAUCHY_PAR5, "avx2", raid_recX_avx2, RAID_POLY_ANY);
|
||||
raid_rec_register(RAID_ALGO_CAUCHY_PAR6, "avx2", raid_recX_avx2, RAID_POLY_ANY);
|
||||
#ifdef CONFIG_X86_64
|
||||
raid_rec_register(RAID_ALGO_CAUCHY_PAR3, "avx2e", raid_rec2_avx2ext, RAID_POLY_ANY);
|
||||
raid_rec_register(RAID_ALGO_CAUCHY_PAR3, "avx2e", raid_rec3_avx2ext, RAID_POLY_ANY);
|
||||
raid_rec_register(RAID_ALGO_CAUCHY_PAR4, "avx2e", raid_rec4_avx2ext, RAID_POLY_ANY);
|
||||
raid_rec_register(RAID_ALGO_CAUCHY_PAR5, "avx2e", raid_rec5_avx2ext, RAID_POLY_ANY);
|
||||
raid_rec_register(RAID_ALGO_CAUCHY_PAR6, "avx2e", raid_rec6_avx2ext, RAID_POLY_ANY);
|
||||
#endif
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue