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Adds proper detection for AVX2.

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This commit is contained in:
Andrea Mazzoleni 2014-09-14 19:47:43 +02:00
parent 957db46f5b
commit 8e97b7a248
2 changed files with 27 additions and 4 deletions
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3
cmdline/speed.c
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@ -122,12 +122,11 @@ void speed(int period)
raid_cpu_info(vendor, &family, &model);
printf("CPU %s, family %u, model %u, flags%s%s%s%s%s%s%s%s%s\n", vendor, family, model,
printf("CPU %s, family %u, model %u, flags%s%s%s%s%s%s%s%s\n", vendor, family, model,
raid_cpu_has_mmx() ? " mmx" : "",
raid_cpu_has_sse2() ? " sse2" : "",
raid_cpu_has_ssse3() ? " ssse3" : "",
raid_cpu_has_sse42() ? " sse42" : "",
raid_cpu_has_avx() ? " avx" : "",
raid_cpu_has_avx2() ? "avx2" : "",
raid_cpu_has_slowmult() ? " slowmult" : "",
raid_cpu_has_slowpshufb() ? " slowpshufb" : "",

28
raid/cpu.h
View file

@ -106,19 +106,43 @@ static inline int raid_cpu_has_sse42(void)
return (reg[2] >> 20) & 1;
}
static inline int raid_cpu_has_avx(void)
static inline int raid_cpu_has_xsavexrstor(void)
{
uint32_t reg[4];
raid_cpuid(1, 0, reg);
return (reg[2] >> 28) & 1;
return (reg[2] >> 27) & 1;
}
static inline int raid_os_support_256bit_regs(void)
{
uint32_t reg[4];
/* get the value of the Extended Control Register ecx=0 */
asm volatile(
"xgetbv\n"
: "=a" (reg[0]), "=d" (reg[3])
: "c" (0)
);
/* check if the OS save all the 256 bits registers */
return (reg[0] & 0x6) == 0x6;
}
static inline int raid_cpu_has_avx2(void)
{
uint32_t reg[4];
/* check if the CPU supports XSAVE and XRSTOR, and also XGETBV */
if (!raid_cpu_has_xsavexrstor())
return 0;
/* check if the OS suports AVX2 registers */
if (!raid_os_support_256bit_regs())
return 0;
/* now check for AVX2 support */
raid_cpuid(7, 0, reg);
return (reg[1] >> 5) & 1;