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834 commits 14 branches 78 tags 69 MiB
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58 commits

Author SHA1 Message Date
Andrea Mazzoleni
81f2fde927 Adds new test program for the RAID engine. 2014-01-18 10:37:09 +01:00
Andrea Mazzoleni
91c3de2182 Refactors the regression test. 2014-01-15 19:57:02 +01:00
Andrea Mazzoleni
00a05a80e5 Changes the argument format of raid_rec() and renames raid_par() to raid_gen(). 2014-01-08 17:07:13 +01:00
Andrea Mazzoleni
cae803bdfb Refactors vector operations. 2014-01-02 17:51:50 +01:00
Andrea Mazzoleni
29b411e3fe Fixes build due missing PAGE_SIZE. 2014-01-01 22:26:56 +01:00
Andrea Mazzoleni
cbddaa108d Refactors even more and add an additional selftest. 2013-12-31 15:46:24 +01:00
Andrea Mazzoleni
535beee053 One more #ifdef missing for ARM. 2013-12-30 10:17:48 +01:00
Andrea Mazzoleni
766ded42e9 Fixes build on ARM. 2013-12-30 10:13:10 +01:00
Andrea Mazzoleni
cda356dc75 Reviews the raid.c initial description. 2013-12-29 22:54:03 +01:00
Andrea Mazzoleni
03482b84a6 Moves RAID tests in the raid/ dir. 2013-12-29 22:13:08 +01:00
Andrea Mazzoleni
e80a5e868f Uses a more general interface for the RAID engine. 2013-12-28 15:12:09 +01:00
Andrea Mazzoleni
abc05c612c Splits the RAID engine in multiple files. 2013-12-28 09:10:00 +01:00
Andrea Mazzoleni
de0c8db8d7 Refactors the RAID engine for a potential independent release. 2013-12-27 13:56:56 +01:00
Andrea Mazzoleni
b81e4a0141 Renames some variables. No functional change. 2013-12-26 09:45:51 +01:00
Andrea Mazzoleni
9fa97f04fd Move the vbuf argument as last one. No functional change. 2013-12-26 09:28:00 +01:00
Andrea Mazzoleni
dd6d73374a Renames some variables. No functional change. 2013-12-26 09:09:29 +01:00
Andrea Mazzoleni
308d1fc084 Checks for Intel CRC32 instruction for the assembler. 
In OpenBSD 5.4, AS is old 2.15 and it's not supported.
 2013-12-16 16:21:54 +01:00
Andrea Mazzoleni
b6c93cd61b Renames par3z to parz. 2013-11-17 14:27:31 +01:00
Andrea Mazzoleni
5cb69c3e7d Uses a more clear description of the measured speed. 2013-11-14 22:01:54 +01:00
Andrea Mazzoleni
915c3b9202 Renames parity level from RAID to PAR. 2013-11-13 21:35:44 +01:00
Andrea Mazzoleni
bb0cd0e7ac Finalizes alternate triple parity support. 2013-11-05 19:40:32 +01:00
Andrea Mazzoleni
a5a3c33854 Adds support for fast triple parity without SSSE3. 2013-11-04 23:47:49 +01:00
Andrea Mazzoleni
6a3438f883 Reverse the order of disk buffers that are accessed in backward order. 
This improves a little the speed.
 2013-11-04 19:45:29 +01:00
Andrea Mazzoleni
3dd6e50c4e Adds optimized SSSE3 functions for recovering. 2013-11-03 17:50:09 +01:00
Andrea Mazzoleni
b648761d0d Cleanups the speed module. 2013-10-28 22:40:18 +01:00
Andrea Mazzoleni
7414f8daec Adds a basic memory test on the used memory buffers. 2013-10-27 17:31:10 +01:00
Andrea Mazzoleni
9c04a93b42 Fixes crc table in speed. 2013-10-26 18:13:52 +02:00
Andrea Mazzoleni
684bcab3bb Adds speed check for recovering. 2013-10-26 17:14:20 +02:00
Andrea Mazzoleni
7057d97999 Removes legacy MMX support. 2013-10-26 12:54:08 +02:00
Andrea Mazzoleni
9a5978eb22 Adds complete Cauchy RAID support and removes the mixed Power RAID. 2013-10-25 18:03:05 +02:00
Andrea Mazzoleni
136af37e96 Adds preliminary support for RAID based on a Cauchy matrix. 2013-10-22 23:40:05 +02:00
Andrea Mazzoleni
856d261c24 In speed check prints progressive test. 2013-10-20 19:33:46 +02:00
Andrea Mazzoleni
8940fdc47f Better presentation of speed results. 2013-10-19 18:47:14 +02:00
Andrea Mazzoleni
8d5d21b0f1 Removes RAID computation processing 128 bytes block. 2013-10-15 19:20:50 +02:00
Andrea Mazzoleni
e33a916295 Disables SSSE3 on Atom and Jaguar CPU. 
It's slower than plain SSE2.
 2013-10-07 22:21:26 +02:00
Andrea Mazzoleni
823bc8a8c0 Adds SSSE3 and AVX parity computation. 2013-10-06 16:06:17 +02:00
Andrea Mazzoleni
3d689c53de Doesn't use extended SSE registers in the Bulldozer AMD family. 2013-09-29 15:24:15 +02:00
Andrea Mazzoleni
53744ed2b1 Refactors the whole raid support. 2013-09-22 23:32:30 +02:00
Andrea Mazzoleni
f8303d2963 Adds preliminary support for QuadParity. 2013-09-17 23:05:44 +02:00
Andrea Mazzoleni
18840848e9 Computation support for RAID-TP (Triple Parity). 2013-09-07 17:22:33 +02:00
Andrea Mazzoleni
4f891087a2 Optimizes the cache use for all the RAID computations. 2013-09-05 22:29:58 +02:00
Andrea Mazzoleni
e12f5f0d2a Prints the supported nanosecond function with -T. 2013-08-26 20:38:40 +02:00
Andrea Mazzoleni
6a4879caad Uses the crc32q Intel instruction in x64 platforms. 2013-08-20 20:33:22 +02:00
Andrea Mazzoleni
28bdd0f7b7 Adds the speed test for CRC. 2013-08-20 18:55:54 +02:00
Andrea Mazzoleni
73a860bec0 Adds prelinary RAID5 unrolled by 8. 2013-06-20 23:59:33 +02:00
Andrea Mazzoleni
4455ba7e4f Adds a random hash seed. 2013-06-16 00:33:46 +02:00
Andrea Mazzoleni
6049b71296 Removes the slowsse2 cpu flag. It's no more requires as sse2 is not faster than mmx. 2013-06-14 22:39:27 +02:00
Andrea Mazzoleni
39b80a1a13 Uses 8 buffers when testing for speed. 2013-06-14 18:46:49 +02:00
Andrea Mazzoleni
d9dcaa4893 Makes clear in the speed test which are the hashes. 2013-06-13 23:33:13 +02:00
Andrea Mazzoleni
e92035284f Adds RAID6 mmx/sse2 unroll by 4. 2013-06-13 23:32:16 +02:00