147 commits

Author	SHA1	Message	Date
Andrea Mazzoleni	71ffb94019	Keep deltas in AVX-512 registers and unroll reconstruction with conditional jumps in recX	2026-08-21 12:06:25 +02:00
Andrea Mazzoleni	93eadd73f0	Preload multiplication tables and avoid repeated nibble splitting in NEON recovery	2026-08-21 12:06:25 +02:00
Andrea Mazzoleni	48d97dae31	Make 64-byte block alignment an explicit requirement in RAID API	2026-08-21 12:06:25 +02:00
Andrea Mazzoleni	11bf37d61b	Enforce mode parity limits	2026-08-21 12:06:25 +02:00
Andrea Mazzoleni	5d2f3c7b16	Avoid strict-aliasing and unaligned write in raid_cpu_info	2026-08-21 12:06:25 +02:00
Andrea Mazzoleni	7e2a8eab7d	Keep multiplication tables resident and reuse delta nibbles in AVX2 and AVX512BW REC2	2026-08-21 12:06:25 +02:00
Andrea Mazzoleni	17591ad932	Add GFNI affine parity generation for RAID polynomial	2026-08-21 12:06:25 +02:00
Andrea Mazzoleni	b5d507fbe9	Use primitive generator 3 for AES Cauchy mode	2026-08-21 12:06:25 +02:00
Andrea Mazzoleni	cc91392803	Replace pointer casting with safe memcpy helpers	2026-08-18 23:33:59 +02:00
Andrea Mazzoleni	24a8464fc0	Require AVX512BW in addition to AVX512F for AVX-512 GFNI detection	2026-08-18 23:33:59 +02:00
Andrea Mazzoleni	f09091a4e4	Refine RAID buffer displacement rationale	2026-08-18 23:33:57 +02:00
Andrea Mazzoleni	45833e9f1f	Refine RAID stride noise documentation	2026-08-18 23:33:57 +02:00
Andrea Mazzoleni	039b5c2c28	Add RAID library developer README	2026-08-18 23:33:57 +02:00
Andrea Mazzoleni	f3c3265116	Document dummy register clobbers in raid_sse_end and raid_neon_end	2026-08-18 23:33:56 +02:00
Andrea Mazzoleni	47b321d97c	Support dynamic runtime selection of RAID AES mode	2026-08-18 23:33:56 +02:00
Andrea Mazzoleni	49d5e685c9	Avoid a folding VLA warning in clang	2026-08-18 23:33:55 +02:00
Andrea Mazzoleni	8e2b9c03b5	Use uniform ending on files for parity implementation	2026-08-18 23:33:54 +02:00
Andrea Mazzoleni	1a3099d7f5	Fix building on x86 for missing AVX512 support	2026-08-18 23:33:54 +02:00
Andrea Mazzoleni	fd2dc7810f	Run the speed test with and without displacement	2026-08-18 23:33:54 +02:00
Andrea Mazzoleni	2dbb25acbd	Allow to specify the wrap size in allocation	2026-08-18 23:33:54 +02:00
Andrea Mazzoleni	e43964523f	Refactor and reorganize parity generation functions using inline templates	2026-08-18 23:33:54 +02:00
Andrea Mazzoleni	22495abe9e	Add AArch64 NEON parity generation and recovery functions	2026-08-18 23:33:54 +02:00
Andrea Mazzoleni	807f2f6690	Use vpternlogq in raid_gen3-6_avx512bw to fuse sequential vpxorq instructions into single 3-way XORs	2026-08-18 23:33:54 +02:00
Andrea Mazzoleni	9e1652673d	Gate AVX-512BW gen1/gen2 behind slow_avx512() to avoid double-pumped shuffle penalties	2026-08-18 23:33:54 +02:00
Andrea Mazzoleni	76998613da	Remove the unused number of data disks from the vector allocation ... The same addressing rules are applied to the parity disks because they are used as data disks during recovery operations.	2026-08-18 23:33:54 +02:00
Andrea Mazzoleni	7a7dacc6db	Inject variable page-offset noise to disk buffer displacement to mitigate prefetcher contention	2026-08-18 23:33:54 +02:00
Andrea Mazzoleni	5795b9706e	Use the optimal displacement depending on the number of disks	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	1e63403bf2	Change RAID AVX512/GFNI functions to use forward iterations	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	6cb3d86f66	Remove the special case of a single data disk when not strictly required	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	810851da37	Remove unused level 0 from the pshufb table	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	f8abcd666f	Change the AVX512BW generation to use pshufb also for Q parity	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	dd8e3bfcb0	Extend the pshufb table to include the Q parity coefficients	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	04df1f7b26	New displacement benchmarks	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	f1bc02f52a	Simplify GFNI implementations	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	abfa6fde28	Always build RAID test with USE_RAID_AES	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	108915254e	Assume the assembler supports all x86 SSE/AVX instructions	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	44d23c16ff	Extend the RAID regression test to detect unset parity	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	c08a571d88	Add support for AVX2 GFNI	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	557dcda9cd	Disable AVX512 on CPUs with narrow shuffle ports or double-pumped 256-bit datapath	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	1b8bf8dfd0	Revise the RAID library Makefile	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	599a4fbb42	Be more clear when GFNI is really used	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	d67cdd8b9d	Optimize AVX512 gen1 parity with the vpternlogq instruction	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	9005af10ad	Add tables for the AES Polynomial	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	9b8e4a8845	Comment about the RAID optimizations	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	e381e74ee6	Use a simpler approach in the new AVX512 generation functions	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	639167efba	Preliminary support for AVX512GFNI	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	d735eb7736	Change commenting style	2026-08-18 23:33:52 +02:00
Andrea Mazzoleni	03a8927571	Add detection of AVX2GFNI	2026-08-18 23:33:52 +02:00
Andrea Mazzoleni	bba98c3e63	Add more AVX512 functions for parity	2026-08-18 23:33:52 +02:00
Andrea Mazzoleni	d0fb6d2ac3	Preliminary support for ADVX512	2026-08-18 23:33:52 +02:00