62 commits

Author	SHA1	Message	Date
Andrea Mazzoleni	25c86bc1e7	Remove leading double underscores from header include guards	2026-10-15 15:35:31 +02:00
Andrea Mazzoleni	6ae014d6ed	Align integer gen and rec loops to 64 bytes	2026-10-05 15:41:01 +02:00
Andrea Mazzoleni	bfe5ee7643	Document streaming parameter as a strict 0 or 1 value	2026-09-16 08:39:22 +02:00
Andrea Mazzoleni	ec1daddc8e	Eliminate raid_delta_gen and convert int/neon32 REC1/REC2 to single-pass fused recovery	2026-09-02 18:30:59 +02:00
Andrea Mazzoleni	0ce89aa35d	Add support for selectable streaming vs cached parity generation	2026-09-02 17:26:02 +02:00
Andrea Mazzoleni	e0c0ea3dcc	Optimize scalar 8-bit RAID parity generation and recovery in int.c	2026-08-31 10:39:17 +02:00
Andrea Mazzoleni	f85c014c1c	Extend raid_selftest with comprehensive recovery combinations for raid_rec	2026-08-25 10:45:46 +02:00
Andrea Mazzoleni	c192fe8982	Add compiler memory barriers to NEON and NEON32 end helpers	2026-08-25 09:58:53 +02:00
Andrea Mazzoleni	c1a78092c4	Fix RAID documentation accuracy	2026-08-24 21:53:07 +02:00
Andrea Mazzoleni	ae703ce68c	Optimize multi-parity recovery with fused syndrome generation	2026-08-24 11:57:04 +02:00
Andrea Mazzoleni	9d842b0dfb	Precompute direct Cauchy affine matrices for RAID GFNI generation	2026-08-23 21:57:16 +02:00
Andrea Mazzoleni	c410b11162	Clarify SIMD register preservation rationale and AVX transition comments	2026-08-21 12:06:26 +02:00
Andrea Mazzoleni	5c24968e6d	Add AArch32 (ARM32) NEON SIMD support for parity generation and recovery	2026-08-21 12:06:25 +02:00
Andrea Mazzoleni	11bf37d61b	Enforce mode parity limits	2026-08-21 12:06:25 +02:00
Andrea Mazzoleni	17591ad932	Add GFNI affine parity generation for RAID polynomial	2026-08-21 12:06:25 +02:00
Andrea Mazzoleni	b5d507fbe9	Use primitive generator 3 for AES Cauchy mode	2026-08-21 12:06:25 +02:00
Andrea Mazzoleni	f3c3265116	Document dummy register clobbers in raid_sse_end and raid_neon_end	2026-08-18 23:33:56 +02:00
Andrea Mazzoleni	47b321d97c	Support dynamic runtime selection of RAID AES mode	2026-08-18 23:33:56 +02:00
Andrea Mazzoleni	8e2b9c03b5	Use uniform ending on files for parity implementation	2026-08-18 23:33:54 +02:00
Andrea Mazzoleni	e43964523f	Refactor and reorganize parity generation functions using inline templates	2026-08-18 23:33:54 +02:00
Andrea Mazzoleni	22495abe9e	Add AArch64 NEON parity generation and recovery functions	2026-08-18 23:33:54 +02:00
Andrea Mazzoleni	810851da37	Remove unused level 0 from the pshufb table	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	dd8e3bfcb0	Extend the pshufb table to include the Q parity coefficients	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	108915254e	Assume the assembler supports all x86 SSE/AVX instructions	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	c08a571d88	Add support for AVX2 GFNI	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	639167efba	Preliminary support for AVX512GFNI	2026-08-18 23:33:53 +02:00
Andrea Mazzoleni	d735eb7736	Change commenting style	2026-08-18 23:33:52 +02:00
Andrea Mazzoleni	bba98c3e63	Add more AVX512 functions for parity	2026-08-18 23:33:52 +02:00
Andrea Mazzoleni	d0fb6d2ac3	Preliminary support for ADVX512	2026-08-18 23:33:52 +02:00
Christoph Hellwig	cf515b82b2	Make all RAID forwarders static and local using a new registration interface ... Co-authored-by: Andrea Mazzoleni <amadvance@gmail.com>	2026-08-18 23:33:52 +02:00
Andrea Mazzoleni	0d0431a907	Simpler Copyright string	2026-04-09 17:56:49 +02:00
Christoph Hellwig	60269a1236	Use SPDX (https://spdx.dev/) tags to identify the license used for each ... file, and a COPYING file explaining the licensing scheme, with the actual licenses listed in the LICENSES/ directory.	2026-04-02 16:01:37 +02:00
Andrea Gelmini	986e9b4131	Fix typos	2020-05-26 12:50:15 +02:00
Andrea Mazzoleni	9430106c71	Allow to disable inline assembly from configure ... This is required for the -fsanitize options that don't support inline assembly statements.	2016-01-09 11:19:52 +01:00
Andrea Mazzoleni	b0891290eb	More raid coverage extensions	2015-03-18 22:55:17 +01:00
Andrea Mazzoleni	7fd0beb36a	Review of the new alignment method	2015-03-18 08:21:28 +01:00
Andrea Mazzoleni	b0d2368cce	Use a more generic approach to align the stack ... This is independent of the compiler used.	2015-03-17 21:46:20 +01:00
Andrea Mazzoleni	c8558c28ac	Fix some formatting issues of the code ... Now it matches the Linux kernel style.	2015-03-12 18:53:36 +01:00
Andrea Mazzoleni	a99cd9daff	Use specialized assembler header and footer for sse and avx	2015-03-10 19:02:23 +01:00
Andrea Mazzoleni	763dccaaed	Use an implicit clobber list for asm snipsets ... There is no speed gain in a custom clobber list.	2015-03-09 22:25:29 +01:00
Christoph Junghans	72e19d74f5	Fixes out-of-source build.	2014-12-24 11:13:37 +01:00
Andrea Mazzoleni	a26607de8a	Some more build exclusions for instructions set.	2014-11-12 21:23:21 +01:00
Andrea Mazzoleni	4a92b064f4	Beautifies the raid lib.	2014-11-12 20:41:00 +01:00
Andrea Mazzoleni	7d6c30333f	Uses a more precise intructions set detection. ... This allows to build with old assembler programs.	2014-11-12 19:52:35 +01:00
Andrea Mazzoleni	2cd0ca3fa8	Fixes a typo in a comment.	2014-09-29 19:16:54 +02:00
Andrea Mazzoleni	3274b7cd2e	Uses a different way to handle registers conflict with the compiler.	2014-09-21 08:45:33 +02:00
Andrea Mazzoleni	a7cdd9cf2f	Adds missing AVX2 functions.	2014-09-16 20:17:54 +02:00
Andrea Mazzoleni	0e3901ca3e	Adds gen3/z support for AVX2.	2014-09-15 22:31:25 +02:00
Andrea Mazzoleni	957db46f5b	Preliminary AVX2 support.	2014-09-14 18:03:40 +02:00
Andrea Mazzoleni	9ddaa30e6c	Fixes build in Mac OS X.	2014-04-01 19:53:19 +02:00